Re: [Intel-gfx] [PATCH 09/18] drm/i915: make PM interrupt writes non-destructive

2012-11-07 Thread Chris Wilson
On Tue, 6 Nov 2012 16:25:33 +, Ben Widawsky wrote: > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 8f15616..5477454 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -2354,7 +2354,7 @@ static void gen6_disable_

Re: [Intel-gfx] [PATCH v2 0/4] drm/exynos, intel: fix locking for flip/vbl event list

2012-11-07 Thread Imre Deak
On Wed, 2012-11-07 at 18:31 +0900, Inki Dae wrote: > 2012/11/2 Imre Deak > The patchset adds the missing event_lock when accessing the > vblank_event_list in drm_vblank_off() and as preparation for > this > also fixes a few other issues in the exynos driver. >

Re: [Intel-gfx] [PATCH 09/18] drm/i915: make PM interrupt writes non-destructive

2012-11-07 Thread Ben Widawsky
On Wed, 07 Nov 2012 10:17:09 + Chris Wilson wrote: > On Tue, 6 Nov 2012 16:25:33 +, Ben Widawsky wrote: > > diff --git a/drivers/gpu/drm/i915/intel_pm.c > > b/drivers/gpu/drm/i915/intel_pm.c > > index 8f15616..5477454 100644 > > --- a/drivers/gpu/drm/i915/intel_pm.c > > +++ b/drivers/g

Re: [Intel-gfx] [PATCH 00/18] [RFC] Introduce the Haswell VECS

2012-11-07 Thread Ben Widawsky
The basic usage of this feature is already upstream in libva. git://anongit.freedesktop.org/vaapi/intel-driver On Tue, 6 Nov 2012 16:25:24 + Ben Widawsky wrote: > The VECS is a new command streamer introduced in Haswell which allows > offloading of video post processing to a new engine cal

Re: [Intel-gfx] [PATCH v2 0/4] drm/exynos, intel: fix locking for flip/vbl event list

2012-11-07 Thread Inki Dae
2012/11/2 Imre Deak > The patchset adds the missing event_lock when accessing the > vblank_event_list in drm_vblank_off() and as preparation for this > also fixes a few other issues in the exynos driver. > > This is also a dependency for Rob Clark's drm_send_vblank_event() > rework as that would

Re: [Intel-gfx] [PATCH 01/18] drm/i915: Comments for semaphore clarification

2012-11-07 Thread Jani Nikula
On Tue, 06 Nov 2012, Ben Widawsky wrote: > Semaphores are tied very closely to the rings in the GPU. Trivial patch > adds comments to the existing code so that when we add new rings we can > include comments there as well. It also helps distinguish the ring to > semaphore mailbox interactions by u

Re: [Intel-gfx] [PATCH 02/18] drm/i915: Semaphore MBOX update generalization

2012-11-07 Thread Jani Nikula
On Tue, 06 Nov 2012, Ben Widawsky wrote: > This replaces the existing MBOX update code with a more generalized > calculation for emitting mbox updates. We also create a sentinel for > doing the updates so we can more abstractly deal with the rings. > > When doing MBOX updates the code must be awar

Re: [Intel-gfx] [PATCH 17/18] drm/i915: Use a slab for object allocation

2012-11-07 Thread Ben Widawsky
On Mon, 05 Nov 2012 20:57:05 + Chris Wilson wrote: > On Mon, 5 Nov 2012 17:49:35 +, Ben Widawsky wrote: > > On Fri, 19 Oct 2012 18:03:23 +0100 > > Chris Wilson wrote: > > > > > The primary purpose of this was to debug some use-after-free memory > > > corruption that was causing an OOPS

Re: [Intel-gfx] [PATCH 05/18] drm/i915: Rename ring flush functions

2012-11-07 Thread Jani Nikula
On Tue, 06 Nov 2012, Ben Widawsky wrote: > Historically we considered the render ring to have special flush > semantics and everything else to fall under a more general umbrella. > Probably by coincidence more than anything we decided to make the bsd > ring have the default *other* flush. As the n

Re: [Intel-gfx] [PATCH 06/18] drm/i915: add HAS_VEBOX

2012-11-07 Thread Jani Nikula
On Tue, 06 Nov 2012, Ben Widawsky wrote: > From: "Xiang, Haihao" > > The flag will be useful to help share code between IVB, and HSW as the > programming is similar in many places with this as one of the major > differences. Reviewed-by: Jani Nikula > > Signed-off-by: Xiang, Haihao > [Commit

[Intel-gfx] REg: Doubt in drm kernel driver

2012-11-07 Thread Duraisamy, Srinath
Hi all, I am working on a project related to MFX part of Gen7 GPU. I am working on dumping the input commands and data being passed to MFX pipeline while decoding. And to dump the decoded output data from the MFX pipeline. I am using mplayer to decode the h264 file with vaapi support to use the

[Intel-gfx] S3 causing IRQ delivery mismatch - i915 hotplug storm

2012-11-07 Thread Ben Guthro
I'm trying to debug an issue on an older lapop (Toshiba Satellite A505) - that has an i3 processor (M330) - and intel graphics. This is running under Xen-unstable, and a 3.7-rc4 pvops kernel - but can also be reproduced using kernels as old as 3.2.23 - and hypervisors as old as 4.0.4 (I have cross

Re: [Intel-gfx] [PATCH v2 0/4] drm/exynos, intel: fix locking for flip/vbl event list

2012-11-07 Thread Inki Dae
2012/11/7 Imre Deak > On Wed, 2012-11-07 at 18:31 +0900, Inki Dae wrote: > > 2012/11/2 Imre Deak > > The patchset adds the missing event_lock when accessing the > > vblank_event_list in drm_vblank_off() and as preparation for > > this > > also fixes a few other is

Re: [Intel-gfx] [PATCH v2 0/4] drm/exynos, intel: fix locking for flip/vbl event list

2012-11-07 Thread Rob Clark
On Wed, Nov 7, 2012 at 10:25 AM, Inki Dae wrote: > > > 2012/11/7 Imre Deak >> >> On Wed, 2012-11-07 at 18:31 +0900, Inki Dae wrote: >> > 2012/11/2 Imre Deak >> > The patchset adds the missing event_lock when accessing the >> > vblank_event_list in drm_vblank_off() and as preparat

Re: [Intel-gfx] [PATCH v2 0/4] drm/exynos, intel: fix locking for flip/vbl event list

2012-11-07 Thread Inki Dae
2012/11/8 Rob Clark > On Wed, Nov 7, 2012 at 10:25 AM, Inki Dae wrote: > > > > > > 2012/11/7 Imre Deak > >> > >> On Wed, 2012-11-07 at 18:31 +0900, Inki Dae wrote: > >> > 2012/11/2 Imre Deak > >> > The patchset adds the missing event_lock when accessing the > >> > vblank_event_

Re: [Intel-gfx] S3 causing IRQ delivery mismatch - i915 hotplug storm

2012-11-07 Thread Ben Guthro
On Wed, Nov 7, 2012 at 11:22 AM, Ben Guthro wrote: > I'm trying to debug an issue on an older lapop (Toshiba Satellite A505) - > that has an i3 processor (M330) - and intel graphics. > This is running under Xen-unstable, and a 3.7-rc4 pvops kernel - but can > also be reproduced using kernels as o

Re: [Intel-gfx] S3 causing IRQ delivery mismatch - i915 hotplug storm

2012-11-07 Thread Ben Guthro
On Wed, Nov 7, 2012 at 2:43 PM, Ben Guthro wrote: >> >> >> There seems to be a mismatch for these IRQ delivery - or at least exhibits >> the behavior similar to such a problem. >> > > I was mistaken here. The i8042 IRQ would just start up the IRQ handling - but > the i915 driver always thinks it

[Intel-gfx] About HD3000(sandybridge) driver on vxWorks

2012-11-07 Thread for1984
Dear Sir: My name is wenjie zhou.I come from Wuhan China. Now I am writing HD3000(sandybridge) driver on vxWorks.But,there are some problems confusing me for a long time.Please help me!Thank you! My problme is:When I use the blitter engine to realize filling the color to the rect