Hi,
For https://gitlab.freedesktop.org/drm/intel/-/issues/4447,
are people aware of it or do I need to make people aware of it
somehow?
Do I need to provide more information? If so, what?
thanks.
--
~Randy
Quoting Andrew Parsons (2020-07-24 02:55:04)
> Hello all,
>
> TL;DR: my questions concern the following two topics:
> - CRTCs and Intel integrated GPUs
> - intel-virtual-output utility
>
> I have a laptop with both an Intel integrated GPU and an AMD discrete GPU.
>
> ```
> ➜ ~ xrandr --listprov
Hello all,
TL;DR: my questions concern the following two topics:
- CRTCs and Intel integrated GPUs
- intel-virtual-output utility
I have a laptop with both an Intel integrated GPU and an AMD discrete GPU.
```
➜ ~ xrandr --listproviders
Providers: number : 2
Provider 0: id: 0x70 cap: 0x9, Source
Hi Daniel,
how does i915/GEM lock dma_resv objects for CPU page faulting?
I've been wondering if a good bunch of ttm_bo_vm_reserve() wouldn't be
better placed in the common dma_resv.c file.
Regards,
Christian.
___
Intel-gfx mailing list
Intel-gfx@
On Sun, Jun 2, 2019 at 6:52 PM Zhang, Xiong Y wrote:
>
> > Hi,
> >
> > I'm trying to get iGPU passthrough working in a VM running on a Chrome OS
> > "7th Generation (Kaby Lake) Intel Core i5-7Y57 with HD Graphics 615" device.
> > I'm able to pass the iGPU through to the VM and execute the i915 dri
> Hi,
>
> I'm trying to get iGPU passthrough working in a VM running on a Chrome OS
> "7th Generation (Kaby Lake) Intel Core i5-7Y57 with HD Graphics 615" device.
> I'm able to pass the iGPU through to the VM and execute the i915 driver, but
> the driver doesn't succeed in getting the system to th
Hi,
I'm trying to get iGPU passthrough working in a VM running on a Chrome
OS "7th Generation (Kaby Lake) Intel Core i5-7Y57 with HD Graphics
615" device. I'm able to pass the iGPU through to the VM and execute
the i915 driver, but the driver doesn't succeed in getting the system
to the point wher
Hi Paul,
The use of symbolic links was deprecated exactly to avoid this kind of situation
you faced when blindly replacing dmc 1.26 per 1.27. We never tested that kernel
version with that DMC so we don't know what to expect.
As the regular end users concerns they should never touch any firmware
I am trying to setup Intel's new open-source iHD driver on a Yocto
environment.
https://software.intel.com/en-us/articles/build-and-debug-open-source-media-stack
The documentation says that skl_dmc_ver1_27.bin is required. Their
documentation updates a symlink (skl_dmc_ver1.bin), as if the kernel
On 17-12-17 22:45:13, Gabriel Krisman Bertazi wrote:
Hi Ben and list folks,
I've been investigating some CI failures with the kms_ccs testcase in
the GLK hardware. The original bug is linked below, but there are other
more basic tests failing when trying CCS on pipe C.
https://bugs.freedeskto
On Sun, Dec 17, 2017 at 10:45:13PM -0200, Gabriel Krisman Bertazi wrote:
>
> Hi Ben and list folks,
>
> I've been investigating some CI failures with the kms_ccs testcase in
> the GLK hardware. The original bug is linked below, but there are other
> more basic tests failing when trying CCS on pi
Hi Ben and list folks,
I've been investigating some CI failures with the kms_ccs testcase in
the GLK hardware. The original bug is linked below, but there are other
more basic tests failing when trying CCS on pipe C.
https://bugs.freedesktop.org/show_bug.cgi?id=104096
The reason for the failur
Hi, I am a newbie on the intel-gfx and tries to use the shared virtual memory
which is mentioned in several intel documents (vt-d and Intel-gfx-prm)supported
in the opencl library to share address space betweenCPU and intel integrated
GPU.As far as I know, shared virtual memory is supported as a
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Thursday, January 07, 2016 3:43 PM
>
> On Thu, Jan 07, 2016 at 05:35:13AM +, Gong, Zhipeng wrote:
> > Hello
> >
> > Intel MOCS/WA registers got initialized when LR context of RCS ring is
> created.
>
Hello
Intel MOCS/WA registers got initialized when LR context of RCS ring is created.
When one context uses only VCS ring and LR context of RCS ring is not created,
what will the value of Intel MOCS/WA registers be? Undefined?
___
Intel-gfx mailing lis
On Thu, Apr 30, 2015 at 06:19:06PM +, Meng, David wrote:
>Hi Team:
>
>Greetings.
>
>
>
>I am new to send a question to this email list. I am working on GPU
>driver for VMware ESXi kernel running on BDW system. The driver is based
>on the OTC graphics driver which is
Hi Team:
Greetings.
I am new to send a question to this email list. I am working on GPU driver for
VMware ESXi kernel running on BDW system. The driver is based on the OTC
graphics driver which is released with Linux 3.19.3.
When I tested the driver using the test case gem_alive from intel-gpu
.@samsung.com
>> Cc: intel-gfx@lists.freedesktop.org
>> Subject: Re: [Intel-gfx] Question regarding forcewake in i915
>>
>> On 22/12/14 12:26, 유재용 wrote:
>>> Hello intel-gfx,
>>>
>>> I'm reading i915 gpu drivers and find myself quite hard to under
Thanks a lot. It is very helpful. Couple of follow-up questions below.
> -Original Message-
> From: Dave Gordon [mailto:david.s.gor...@intel.com]
> Sent: Wednesday, January 07, 2015 12:19 AM
> To: jaeyong@samsung.com
> Cc: intel-gfx@lists.freedesktop.org
> Subje
On 22/12/14 12:26, 유재용 wrote:
> Hello intel-gfx,
>
> I'm reading i915 gpu drivers and find myself quite hard to understand
> about forcewake concepts.
>
> I understand that it is something with the energy efficiency so related
> to ACPI. And it looks like forcewake is working as a pair (get and p
Hello intel-gfx,
I'm reading i915 gpu drivers and find myself quite hard to understand about
forcewake concepts.
I understand that it is something with the energy efficiency so related to
ACPI. And it looks like forcewake is working as a pair (get and put).
In the "get" part, what it first does i
Hello,
I am sorry for asking specific question about power consumption
on baytrail-M platform.
We found the power consumption of baytrail-M graphic is bigger
under Linux(kernel 3.13) than under windows for playing video 1080p.
My question: Is there
On Tue, Feb 25, 2014 at 10:34 AM, Ville Syrjälä
wrote:
>> I am looking at the i915 driver in 3.10 which sets idle_frames to 1
>> (function intel_edp_psr_enable_source in intel_dp.c) when enabling
>> PSR. What does this mean, and what should one observe if idle_frames
>> is set to a higher number?
On Tue, Feb 25, 2014 at 10:06:19AM -0800, Siva Chandra wrote:
> Hi,
>
> I would like to know what "training" and "idle frames" mean wrt PSR. I
> apologize if this is the wrong list for such questions.
Training just refers to the DP link training that may be necessary
after exiting PSR.
>
> I am
@lists.freedesktop.org
Subject: Re: [Intel-gfx] Question about how brightness up/down to call the code
of xf86-video-intel like intel_output_dpms_backlight etc
On Fri, Jul 12, 2013 at 08:53:23AM +, Li, Hao H wrote:
> Hi
>
> When we press the key like brightness up/down from keyboar
On Fri, Jul 12, 2013 at 08:53:23AM +, Li, Hao H wrote:
> Hi
>
> When we press the key like brightness up/down from keyboard, kernel will
> receive the keyevent.
> My question is how the keyevent from kernel call the code of xf86-video-intel
> like intel_output_dpms_backlight etc to adjust th
Hi
When we press the key like brightness up/down from keyboard, kernel will
receive the keyevent.
My question is how the keyevent from kernel call the code of xf86-video-intel
like intel_output_dpms_backlight etc to adjust the backlight.
Can someone help to explain more details about it?
Thank
Here is a system for example:
Pentium M processor with 32bits address pins,
Intel 440FX chip,
A PCI device with 32bits address pins.
See the ascii picture below.
Assume that the pci device BAR0 is in memory space, 10Mb in size.
After initialization, BAR0 is assigned an address. I don't
un
> Please forgive me if I post my questions to the wrong place, but I don't know
> where else to post.
Probably dri-de...@lists.freedesktop.org might get more non-Intel people.
> I am new to graphic programming. I found that the Linux graphic architecture
> is very complicated. Luckily I found an
Hi all,
Please forgive me if I post my questions to the wrong place, but I don't know
where else to post.
I am new to graphic programming. I found that the Linux graphic architecture
is very complicated. Luckily I found an "Intel Graphics Stack" on 01.org. There
are 8 components in the 2013Q1 sta
At 2013-01-23 13:02, Daniel Vetter wrote:
Maybe the easiest way is to shoot for a
board with 2x HDMI or DP in total, since you can always use a passive
HDMI->DP dongle to drive the DP port in HDMI mode. But even just
finding boards with 3x digital output seems to be hard.
So, just to make sure
tbh I have no idea whether you can actually by hw which supports 2x DP
out, it's certainly no common. The description was only from the hw
pov. It might be that the 2x thunderbolt works, otoh I've never tested
thunderbolt so I have no idea how well (or if at all) the pcie + dp
muxing works with our
At 2013-01-22 09:43, Daniel Vetter wrote:
For your 3 monitor required a decen ivb based board should be good
enough, as long as you keep the restriction in mind that 2 of them
need to have the same dotclock (which in practice boils down to either
2x DP monitors or 2x identical monitors with the s
At 2013-01-22 07:36, Ian Pilcher wrote:
On 01/21/2013 06:05 PM, Csillag wrote:
But now, thanks to GIGABYTE's PR about Thunderbolt and 4K (
http://www.gigabyte.com/MicroSite/323/4k.html ), I realized that it
might be possible to use a "DisplayPort to Dual-DisplayPort Adapter" to
split a DisplayPo
On Tue, Jan 22, 2013 at 7:36 AM, Ian Pilcher wrote:
> On 01/21/2013 06:05 PM, Csillag wrote:
>> But now, thanks to GIGABYTE's PR about Thunderbolt and 4K (
>> http://www.gigabyte.com/MicroSite/323/4k.html ), I realized that it
>> might be possible to use a "DisplayPort to Dual-DisplayPort Adapter"
On 01/21/2013 06:05 PM, Csillag wrote:
> But now, thanks to GIGABYTE's PR about Thunderbolt and 4K (
> http://www.gigabyte.com/MicroSite/323/4k.html ), I realized that it
> might be possible to use a "DisplayPort to Dual-DisplayPort Adapter" to
> split a DisplayPort 1.1 output into two channels, an
Hi,
I am deciding the components on a new computer, and one of the most
important requirements is to have support for three monitors, under
GNU/Linux, with open-source drivers.
I know I can do this with AMD Eyefinity, but now I am trying to build an
Intel-based system.
So, can I do this with the
This is great news. I will watch for the udpate.
Charlie
-Original Message-
From: Xiang, Haihao [mailto:haihao.xi...@intel.com]
Sent: Wednesday, September 26, 2012 9:17 PM
To: Charlie Good
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] Question regarding libva encoding
The support for Main/High profile has been done in the staging branch.
We will merge the interfaces for Main/High profile back into the master
branch.
Thanks
Haihao
> Hello my name is Charlie Good and I am the CTO of Wowza Media System.
> We are the authors of Wowza Media Server. Our product in
Hello my name is Charlie Good and I am the CTO of Wowza Media System. We are
the authors of Wowza Media Server. Our product includes a transcoder for
transcoding incoming streams to adaptive bitrate stream sets. We are only using
the AVC/H.264 encoder at this time. We are looking to use libva fo
Hi, All
One question puzzle me is the update point of some register like DSPASURF
(7019Ch), in Bspec it mentioned that it is at "Start of vertical blank or pipe
disbaled".
So it means that if pipe disabled, the writing of DSPASURF have effect on
hardware status once this writing complete and we
To reduce contrast to 75%, you can use
xrandr --output --gamma 0.75:0.75:0.75
Ok, sorry, gamma is not the same as contrast. But gamma can be used to
achieve similar shifts of the relation of dark to bright colors, so it
might be suitable to get the desired effect here.
Greets,
Kiste
Hi! I'm no real expert, but I dare to guess some answers anyway...
Will there ever be a Control Center like the Windows version ?
Probably not. It is not the job of a driver to communicate with the
user. GUIs are made by other people. Your desktop environment could
provide such a tool.
To
Hello,
I know that mostly this list is used for development though I wanted to know
if there is any option to set values for thing as Gamma, Contrast and
Brightness on the driver or if there is any way they can be set ?
Will there ever be a Control Center like the Windows version ?
The questi
I went form 3.1.0 to 3.2.0 (fedora rawhid RPMs).
I will pull the source RPMs and figure out what git commit they
are are based off of and then try a bisect.
On Tue, Nov 01, 2011 at 08:37:42AM -0200, Eugeni Dodonov wrote:
> On Mon, Oct 31, 2011 at 23:42, James R. Leu wrote:
> I do not use hi
On Mon, Oct 31, 2011 at 23:42, James R. Leu wrote:
> I do not use hibernate, I have my lid close set to suspend.
> Up until I upgraded to 3.2.0 kernel (rawhide) my suspend/wakup cycles
> had been stable.
>
>From what version have you upgraded?
Could you try to bisect it, to find the commit whic
I do not use hibernate, I have my lid close set to suspend.
Up until I upgraded to 3.2.0 kernel (rawhide) my suspend/wakup cycles
had been stable.
On Sat, Oct 29, 2011 at 01:45:31AM +1100, Bojan Smojver wrote:
> --- Original message ---
> >From: Nicolas Kalkhof
>
> >No Idea if all of the
Hi,
good question. I don't use hibernate so I can't say anything to that. :-(
Regards
Nic
-Ursprüngliche Nachricht-
Von: "Bojan Smojver"
Gesendet: Oct 28, 2011 4:45:31 PM
An: nkalk...@web.de
Betreff: Re: [Intel-gfx] Question about how to troubleshoot sandybri
--- Original message ---
From: Nicolas Kalkhof
No Idea if all of these params are effective but this works for me on my
lenovo t420 with a i7 2620M.
Out of curiosity, unrelated to this problem and because you have similar
hardware to mine - do repeated hibernate/thaw cycles cause th
fbc=1
i915.lvds_downclock=1
No Idea if all of these params are effective but this works for me on my lenovo
t420 with a i7 2620M.
Regards,
Nic
-Ursprüngliche Nachricht-
Von: "James R. Leu"
Gesendet: Oct 24, 2011 6:12:21 AM
An: intel-gfx@lists.freedesktop.org
Betreff:
On Tue, Oct 25, 2011 at 09:15:58AM +0200, Jesse Barnes wrote:
> On Mon, 24 Oct 2011 19:43:44 -0700
> Kenneth Graunke wrote:
>
> > On 10/24/2011 05:58 PM, James R. Leu wrote:
> > > Debug output attached
> >
> > You're in luck! I fixed this GPU hang today in Mesa master.
> >
> > This commit fixe
On Mon, 24 Oct 2011 19:43:44 -0700
Kenneth Graunke wrote:
> On 10/24/2011 05:58 PM, James R. Leu wrote:
> > Debug output attached
>
> You're in luck! I fixed this GPU hang today in Mesa master.
>
> This commit fixes the hang:
>
> commit 3cc0a7be23ab603ed40d602595f673a44e079885
> Author: Kenne
On 10/24/2011 05:58 PM, James R. Leu wrote:
> Debug output attached
You're in luck! I fixed this GPU hang today in Mesa master.
This commit fixes the hang:
commit 3cc0a7be23ab603ed40d602595f673a44e079885
Author: Kenneth Graunke
Date: Fri Oct 21 01:03:37 2011 -0700
i965: Apply post-sync
On Sun, Oct 23, 2011 at 11:12:21PM -0500, James R. Leu wrote:
> I'm running wow in wine on 64 bit fedora rawhide on a dell vostro 3550
> (i5 with integrated GPU).
>
> I'm reliably able to produce 2 types of crashes:
> - wow freezes, but I can get to text console, in this case I'm able to
> grab
Hello,
I'm running wow in wine on 64 bit fedora rawhide on a dell vostro 3550
(i5 with integrated GPU).
I'm reliably able to produce 2 types of crashes:
- wow freezes, but I can get to text console, in this case I'm able to
grab a kernel stack trace (below) prior to seeing the normal
[drm:i9
Hello!
Can you give me some info on the development status of h.264 hardware
decoding support on the Intel G/GM45 platform in linux drivers? Is any
effort being done in including this feature in the upcomig drivers and when
(if) we can expect this to get implemented.
Thank you!
__
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