Re: [Intel-gfx] [RFC PATCH] drm/i915/dp: Dither down to 6bpc if it makes the mode fit

2011-07-22 Thread Jesse Barnes
On Wed, 20 Jul 2011 11:08:51 -0400 Adam Jackson wrote: > Some active adaptors (VGA usually) only have two lanes at 2.7GHz. > That's a maximum pixel clock of 144MHz at 8bpc, but 192MHz at 6bpc. > > Signed-off-by: Adam Jackson > --- > > Patch is against drm-intel-next. Not even compile-tested y

[Intel-gfx] [RFC PATCH] drm/i915/dp: Dither down to 6bpc if it makes the mode fit

2011-07-20 Thread Adam Jackson
Some active adaptors (VGA usually) only have two lanes at 2.7GHz. That's a maximum pixel clock of 144MHz at 8bpc, but 192MHz at 6bpc. Signed-off-by: Adam Jackson --- Patch is against drm-intel-next. Not even compile-tested yet, just looking for feedback. I _think_ the pre-gen5 path is right, t