Re: [Intel-gfx] [PATCH 4/4] drm/i915/bxt: Support BXT in SSEU device status dump

2015-04-09 Thread shuang . he
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang...@intel.com) Task id: 6131 -Summary- Platform Delta drm-intel-nightly Series Applied PNV

[Intel-gfx] [PATCH 4/4] drm/i915/bxt: Support BXT in SSEU device status dump

2015-04-03 Thread jeff . mcgee
From: Jeff McGee Modify the Gen9 SSEU device status logic to support Broxton. Broxton reuses the Skylake power gate acknowledgment registers but has at most 1 slice and 3 subslices. Broxton supports subslice power gating within its single slice. Signed-off-by: Jeff McGee --- drivers/gpu/drm/i9