Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 5863
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV -7 278/278
On Fri, Feb 27, 2015 at 10:22:32AM -0800, jeff.mc...@intel.com wrote:
> From: Jeff McGee
>
> Collect the currently enabled counts of slice, subslice, and
> execution units using the power gate control ack message
> registers specific to Cherryview.
>
> Slice/subslice/EU info and hardware status
From: Jeff McGee
Collect the currently enabled counts of slice, subslice, and
execution units using the power gate control ack message
registers specific to Cherryview.
Slice/subslice/EU info and hardware status can now be
determined for CHV, so allow the debugfs SSEU status dump
to proceed for
