On Thu, Oct 22, 2020 at 03:36:43PM -0700, Matt Roper wrote:
On Wed, Oct 21, 2020 at 01:20:29AM -0700, Lucas De Marchi wrote:
DG1 has one more combo phy port, no TC and all irq handling goes through
SDE, like for MCC.
v2: Also change intel_hpd_pin_default() to include DG1 mapping
v3, v4: Rebase
On Wed, Oct 21, 2020 at 01:20:29AM -0700, Lucas De Marchi wrote:
> DG1 has one more combo phy port, no TC and all irq handling goes through
> SDE, like for MCC.
>
> v2: Also change intel_hpd_pin_default() to include DG1 mapping
> v3, v4: Rebase on hpd refactor
>
> Cc: Ville Syrjälä
> Cc: Anshuma
DG1 has one more combo phy port, no TC and all irq handling goes through
SDE, like for MCC.
v2: Also change intel_hpd_pin_default() to include DG1 mapping
v3, v4: Rebase on hpd refactor
Cc: Ville Syrjälä
Cc: Anshuman Gupta
Cc: José Roberto de Souza
Cc: Imre Deak
Signed-off-by: Lucas De Marchi
