[Intel-gfx] [PATCH 1/2] drm/i915: add i915_reset_count

2013-11-12 Thread Mika Kuoppala
reset_counter will be incremented twice per successful reset. Odd values mean reset is in progress and even values mean that reset has completed. Reset status ioctl introduced in following commit needs to deliver global reset count to userspace so use reset_counter to derive the actual reset count

[Intel-gfx] [PATCH 1/2] drm/i915: add i915_reset_count

2013-11-12 Thread Mika Kuoppala
reset_counter will be incremented twice per successful reset. Odd values mean reset is in progress and even values mean that reset has completed. Reset status ioctl introduced in following commit needs to deliver global reset count to userspace so use reset_counter to derive the actual reset count

Re: [Intel-gfx] [PATCH 1/2] drm/i915: add i915_reset_count

2013-11-08 Thread Damien Lespiau
On Wed, Oct 30, 2013 at 03:44:15PM +0200, Mika Kuoppala wrote: > reset_counter will be incremented twice per successful > reset. Odd values mean reset is in progress and even values > mean that reset has completed. Could you also update the lengthy comment above reset_counter. It looks quite stale

[Intel-gfx] [PATCH 1/2] drm/i915: add i915_reset_count

2013-10-30 Thread Mika Kuoppala
reset_counter will be incremented twice per successful reset. Odd values mean reset is in progress and even values mean that reset has completed. Reset status ioctl introduced in following commit needs to deliver global reset count to userspace so use reset_counter to derive the actual reset count