On Wed, Oct 30, 2013 at 03:44:15PM +0200, Mika Kuoppala wrote:
> reset_counter will be incremented twice per successful
> reset. Odd values mean reset is in progress and even values
> mean that reset has completed.
Could you also update the lengthy comment above reset_counter. It looks
quite stale. There's also a:
* Note that the code relies on
* I915_WEDGED & I915_RESET_IN_PROGRESS_FLAG
* being true.
which is not true anymore with this commit. i915_reset_in_progress() has
been modified to take the I915_WEDGED change into account, so we should
be safe, I believe.
With this, you can add a:
Reviewed-by: Damien Lespiau <damien.lesp...@intel.com>
--
Damien
>
> Reset status ioctl introduced in following commit
> needs to deliver global reset count to userspace so
> use reset_counter to derive the actual reset count
> for the gpu
>
> Note that reset in progress is enough to increment
> the counter.
>
> v2: wedged equals reset in progress (Daniel Vetter)
>
> Signed-off-by: Mika Kuoppala <mika.kuopp...@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 11 ++++++++---
> drivers/gpu/drm/i915/i915_irq.c | 2 +-
> 2 files changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 0a886fd..9fd716d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1082,7 +1082,7 @@ struct i915_gpu_error {
> * being true.
> */
> #define I915_RESET_IN_PROGRESS_FLAG 1
> -#define I915_WEDGED 0xffffffff
> +#define I915_WEDGED (1 << 31)
>
> /**
> * Waitqueue to signal when the reset has completed. Used by clients
> @@ -2031,12 +2031,17 @@ int __must_check i915_gem_check_wedge(struct
> i915_gpu_error *error,
> static inline bool i915_reset_in_progress(struct i915_gpu_error *error)
> {
> return unlikely(atomic_read(&error->reset_counter)
> - & I915_RESET_IN_PROGRESS_FLAG);
> + & (I915_RESET_IN_PROGRESS_FLAG | I915_WEDGED));
> }
>
> static inline bool i915_terminally_wedged(struct i915_gpu_error *error)
> {
> - return atomic_read(&error->reset_counter) == I915_WEDGED;
> + return atomic_read(&error->reset_counter) & I915_WEDGED;
> +}
> +
> +static inline u32 i915_reset_count(struct i915_gpu_error *error)
> +{
> + return ((atomic_read(&error->reset_counter) & ~I915_WEDGED) + 1) / 2;
> }
>
> void i915_gem_reset(struct drm_device *dev);
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index a228176..80800d2 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1783,7 +1783,7 @@ static void i915_error_work_func(struct work_struct
> *work)
> kobject_uevent_env(&dev->primary->kdev.kobj,
> KOBJ_CHANGE, reset_done_event);
> } else {
> - atomic_set(&error->reset_counter, I915_WEDGED);
> + atomic_set_mask(I915_WEDGED, &error->reset_counter);
> }
>
> /*
> --
> 1.7.9.5
>
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