Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 5585
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV 353/353
On Thu, Jan 15, 2015 at 05:05:30PM +, Tvrtko Ursulin wrote:
>
> On 01/15/2015 04:54 PM, Ben Widawsky wrote:
> >On Thu, Jan 15, 2015 at 11:21:30AM +, Tvrtko Ursulin wrote:
> >>From: Tvrtko Ursulin
> >>
> >>This eliminates six needless spin lock/unlock pairs when writing out ELSP.
> >>Apar
On 01/15/2015 04:54 PM, Ben Widawsky wrote:
On Thu, Jan 15, 2015 at 11:21:30AM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
This eliminates six needless spin lock/unlock pairs when writing out ELSP. Apart
from tidier code main benefit is between 0.51% and 0.73% speedup on some OGL
tests
On Thu, Jan 15, 2015 at 11:21:30AM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> This eliminates six needless spin lock/unlock pairs when writing out ELSP.
> Apart
> from tidier code main benefit is between 0.51% and 0.73% speedup on some OGL
> tests under CHV (bench_OglBatch4 bench_Og
From: Tvrtko Ursulin
This eliminates six needless spin lock/unlock pairs when writing out ELSP. Apart
from tidier code main benefit is between 0.51% and 0.73% speedup on some OGL
tests under CHV (bench_OglBatch4 bench_OglDeferred respectively).
Kindly benchmarked by Ben Widawsky.
Signed-off-by:
