Re: [Intel-gfx] [PATCH] drm/i915: Apply post-sync write for pipe control invalidates

2012-08-14 Thread Daniel Vetter
jk Sat, Aug 11, 2012 at 12:20:19PM -0700, Ben Widawsky wrote: > On Fri, 10 Aug 2012 10:18:10 +0100 > Chris Wilson wrote: > > > When invalidating the TLBs it is documentated as requiring a post-sync > > write. Failure to do so seems to result in a GPU hang. > > > > Exposure to this hang on IVB se

Re: [Intel-gfx] [PATCH] drm/i915: Apply post-sync write for pipe control invalidates

2012-08-11 Thread Daniel Vetter
On Sat, Aug 11, 2012 at 12:20:19PM -0700, Ben Widawsky wrote: > On Fri, 10 Aug 2012 10:18:10 +0100 > Chris Wilson wrote: > > > When invalidating the TLBs it is documentated as requiring a post-sync > > write. Failure to do so seems to result in a GPU hang. > > > > Exposure to this hang on IVB se

Re: [Intel-gfx] [PATCH] drm/i915: Apply post-sync write for pipe control invalidates

2012-08-11 Thread Ben Widawsky
On Fri, 10 Aug 2012 10:18:10 +0100 Chris Wilson wrote: > When invalidating the TLBs it is documentated as requiring a post-sync > write. Failure to do so seems to result in a GPU hang. > > Exposure to this hang on IVB seems to be a result of removing the > extra stalls required for SNB pipecontr

Re: [Intel-gfx] [PATCH] drm/i915: Apply post-sync write for pipe control invalidates

2012-08-10 Thread Jani Nikula
On Fri, 10 Aug 2012, Chris Wilson wrote: > On Fri, 10 Aug 2012 12:57:59 +0300, Jani Nikula > wrote: >> On Fri, 10 Aug 2012, Chris Wilson wrote: >> > When invalidating the TLBs it is documentated as requiring a post-sync >> > write. Failure to do so seems to result in a GPU hang. >> > >> > Expos

Re: [Intel-gfx] [PATCH] drm/i915: Apply post-sync write for pipe control invalidates

2012-08-10 Thread Chris Wilson
On Fri, 10 Aug 2012 11:07:47 +0100, Chris Wilson wrote: > On Fri, 10 Aug 2012 12:57:59 +0300, Jani Nikula > wrote: > > On Fri, 10 Aug 2012, Chris Wilson wrote: > > > When invalidating the TLBs it is documentated as requiring a post-sync > > > write. Failure to do so seems to result in a GPU ha

Re: [Intel-gfx] [PATCH] drm/i915: Apply post-sync write for pipe control invalidates

2012-08-10 Thread Chris Wilson
On Fri, 10 Aug 2012 12:57:59 +0300, Jani Nikula wrote: > On Fri, 10 Aug 2012, Chris Wilson wrote: > > When invalidating the TLBs it is documentated as requiring a post-sync > > write. Failure to do so seems to result in a GPU hang. > > > > Exposure to this hang on IVB seems to be a result of rem

Re: [Intel-gfx] [PATCH] drm/i915: Apply post-sync write for pipe control invalidates

2012-08-10 Thread Jani Nikula
On Fri, 10 Aug 2012, Chris Wilson wrote: > When invalidating the TLBs it is documentated as requiring a post-sync > write. Failure to do so seems to result in a GPU hang. > > Exposure to this hang on IVB seems to be a result of removing the extra > stalls required for SNB pipecontrol workarounds:

[Intel-gfx] [PATCH] drm/i915: Apply post-sync write for pipe control invalidates

2012-08-10 Thread Chris Wilson
When invalidating the TLBs it is documentated as requiring a post-sync write. Failure to do so seems to result in a GPU hang. Exposure to this hang on IVB seems to be a result of removing the extra stalls required for SNB pipecontrol workarounds: commit 6c6cf5aa9c583478b19e23149feaa92d01fb8c2d Au

[Intel-gfx] [PATCH] drm/i915: Apply post-sync write for pipe control invalidates

2012-08-10 Thread Chris Wilson
When invalidating the TLBs it is documentated as requiring a post-sync write. Failure to do so seems to result in a GPU hang. Reported-by: yex.t...@intel.com Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53322 Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_ringbuffer.c | 3