On Thu, Jan 29, 2015 at 09:27:14AM +0530, sonika wrote:
>
> On Wednesday 28 January 2015 09:32 PM, Daniel Vetter wrote:
> >On Thu, Jan 22, 2015 at 02:30:54PM +0530, Sonika Jindal wrote:
> >>Mainly taking care of some register offsets, otherwise things are similar to
> >>hsw. Also, programming ddi
On Wednesday 28 January 2015 09:32 PM, Daniel Vetter wrote:
On Thu, Jan 22, 2015 at 02:30:54PM +0530, Sonika Jindal wrote:
Mainly taking care of some register offsets, otherwise things are similar to
hsw. Also, programming ddi aux to use hardcoded values for psr data select.
v2: introduce EDP
On Thu, Jan 22, 2015 at 02:30:54PM +0530, Sonika Jindal wrote:
> Mainly taking care of some register offsets, otherwise things are similar to
> hsw. Also, programming ddi aux to use hardcoded values for psr data select.
>
> v2: introduce EDP_PSR_AUX_BASE macro (Chris)
> v3: Moving to HW tracking
Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 5623
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV -1 353/353
Mainly taking care of some register offsets, otherwise things are similar to
hsw. Also, programming ddi aux to use hardcoded values for psr data select.
v2: introduce EDP_PSR_AUX_BASE macro (Chris)
v3: Moving to HW tracking for SKL+ platforms, so activating source psr during
psr_enabling and then
On Wed, Jan 21, 2015 at 02:25:23PM +0530, sonika wrote:
>
> On Wednesday 21 January 2015 02:07 PM, Daniel Vetter wrote:
> >On Tue, Jan 20, 2015 at 02:01:25PM -0800, Rodrigo Vivi wrote:
> >>Hi Sonika, for the login screen my guess is that blinking cursor
> >>waiting for password blocks psr entry.
>
On Wednesday 21 January 2015 02:07 PM, Daniel Vetter wrote:
On Tue, Jan 20, 2015 at 02:01:25PM -0800, Rodrigo Vivi wrote:
Hi Sonika, for the login screen my guess is that blinking cursor
waiting for password blocks psr entry.
For test cases I started the test case enhancement but my psr work i
On Tue, Jan 20, 2015 at 02:01:25PM -0800, Rodrigo Vivi wrote:
> Hi Sonika, for the login screen my guess is that blinking cursor
> waiting for password blocks psr entry.
>
> For test cases I started the test case enhancement but my psr work is
> paused this month for bug maintainance. Any help is
Of Daniel Vetter
Sent: Tuesday, January 20, 2015 3:20 PM
To: Jindal, Sonika
Cc: Daniel Vetter; intel-gfx; Vivi, Rodrigo
Subject: Re: [Intel-gfx] [PATCH] drm/i915/skl: Enabling PSR on Skylake
On Mon, Jan 19, 2015 at 05:10:58PM +0530, sonika wrote:
On Saturday 17 January 2015 09:54 AM, Daniel Vetter
ncing the psr testcase?
> -Sonika
>
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
> Sent: Tuesday, January 20, 2015 3:20 PM
> To: Jindal, Sonika
> Cc: Daniel Vetter; intel-gfx; Vivi, Rodrigo
> Subject: Re: [Intel-gf
] [PATCH] drm/i915/skl: Enabling PSR on Skylake
On Mon, Jan 19, 2015 at 05:10:58PM +0530, sonika wrote:
>
> On Saturday 17 January 2015 09:54 AM, Daniel Vetter wrote:
> >On Fri, Jan 16, 2015 at 02:07:26PM +0530, Sonika Jindal wrote:
> >>Mainly taking care of some register offsets,
On Mon, Jan 19, 2015 at 05:10:58PM +0530, sonika wrote:
>
> On Saturday 17 January 2015 09:54 AM, Daniel Vetter wrote:
> >On Fri, Jan 16, 2015 at 02:07:26PM +0530, Sonika Jindal wrote:
> >>Mainly taking care of some register offsets, otherwise things are similar to
> >>hsw. Also, programming ddi a
On Saturday 17 January 2015 09:54 AM, Daniel Vetter wrote:
On Fri, Jan 16, 2015 at 02:07:26PM +0530, Sonika Jindal wrote:
Mainly taking care of some register offsets, otherwise things are similar to
hsw. Also, programming ddi aux to use hardcoded values for psr data select.
v2: introduce EDP_
On Fri, Jan 16, 2015 at 02:07:26PM +0530, Sonika Jindal wrote:
> Mainly taking care of some register offsets, otherwise things are similar to
> hsw. Also, programming ddi aux to use hardcoded values for psr data select.
>
> v2: introduce EDP_PSR_AUX_BASE macro (Chris)
> v3: Moving to HW tracking f
Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 5591
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV -1 353/353
Mainly taking care of some register offsets, otherwise things are similar to
hsw. Also, programming ddi aux to use hardcoded values for psr data select.
v2: introduce EDP_PSR_AUX_BASE macro (Chris)
v3: Moving to HW tracking for SKL+ platforms, so activating source psr during
psr_enabling and then
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