Re: [Intel-gfx] [PATCH] drm/i915/bdw: 3D_CHICKEN3 has write mask bits

2014-07-07 Thread Daniel Vetter
On Mon, Jul 07, 2014 at 04:06:02PM +0300, Mika Kuoppala wrote: > michel.thie...@intel.com writes: > > > From: Michel Thierry > > > > The workaround to limit SDE poly depth FIFO to 2 is not applied because > > 3D Chicken-3 mask bit is not set. > > > > WaLimitSizeOfSDEPolyFifo is only for BDW-A and

Re: [Intel-gfx] [PATCH] drm/i915/bdw: 3D_CHICKEN3 has write mask bits

2014-07-07 Thread Mika Kuoppala
michel.thie...@intel.com writes: > From: Michel Thierry > > The workaround to limit SDE poly depth FIFO to 2 is not applied because > 3D Chicken-3 mask bit is not set. > > WaLimitSizeOfSDEPolyFifo is only for BDW-A and could be removed. > > Signed-off-by: Michel Thierry Reviewed-by: Mika Kuoppal

[Intel-gfx] [PATCH] drm/i915/bdw: 3D_CHICKEN3 has write mask bits

2014-07-07 Thread michel . thierry
From: Michel Thierry The workaround to limit SDE poly depth FIFO to 2 is not applied because 3D Chicken-3 mask bit is not set. WaLimitSizeOfSDEPolyFifo is only for BDW-A and could be removed. Signed-off-by: Michel Thierry --- drivers/gpu/drm/i915/intel_pm.c | 2 +- 1 file changed, 1 insertion