Fix all typos in files under drm/i915/soc reported by codespell tool.
Signed-off-by: Nitin Gote
---
drivers/gpu/drm/i915/soc/intel_pch.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/soc/intel_pch.c
b/drivers/gpu/drm/i915/soc/intel_pch.c
index 842db43e
Fix all typos in files under drm/i915 reported by codespell tool.
v2: Fix commenting style.
v3: "in case" should be capitalized and fix
comment style.
Signed-off-by: Nitin Gote
---
drivers/gpu/drm/i915/i915_driver.c | 2 +-
drivers/gpu/drm/i915/i915_gem.c | 6 +++--
Fix all typos in files under drm/i915/display reported by codespell tool.
v2:
- Include british and american spelling, as those are
not typos.
- Fix commenting style.
v3: Fix "In case" wrongly capitalized and
also fix comment style.
Signed-off-by: Nitin Gote
---
drivers/gpu/drm/i
Fix all typos in files under drm/i915/selftests reported by codespell tool.
v2: Fix commenting style
Signed-off-by: Nitin Gote
---
drivers/gpu/drm/i915/selftests/i915_gem.c | 2 +-
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 21 ---
drivers/gpu/drm/i915/selftests/i915_
Fix all typos in files under drm/i915/pxp reported by codespell tool.
Signed-off-by: Nitin Gote
---
drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h | 2 +-
drivers/gpu/drm/i915/pxp/intel_pxp_types.h| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/g
Fix all typos in files under drm/i915/gem reported by codespell tool.
v2: Codespell won't catch it, but it should be
"user defined" and not "use defined".
Signed-off-by: Nitin Gote
---
drivers/gpu/drm/i915/gem/i915_gem_context.c| 6 +++---
drivers/gpu/drm/i915/gem/i915_gem_context_
Fix all typos in files under drm/i915/gvt reported by codespell tool.
v2: Correct comment styling.
Signed-off-by: Nitin Gote
---
drivers/gpu/drm/i915/gvt/cmd_parser.c | 15 ---
drivers/gpu/drm/i915/gvt/dmabuf.c | 2 +-
drivers/gpu/drm/i915/gvt/edid.c | 2 +-
drive
Fix all typos in files under drm/i915/gt reported by codespell tool.
v2: Fix grammar mistake in comment.
v3: Correct typo in commit log.
Signed-off-by: Nitin Gote
---
drivers/gpu/drm/i915/gt/gen2_engine_cs.c | 2 +-
drivers/gpu/drm/i915/gt/intel_engine_cs.c| 8 ---
Fix all typos in i915 reported by codespell tool.
v2: Fix the commenting style and grammar mistakes
in comment.
v3: Rebase and resolve the conflicts.
v4: Fix few more incorrect comments and it's
commenting style.
Nitin Gote (8):
drm/i915/gt: fix typos in i915/gt files.
drm/i915/gvt
On Sat, 2025-01-18 at 01:07 +0200, Ville Syrjälä wrote:
> On Fri, Jan 17, 2025 at 10:20:17PM +0200, Ville Syrjälä wrote:
> > On Thu, Jan 09, 2025 at 09:31:37AM +0200, Jouni Högander wrote:
> > > Now as we have correct PSR2_MAN_TRK_CTL handling in place we can
> > > allow DSB
> > > usage also when P
== Series Details ==
Series: Add HDMI PLL Algorithm for SNPS/C10PHY (rev4)
URL : https://patchwork.freedesktop.org/series/135397/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15982 -> Patchwork_135397v4
Summary
---
== Series Details ==
Series: Add HDMI PLL Algorithm for SNPS/C10PHY (rev4)
URL : https://patchwork.freedesktop.org/series/135397/
State : warning
== Summary ==
Error: dim checkpatch failed
198a3b53d608 drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for
DG2
-:47: WARNING:FILE_PA
== Series Details ==
Series: Add HDMI PLL Algorithm for SNPS/C10PHY (rev4)
URL : https://patchwork.freedesktop.org/series/135397/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitop
On Fri, 2025-01-17 at 21:22 +0200, Ville Syrjälä wrote:
> On Thu, Jan 09, 2025 at 09:31:33AM +0200, Jouni Högander wrote:
> > Allow writing PSR2_MAN_TRK_CTL using DSB by using
> > intel_de_write_dsb. Do
> > not check intel_dp->psr.lock being held when using DSB. This
> > assertion
> > doesn't make
Try SNPS_PHY HDMI alogorithm, if there are no pre-computed tables.
Also get rid of the helper to get rate for HDMI snps phy, as we no
longer depend only on pre-computed tables.
v2:
-Prefer pre-computed tables over computed values from algorithm. (Jani)
Signed-off-by: Ankit Nautiyal
Reviewed-by:
Try HDMI PLL alogorithm for C10 PHY, if there are no pre-computed tables.
Also get rid of the helpers to get rate for HDMI for C10/20 PHY, as we no
longer depend only on pre-computed tables.
Signed-off-by: Ankit Nautiyal
Reviewed-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_cx0_phy.
The HDMI PLL programming involves pre-calculated values for specific
frequencies and an algorithm to compute values for other frequencies.
While the algorithm itself wasn't part of the driver, tables were
added based on it for known modes.
Some HDMI modes were pruned due to lack of support (for ex
Add support for computing C10 HDMI PLLS using the HDMI PLL algorithm.
v2: Fix styling issues. (Jani)
v3: Rename function to align with filename. (Jani)
v4: Add Bspec reference. (Suraj)
Bspec: 74166
Signed-off-by: Ankit Nautiyal
Reviewed-by: Suraj Kandpal
---
.../drm/i915/display/intel_snps_hdm
Add C10 register bits to be used for computing HDMI PLLs with
algorithm.
v2: Add bspec reference. (Suraj)
Bspec: 74166
Signed-off-by: Ankit Nautiyal
Reviewed-by: Suraj Kandpal
---
.../gpu/drm/i915/display/intel_cx0_phy_regs.h | 24 +++
1 file changed, 24 insertions(+)
diff --g
Add helpers to calculate the necessary parameters for configuring the
HDMI PLL for SNPS MPLLB and C10 PHY.
The pll parameters are computed for desired pixel clock, curve data
and other inputs used for interpolation and finally stored in the
pll_state.
Currently the helper is used to compute PLLs
On 1/10/2025 11:16 AM, Kandpal, Suraj wrote:
Subject: [PATCH 1/5] drm/i915/display: Add support for SNPS PHY HDMI PLL
algorithm for DG2
Add helpers to calculate the necessary parameters for configuring the HDMI
PLL for SNPS MPLLB and C10 PHY.
The pll parameters are computed for desired pixel
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