Hi Imre,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-tip/drm-tip]
url:
https://github.com/intel-lab-lkp/linux/commits/Imre-Deak/drm-dp_mst-Fix-fractional-DSC-bpp-handling/20231024-091920
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
pat
From: Stanislav Lisovskiy
Currently we seem to be using wrong DPCD register for reading
compressed bpps, reading min/max input bpc instead of compressed bpp.
Fix that, so that we now apply min/max compressed bpp limitations we
get from DP Spec Table 2-157 DP v2.0 and/or correspondent DPCD
registe
After the previous patch the BW limits on the whole MST topology will be
checked after computing the state for all the streams in the topology.
Accordingly remove the check during the stream's encoder compute config
step, to prevent failing an atomic commit due to a BW limit, if this can
be resolve
Factor out a helper to clear the pipe update flags, used by a follow-up
patch to modeset an MST topology.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_display.c | 52 ++--
1 file changed, 27 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/disp
Enable DSC decompression for all streams. In particular atm if a sink is
connected to a last branch device that is downstream of the first branch
device connected to the source, decompression is not enabled for it.
Similarly it's not enabled if the sink supports this with the last
branch device pas
At the moment modesetting a stream CRTC will fail if the stream's BW
along with the current BW of all the other streams on the same MST link
is above the total BW of the MST link. Make the BW sharing more dynamic
by trying to reduce the link bpp of one or more streams on the MST link
in this case.
Rename intel_ddi_disable_fec_state() to intel_ddi_disable_fec(), for
symmetry with intel_ddi_enable_fec().
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_ddi.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
Enable/disable the DSC decompression in the sink/branch from the MST
encoder hooks. This prepares for an upcoming patch toggling DSC for each
stream as needed, but for now keeps the current behavior, as DSC is only
enabled for the first MST stream.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i9
Enabling / disabling DSC decompression in the branch device downstream
of the source may reset the while branch device. To avoid this while the
streams are still active, force a modeset on all CRTC/ports connected to
this branch device.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/i
The Synaptics MST hubs expose some sink EDID modes with a reduced HBLANK
period, presumedly to save BW, which the hub expands before forwarding
the stream to the sink. In particular a 4k mode with a standard CVT
HBLANK period is exposed with either a CVT reduced blank RBv1 (80 pixel)
or a non-CVT 5
Disable the FEC ready flag in the sink during a disabling modeset.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_ddi.c | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/dis
Enable passing through DSC streams to the sink in last branch devices.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp.c | 26 -
1 file changed, 25 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i91
Add the missing DSC compression disabling step for MST streams,
similarly to how this is done for SST outputs.
Reviewed-by: Stanislav Lisovskiy
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/dis
Atm the DSC PPS SDP is programmed only if the first stream is compressed
and then it's programmed only for the first stream. This left all other
compressed streams blank. Program the SDP for all streams.
Reviewed-by: Stanislav Lisovskiy
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/
Atm the DSC PPS SDP will stay enabled after enabling and disabling DSC.
This leaves an output blank after switching off DSC on it. Make sure the
SDP is disabled for an uncompressed output.
v2:
- Disable the SDP already during output disabling. (Ville)
Cc: Ville Syrjälä
Reviewed-by: Stanislav Lis
As required by the DP standard wait for the sink to detect the FEC
decode enabling symbol sent by the source.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_ddi.c| 73 +
drivers/gpu/drm/i915/display/intel_ddi.h| 3 +
drivers/gpu/drm/i915/display/inte
Enable DSC using the DSC AUX device stored for this purpose in the
connector. This prepares for a follow-up patch which toggles DSC for
each stream as needed, but for now keeps the current behavior, as DSC is
still only enabled for the first MST stream.
Signed-off-by: Imre Deak
---
drivers/gpu/d
If an MST stream is modeset, its state must be checked along all the
other streams on the same MST link, for instance to resolve a BW
overallocation of a non-sink MST port or to make sure that the FEC is
enabled/disabled the same way for all these streams.
To prepare for that this patch adds all t
Atm, the BW allocated for an MST stream doesn't take into account the
DSC control symbol (EOC) and data alignment overhead on the local (first
downstream) MST link (reflected by the data M/N/TU values) and - besides
the above overheads - the FEC symbol overhead on 8b/10b remote
(after a downstream
Enable FEC in crtc_state, as soon as it's known it will be needed by
DSC. This fixes the calculation of BW allocation overhead, in case DSC
is enabled by falling back to it during the encoder compute config
phase (vs. enabling FEC due to DSC being enabled on other streams).
Signed-off-by: Imre Dea
A follow-up MST patch will need to specify the total BW allocation
overhead, prepare for that here by passing the amount of overhead
to intel_link_compute_m_n(), keeping the existing behavior.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_display.c | 40 +---
dr
A follow-up patch will add up all the overheads on a DP link, where it
makes more sense to specify each overhead factor in terms of the added
overhead amount vs. the reciprocal remainder (of usable BW remaining
after deducting the overhead). Prepare for that here, keeping the
existing behavior.
Si
The Synaptics MST branch deivces support DSC decompression on all their
output ports, provided that they are last branch devices (with their
output ports connected to the sinks). The Thinkpad 40B0 TBT dock for
instance has two such branch devices, a secondary one connected to one
of the output port
Add helpers drivers can use to calculate the BW allocation overhead -
due to SSC, FEC, DSC and data alignment on symbol cycles - and the
channel coding efficiency - due to the 8b/10b, 128b/132b encoding. On
128b/132b links the FEC overhead is part of the coding efficiency, so
not accounted for in t
drm_dp_mst_atomic_check_mgr() should check for BW limitation starting
from sink ports continuing towards the root port, so that drivers can
use the @failing_port returned to resolve a BW overallocation in an
ideal way. For instance from streams A,B,C in a topology A,B going
through @failing_port an
Add a quirk for Synaptics MST hubs, which require a workaround - at leat
on i915 - for some modes, on which the hub applies HBLANK expansion.
These modes will only work by enabling DSC decompression for them, a
follow-up patch will do this in i915.
Cc: Lyude Paul
Signed-off-by: Imre Deak
---
dr
Add the DPCD flag to enable DSC passthrough in a last branch device,
used in a follow-up i915 patch.
Also add a flag to detect HBLANK expansion support in a branch device,
used by a workaround in a follow-up i915 patch.
Cc: Lyude Paul
Signed-off-by: Imre Deak
---
include/drm/display/drm_dp.h |
Factor out a helper to check the atomic state for one MST topology
manager, returning the MST port where the BW limit check has failed.
This will be used in a follow-up patch by the i915 driver to improve the
BW sharing between MST streams.
Cc: Lyude Paul
Cc: dri-de...@lists.freedesktop.org
Revie
Add drm_dp_mst_port_downstream_of_parent() required by the i915
driver in a follow-up patch to resolve a BW overallocation of MST
streams going through a given MST port.
Cc: Lyude Paul
Cc: dri-de...@lists.freedesktop.org
Reviewed-by: Lyude Paul
Signed-off-by: Imre Deak
---
drivers/gpu/drm/disp
From: Ville Syrjälä
The current code does '(bpp << 4) / 16' in the MST PBN
calculation, but that is just the same as 'bpp' so the
DSC codepath achieves absolutely nothing. Fix it up so that
the fractional part of the bpp value is actually used instead
of truncated away. 64*1006 has enough zero ls
This is a new version of patches 12-24 in [1], with the following
changes/additions:
- Fix accounting for FEC/DSC BW overheads (patch 8, 10-12).
- Add a workaround for a Synpatics HBLANK expansion vs. DSC quirk
(patch 6, 7, 20).
- Add support for enabling DSC for each MST stream, required by the
Since the script that collected the list of the expectation files was
bogus and placing test to the flakes list incorrectly, restart the
expectation files with the correct script.
This reduces a lot the number of tests in the flakes list.
Signed-off-by: Helen Koike
Reviewed-by: David Heidelberg
Test re-uses logic form indirect ctx BB selftest.
Co-developed-by: Nirmoy Das
Co-developed-by: Jonathan Cavitt
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 65 --
1 file changed, 47 insertions(+), 18 deletions(-)
diff --git a/driver
From: Jonathan Cavitt
Set copy engine arbitration into round robin mode
for part of Wa_16018031267 / Wa_16018063123 mitigation.
Signed-off-by: Nirmoy Das
Signed-off-by: Jonathan Cavitt
Reviewed-by: Andrzej Hajda
---
drivers/gpu/drm/i915/gt/intel_engine_regs.h | 3 +++
drivers/gpu/drm/i915/gt
Reserve one page in each vm for kernel space to use for things
such as workarounds.
v2: use real memory, do not decrease vm.total
v4: reserve only one page and explain flag
Suggested-by: Chris Wilson
Signed-off-by: Andrzej Hajda
Reviewed-by: Jonathan Cavitt
---
drivers/gpu/drm/i915/gt/gen8_pp
Apply WABB blit for Wa_16018031267 / Wa_16018063123.
v3: drop unused enum definition
v4: move selftest to separate patch, use wa only on BCS0.
Co-developed-by: Nirmoy Das
Co-developed-by: Jonathan Cavitt
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/gt/intel_engine_regs.h | 3 +
dri
v3:
https://lore.kernel.org/r/20231023-wabb-v3-0-1a4fbc632...@intel.com
---
Andrzej Hajda (3):
drm/i915: Reserve some kernel space per vm
drm/i915: Add WABB blit for Wa_16018031267 / Wa_16018063123
drm/i915/gt: add selftest to exercise WABB
Jonathan Cavitt (1):
drm/i915
On 23.10.2023 11:05, Nirmoy Das wrote:
On 10/23/2023 9:41 AM, Andrzej Hajda wrote:
From: Jonathan Cavitt
Apply WABB blit for Wa_16018031267 / Wa_16018063123.
Should this be split into two patches, one that adds per_ctx wabb and
another
where this WA is applied on top of per_ctx BB ?
Th
On Thu, Oct 19 2023 at 12:31, Andrzej Hajda wrote:
> On 13.10.2023 15:15, Thomas Gleixner wrote:
>> It cannot be freed. If that happens then the calling code will have an
>> UAF problem on the tracked item too.
>
> Yes, and I have assumed that debugobjects are created also for detecting
> UAFs.
K
On 10/23/2023 5:24 PM, Andrzej Hajda wrote:
On 23.10.2023 11:55, Nirmoy Das wrote:
Hi Andrzej,
On 10/23/2023 9:41 AM, Andrzej Hajda wrote:
From: Jonathan Cavitt
Set copy engine arbitration into round robin mode
for part of Wa_16018031267 / Wa_16018063123 mitigation.
Signed-off-by: Nirmoy
Quoting Lucas De Marchi (2023-10-20 13:04:48-03:00)
>On Thu, Oct 19, 2023 at 01:04:40PM -0300, Gustavo Sousa wrote:
>>Quoting Lucas De Marchi (2023-10-18 19:24:41-03:00)
>>>With MTL adding PICA between the port and the real phy, the path
>>>add for DG2 stopped being followed and newer platforms are
On 23.10.2023 11:55, Nirmoy Das wrote:
Hi Andrzej,
On 10/23/2023 9:41 AM, Andrzej Hajda wrote:
From: Jonathan Cavitt
Set copy engine arbitration into round robin mode
for part of Wa_16018031267 / Wa_16018063123 mitigation.
Signed-off-by: Nirmoy Das
Signed-off-by: Jonathan Cavitt
Reviewed-b
On Thu, 19 Oct 2023, Umesh Nerlige Ramappa
wrote:
> When the driver unbinds, pmu is unregistered and i915->uabi_engines is
> set to RB_ROOT. Due to this, when i915 PMU tries to stop the engine
> events, it issues a warn_on because engine lookup fails.
>
> All perf hooks are taking care of this us
Do the logical step of first getting from struct hrtimer to struct
i915_pmu, and then from struct i915_pmu to struct drm_i915_private,
instead of hrtimer->i915->pmu.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_pmu.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --
It's tedious to duplicate the container_of() everywhere. Add a helper.
Also do the logical steps of first getting from struct perf_event to
struct i915_pmu, and then from struct i915_pmu to struct
drm_i915_private if needed, instead of perf_event->i915->pmu. Not all
places even need the i915 point
It's tedious to duplicate the container_of() everywhere. Add a helper.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_pmu.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 108b675088
On 23.10.2023 14:23, Nirmoy Das wrote:
On 10/23/2023 9:41 AM, Andrzej Hajda wrote:
From: Jonathan Cavitt
Enable NULL PTE support for vm scratch pages.
The use of NULL PTEs in vm scratch pages requires us to change how
the i915 gem_contexts live selftest perform vm_isolation: instead of
check
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Generally we have writable device parameters in debugfs. No need
> to allow writing module parameters.
>
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 2 +-
> 1 file changed, 1 insertion(+)
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_dp.c | 6 +++---
> drivers/gp
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display_device.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/dr
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display.h| 2 +-
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/dr
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Also make module parameter as non writable.
>
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display.h | 2 +-
> drivers/gpu/drm/i915/i915_params.c | 3 +--
> 2 files changed, 2 insertions(+), 3 dele
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display_device.c | 3 ++-
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/d
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 4
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_display_reset.c | 2 +-
> drivers/gpu/d
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_crt.c| 4 ++--
> drivers/gpu/drm/i915/display/intel_display_params.c | 4
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 4
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++--
> drive
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_display_params.c | 6 ++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/g
On Sun, Oct 22, 2023 at 11:46:22AM +0100, Sean Young wrote:
> Hi Hans,
>
> On Sat, Oct 21, 2023 at 11:08:22AM +0200, Hans de Goede wrote:
> > On 10/19/23 12:51, Uwe Kleine-König wrote:
> > > On Wed, Oct 18, 2023 at 03:57:48PM +0200, Hans de Goede wrote:
> > >> On 10/17/23 11:17, Sean Young wrote:
>
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_backlight.c | 9 +
> drivers/gpu/drm/i915/display/intel_display_params.c | 9 -
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> d
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/hsw_ips.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_display_params.c | 2 ++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/d
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 4
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_display_power.c | 12 ++--
>
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/skl_watermark.c| 5 +++--
> drivers/gpu
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_dpt.c| 6 --
> drivers/gp
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 5 +
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_display_power.c | 2 +-
> drivers/gpu/
Hi Sean,
On 10/22/23 12:46, Sean Young wrote:
> Hi Hans,
>
> On Sat, Oct 21, 2023 at 11:08:22AM +0200, Hans de Goede wrote:
>> On 10/19/23 12:51, Uwe Kleine-König wrote:
>>> On Wed, Oct 18, 2023 at 03:57:48PM +0200, Hans de Goede wrote:
On 10/17/23 11:17, Sean Young wrote:
> Some drivers
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display_params.c | 4
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/d
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 4
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_panel.c | 4 ++--
> drivers/gpu
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 4
> drivers/gpu/drm/i915/display/intel_display_params.h | 3 ++-
> drivers/gpu/drm/i915/display/intel_lvds.c | 4 ++--
> drivers/g
On Mon, 16 Oct 2023, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> The newly added memset() causes a warning for some reason I could not figure
> out:
>
> In file included from arch/x86/include/asm/string.h:3,
> from drivers/gpu/drm/i915/gt/intel_rc6.c:6:
> In function 'rc6_res
On 10/23/2023 9:41 AM, Andrzej Hajda wrote:
From: Jonathan Cavitt
Enable NULL PTE support for vm scratch pages.
The use of NULL PTEs in vm scratch pages requires us to change how
the i915 gem_contexts live selftest perform vm_isolation: instead of
checking the scratch pages are isolated and
On 10/23/2023 1:35 PM, Andrzej Hajda wrote:
On 23.10.2023 10:38, Nirmoy Das wrote:
Hi Andrzej
On 10/23/2023 9:41 AM, Andrzej Hajda wrote:
Hi all,
This the series from Jonathan:
[PATCH v12 0/4] Apply Wa_16018031267 / Wa_16018063123
taken over by me.
Changes in this version are described
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
> drivers/gpu/dr
On Sat, 14 Oct 2023, Andi Shyti wrote:
> Hi Jani,
>
> On Wed, Oct 11, 2023 at 07:21:02PM +0300, Jani Nikula wrote:
>> Remove an unnecessary include.
>>
>> Signed-off-by: Jani Nikula
>
> Reviewed-by: Andi Shyti
Thanks for the reviews, pushed to din.
BR,
Jani.
--
Jani Nikula, Intel
I915_PRIORITY_NORMAL is 0 so use that instead for better
readability.
Cc: John Harrison
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
b/drivers/
On 23.10.2023 10:49, Nirmoy Das wrote:
Hi Andrzej,
On 10/23/2023 9:41 AM, Andrzej Hajda wrote:
Reserve two pages in each vm for kernel space to use for things
such as workarounds.
v2: use real memory, do not decrease vm.total
Suggested-by: Chris Wilson
Signed-off-by: Andrzej Hajda
Reviewed-
On 23.10.2023 10:38, Nirmoy Das wrote:
Hi Andrzej
On 10/23/2023 9:41 AM, Andrzej Hajda wrote:
Hi all,
This the series from Jonathan:
[PATCH v12 0/4] Apply Wa_16018031267 / Wa_16018063123
taken over by me.
Changes in this version are described in the patches, in short:
v2:
- use real memor
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> .../gpu/drm/i915/display/intel_display_params.c | 15 +++
> .../gpu/drm/i915/display/intel_display_params.h | 5 +
> drivers/gpu/drm/i915/display/intel_psr.c | 14 +++
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/i9xx_wm.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display_params.c | 4
> drivers/gpu/drm/i915/display/intel_display_params.h | 3 ++-
> drivers/
On Tue, 17 Oct 2023, Sean Young wrote:
> diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c
> b/drivers/gpu/drm/i915/display/intel_backlight.c
> index 2e8f17c045222..cf516190cde8f 100644
> --- a/drivers/gpu/drm/i915/display/intel_backlight.c
> +++ b/drivers/gpu/drm/i915/display/intel_bac
The uncore code may not always be available (e.g. when we build the
display code with Xe), so we can't always rely on having the uncore's
spinlock.
To handle this, split the spin_lock/unlock_irqsave/restore() into
spin_lock/unlock() followed by a call to local_irq_save/restore() and
create wrapper
On Mon, 2023-10-23 at 13:21 +0300, Jani Nikula wrote:
> On Mon, 23 Oct 2023, "Coelho, Luciano" wrote:
> > On Mon, 2023-10-23 at 12:11 +0300, Jani Nikula wrote:
> > > On Mon, 23 Oct 2023, Luca Coelho wrote:
> > > > The uncore code may not always be available (e.g. when we build the
> > > > display
On Mon, 23 Oct 2023, "Coelho, Luciano" wrote:
> On Mon, 2023-10-23 at 12:11 +0300, Jani Nikula wrote:
>> On Mon, 23 Oct 2023, Luca Coelho wrote:
>> > The uncore code may not always be available (e.g. when we build the
>> > display code with Xe), so we can't always rely on having the uncore's
>> >
On Mon, 2023-10-23 at 12:11 +0300, Jani Nikula wrote:
> On Mon, 23 Oct 2023, Luca Coelho wrote:
> > The uncore code may not always be available (e.g. when we build the
> > display code with Xe), so we can't always rely on having the uncore's
> > spinlock.
> >
> > To handle this, split the spin_lo
Hi Andrzej,
On 10/23/2023 9:41 AM, Andrzej Hajda wrote:
From: Jonathan Cavitt
Set copy engine arbitration into round robin mode
for part of Wa_16018031267 / Wa_16018063123 mitigation.
Signed-off-by: Nirmoy Das
Signed-off-by: Jonathan Cavitt
Reviewed-by: Andrzej Hajda
---
drivers/gpu/drm/
On Thu, 12 Oct 2023, Nirmoy Das wrote:
> On 10/11/2023 10:15 PM, Jani Nikula wrote:
>> Add separate macros for VLV/CHV registers without the implicit dev_priv,
>> and with the display MMIO base baked in.
>>
>> A number of implicitly used dev_priv local variables can be removed.
>>
>> Signed-off-by
On Thu, 12 Oct 2023, Matt Roper wrote:
> On Wed, Oct 11, 2023 at 05:27:04PM +0300, Jani Nikula wrote:
>> No longer needed after commit 94bcf876cb6a ("drm/i915/mtl: Drop
>> Wa_14017240301").
>>
>> Signed-off-by: Jani Nikula
>
> Reviewed-by: Matt Roper
Thanks, pushed to din.
>
>> ---
>> driver
> -Original Message-
> From: Ville Syrjälä
> Sent: Thursday, October 12, 2023 6:26 PM
> To: Lobo, Melanie
> Cc: intel-gfx@lists.freedesktop.org; Heikkila, Juha-pekka pekka.heikk...@intel.com>
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: Support FP16 compressed formats
> on MTL
>
> On
MTL supports FP16 format which is a binary floating-point computer
number format that occupies 16 bits in computer memory.Platform shall
render compression in display engine to receive FP16 compressed formats.
This kernel change was tested with IGT patch,
https://patchwork.freedesktop.org/patch/56
On Mon, 23 Oct 2023, Luca Coelho wrote:
> The uncore code may not always be available (e.g. when we build the
> display code with Xe), so we can't always rely on having the uncore's
> spinlock.
>
> To handle this, split the spin_lock/unlock_irqsave/restore() into
> spin_lock/unlock() followed by a
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> GPU error dump contained all module parameters. If we are moving
> display parameters to intel_display_params.[ch] they are not dumped
> into GPU error dump. This patch is adding moved display parameters
> back to GPU error dump. Display pa
On 10/23/2023 9:41 AM, Andrzej Hajda wrote:
From: Jonathan Cavitt
Apply WABB blit for Wa_16018031267 / Wa_16018063123.
Should this be split into two patches, one that adds per_ctx wabb and
another
where this WA is applied on top of per_ctx BB ?
Additionally, update the lrc selftest to
Hi Andrzej,
On 10/23/2023 9:41 AM, Andrzej Hajda wrote:
Reserve two pages in each vm for kernel space to use for things
such as workarounds.
v2: use real memory, do not decrease vm.total
Suggested-by: Chris Wilson
Signed-off-by: Andrzej Hajda
Reviewed-by: Jonathan Cavitt
---
drivers/gpu/d
The uncore code may not always be available (e.g. when we build the
display code with Xe), so we can't always rely on having the uncore's
spinlock.
To handle this, split the spin_lock/unlock_irqsave/restore() into
spin_lock/unlock() followed by a call to local_irq_save/restore() and
create wrapper
Hi Andrzej
On 10/23/2023 9:41 AM, Andrzej Hajda wrote:
Hi all,
This the series from Jonathan:
[PATCH v12 0/4] Apply Wa_16018031267 / Wa_16018063123
taken over by me.
Changes in this version are described in the patches, in short:
v2:
- use real memory as WABB destination,
Do we still need t
On Mon, 2023-10-23 at 11:14 +0300, Luca Coelho wrote:
> On Mon, 2023-10-23 at 07:50 +, Hogander, Jouni wrote:
> > On Sun, 2023-10-22 at 20:45 +0300, Luca Coelho wrote:
> > > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > > > Currently all module parameters are handled by i915_para
On Mon, 2023-10-23 at 07:50 +, Hogander, Jouni wrote:
> On Sun, 2023-10-22 at 20:45 +0300, Luca Coelho wrote:
> > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > > Currently all module parameters are handled by i915_param.c/h. This
> > > is a problem for display parameters when Xe
On Sun, 2023-10-22 at 20:45 +0300, Luca Coelho wrote:
> On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > Currently all module parameters are handled by i915_param.c/h. This
> > is a problem for display parameters when Xe driver is used. Add
> > a mechanism to add parameters specific to
From: Jonathan Cavitt
Set copy engine arbitration into round robin mode
for part of Wa_16018031267 / Wa_16018063123 mitigation.
Signed-off-by: Nirmoy Das
Signed-off-by: Jonathan Cavitt
Reviewed-by: Andrzej Hajda
---
drivers/gpu/drm/i915/gt/intel_engine_regs.h | 3 +++
drivers/gpu/drm/i915/gt
Reserve two pages in each vm for kernel space to use for things
such as workarounds.
v2: use real memory, do not decrease vm.total
Suggested-by: Chris Wilson
Signed-off-by: Andrzej Hajda
Reviewed-by: Jonathan Cavitt
---
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 38 +++
From: Jonathan Cavitt
Apply WABB blit for Wa_16018031267 / Wa_16018063123.
Additionally, update the lrc selftest to exercise the new
WABB changes.
v3: drop unused enum definition
Co-developed-by: Nirmoy Das
Signed-off-by: Jonathan Cavitt
Signed-off-by: Andrzej Hajda
Reviewed-by: Jonathan Cav
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