== Series Details ==
Series: i915/pmu: Wire GuC backend to per-client busyness (rev4)
URL : https://patchwork.freedesktop.org/series/105085/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11970_full -> Patchwork_105085v4_full
I have a question on below code. Everything else looked good.
Will r-b as soon as we can close on below question
...alan
On Wed, 2022-07-27 at 19:20 -0700, john.c.harri...@intel.com wrote:
> From: John Harrison
>
> It is useful to be able to match GuC events to kernel events when
> looking at t
== Series Details ==
Series: i915/pmu: Wire GuC backend to per-client busyness (rev4)
URL : https://patchwork.freedesktop.org/series/105085/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11970 -> Patchwork_105085v4
Summary
== Series Details ==
Series: i915/pmu: Wire GuC backend to per-client busyness (rev4)
URL : https://patchwork.freedesktop.org/series/105085/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Wed, Aug 03, 2022 at 11:03:25PM +, Stuart Summers wrote:
There can be a race in the PMU process teardown vs the
time when the driver is unbound in which the user attempts
to stop the PMU process, but the actual data structure
in the kernel is no longer available. Avoid this use-after-free
From: John Harrison
GuC provides engine_id and last_switch_in ticks for an active context in
the pphwsp. The context image provides a 32 bit total ticks which is the
accumulated by the context (a.k.a. context[CTX_TIMESTAMP]). This
information is used to calculate the context busyness as follows:
== Series Details ==
Series: drm/i915/userptr: remove redundation assignment to variable ret
URL : https://patchwork.freedesktop.org/series/106983/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11968_full -> Patchwork_106983v1_full
=
Hi Mauro,
On 8/4/22 00:37, Mauro Carvalho Chehab wrote:
> Add a description for the TLB cache invalidation algorithm and for
> the related kAPI functions.
>
> Signed-off-by: Mauro Carvalho Chehab
> ---
>
> To avoid mailbombing on a large number of people, only mailing lists were C/C
> on the c
On Thu, 2022-07-21 at 14:23 +0800, Slark Xiao wrote:
> Replace 'the the' with 'the' in the comment.
>
> Signed-off-by: Slark Xiao
Reviewed-by: Stuart Summers
> ---
> drivers/gpu/drm/display/drm_dp_helper.c | 2 +-
> drivers/gpu/drm/i915/i915_irq.c | 2 +-
> drivers/gpu/drm
On Thu, 2022-08-04 at 09:46 +0100, Tvrtko Ursulin wrote:
> On 04/08/2022 00:03, Stuart Summers wrote:
> > There can be a race in the PMU process teardown vs the
> > time when the driver is unbound in which the user attempts
> > to stop the PMU process, but the actual data structure
> > in the kerne
On Thu, 2022-08-04 at 09:42 +0100, Tvrtko Ursulin wrote:
> On 04/08/2022 00:03, Stuart Summers wrote:
> > In the driver teardown, we are unregistering the gt prior
> > to unregistering the PMU. This means there is a small window
> > of time in which the application can request metrics from the
> >
Hi Dave and Daniel,
Here goes drm-intel-next-fixes-2022-08-04:
- disable pci resize on 32-bit systems (Nirmoy)
- don't leak the ccs state (Matt)
- TLB invalidation fixes (Chris)
Thanks,
Rodrigo.
The following changes since commit 2bc7ea71a73747a77e7f83bc085b0d2393235410:
Merge tag 'topic/nou
== Series Details ==
Series: drm/i915/userptr: remove redundation assignment to variable ret
URL : https://patchwork.freedesktop.org/series/106983/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11968 -> Patchwork_106983v1
S
== Series Details ==
Series: drm/i915/userptr: remove redundation assignment to variable ret
URL : https://patchwork.freedesktop.org/series/106983/
State : warning
== Summary ==
Error: dim checkpatch failed
be49a3479605 drm/i915/userptr: remove redundation assignment to variable ret
-:30: WARN
== Series Details ==
Series: drm/i915/gt: remove redundant pointer sseu
URL : https://patchwork.freedesktop.org/series/106982/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11967 -> Patchwork_106982v1
Summary
---
**F
== Series Details ==
Series: drm: Fix typo 'the the' in comment
URL : https://patchwork.freedesktop.org/series/106979/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11966_full -> Patchwork_106979v1_full
Summary
---
*
== Series Details ==
Series: drm/i915/gt: remove redundant pointer sseu
URL : https://patchwork.freedesktop.org/series/106982/
State : warning
== Summary ==
Error: dim checkpatch failed
d471c966d875 drm/i915/gt: remove redundant pointer sseu
-:33: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-o
Thanks Imre, for the comments, please find my response inline:
On 8/4/2022 9:14 PM, Imre Deak wrote:
On Thu, Aug 04, 2022 at 03:59:11PM +0530, Ankit Nautiyal wrote:
WA_14014367875 : When Display PHY is configured in continuous
DCC calibration mode, the DCC (duty cycle correction) for the clock
== Series Details ==
Series: cover-letter: Update vfio_pin/unpin_pages API
URL : https://patchwork.freedesktop.org/series/106978/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/106978/revisions/1/mbox/ not
applied
Applying: vfio: Make vfio_unpin_p
== Series Details ==
Series: Move all drivers to a common dma-buf locking convention
URL : https://patchwork.freedesktop.org/series/106980/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/106980/revisions/1/mbox/ not
applied
Applying: dma-buf: Add
On Thu, Aug 04, 2022 at 03:59:11PM +0530, Ankit Nautiyal wrote:
> WA_14014367875 : When Display PHY is configured in continuous
> DCC calibration mode, the DCC (duty cycle correction) for the clock
> erroneously goes through a state where the DCC code is 0x00 when it is
> supposed to be transitioni
> -Original Message-
> From: Tangudu, Tilak
> Sent: Thursday, July 21, 2022 3:30 PM
> To: Ewins, Jon ; Belgaumkar, Vinay
> ; Roper, Matthew D
> ; Wilson, Chris P ;
> Nikula, Jani ; Gupta, saurabhg
> ; Vivi, Rodrigo ; Gupta,
> Anshuman ; Nilawar, Badal
> ; Tangudu, Tilak ; Deak,
> Imre ;
On Thu, Jul 21, 2022 at 03:29:55PM +0530, tilak.tang...@intel.com wrote:
> [...]
> @@ -1706,6 +1716,12 @@ static int intel_runtime_suspend(struct device *kdev)
> if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv))
> intel_hpd_poll_enable(dev_priv);
>
> + if (rpm->d3_
== Series Details ==
Series: drm: Fix typo 'the the' in comment
URL : https://patchwork.freedesktop.org/series/106979/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11966 -> Patchwork_106979v1
Summary
---
**SUCCESS**
== Series Details ==
Series: drm: Fix typo 'the the' in comment
URL : https://patchwork.freedesktop.org/series/106979/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
On Wed, 2022-07-20 at 17:04 -0600, Alex Williamson wrote:
> On Wed, 20 Jul 2022 17:08:29 -0300
> Jason Gunthorpe wrote:
>
> > On Wed, Jul 20, 2022 at 01:41:13PM -0600, Alex Williamson wrote:
> >
> > > ie. we don't need the gfn, we only need the iova.
> >
> > Right, that makes sense
> >
> >
Add _unlocked postfix to the dma-buf API function names in a preparation
to move all non-dynamic dma-buf users over to the dynamic locking
specification. This patch only renames API functions, preparing drivers
to the common locking convention. Later on we will make the "unlocked"
functions to take
> MTL has a fixed rawclk of 38400Mhz. Register does not need to be
> + * MTL always uses a 38.4 MHz rawclk. The bspec tells us
Mismatch between commit message and comment. Probably
38400Mhz -> 38400kHz
-caz
On Mon, Aug 1, 2022 at 8:29 PM Matt Roper wrote:
> On Wed, Jul 27, 2022 at 0
Variable ret is assigned a value that is never read; it is either
being re-assigned during the following while-loop or after the loop.
The assignmnt is redundant and can be removed.
Cleans up clang scan build warning:
drivers/gpu/drm/i915/gem/i915_gem_userptr.c:295:11: warning: Although
the value
Hello,
This series moves all drivers to a dynamic dma-buf locking specification.
>From now on all dma-buf importers are made responsible for holding
dma-buf's reservation lock around all operations performed over dma-bufs
in accordance to the locking specification. This allows us to utilize
reserv
Pointer sseu is being assigned a value that is never read. The pointer
is redundant and can be removed. Cleans up clang scan warning:
drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c:300:2: warning: Value stored
to 'sseu' is never read [deadcode.DeadStores]
Signed-off-by: Colin Ian King
---
drive
On Wed, Jul 27, 2022 at 6:34 PM Radhakrishna Sripada <
radhakrishna.srip...@intel.com> wrote:
> From Meteorlake, Latency Level, SAGV bloack time are read from
> LATENCY_SAGV register instead of the GT driver pcode mailbox. DDR type
> and QGV information are also tob read from Mem SS registers.
>
>
All drivers that use dma-bufs have been moved to the updated locking
specification and now dma-buf reservation is guaranteed to be locked
by importers during the mapping operations. There is no need to take
the internal dma-buf lock anymore. Remove locking from the videobuf2
memory allocators.
Ack
On 7/20/22 11:32, Jim Cromie wrote:
> Add kernel_param_ops and callbacks to apply a class-map to a
> sysfs-node, which then can control classes defined in that class-map.
> This supports uses like:
>
> echo 0x3 > /sys/module/drm/parameters/debug
>
> IE add these:
>
> - int param_set_dyndbg
The internal dma-buf lock isn't needed anymore because the updated
locking specification claims that dma-buf reservation must be locked
by importers, and thus, the internal data is already protected by the
reservation lock. Remove the obsoleted internal lock.
Acked-by: Tomasz Figa
Signed-off-by:
This patch moves the non-dynamic dma-buf users over to the dynamic
locking specification. The strict locking convention prevents deadlock
situation for dma-buf importers and exporters.
Previously the "unlocked" versions of the dma-buf API functions weren't
taking the reservation lock and this patc
The new common dma-buf locking convention will require buffer importers
to hold the reservation lock around mapping operations. Make DRM GEM core
to take the lock around the vmapping operations and update QXL and i915
drivers to use the locked functions for the case where DRM core now holds
the loc
On 8/3/22 15:56, jim.cro...@gmail.com wrote:
> On Wed, Jul 20, 2022 at 9:32 AM Jim Cromie wrote:
>>
>
>> Hi Jason, Greg, DRM-folk,
>>
>> This adds 'typed' "class FOO" support to dynamic-debug, where 'typed'
>> means either DISJOINT (like drm debug categories), or VERBOSE (like
>> nouveau debug
On 7/20/22 11:32, Jim Cromie wrote:
> DECLARE_DYNDBG_CLASSMAP lets modules declare a set of classnames, this
> opt-in authorizes dyndbg to allow enabling of prdbgs by their class:
>
>:#> echo class DRM_UT_KMS +p > /proc/dynamic_debug/control
>
> This is just the setup; following commits de
Replace 'the the' with 'the' in the comment.
Signed-off-by: Slark Xiao
---
drivers/gpu/drm/display/drm_dp_helper.c | 2 +-
drivers/gpu/drm/i915/i915_irq.c | 2 +-
drivers/gpu/drm/panel/panel-novatek-nt35510.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --gi
On Thu, 04 Aug 2022, Jani Nikula wrote:
> On Wed, 27 Jul 2022, Radhakrishna Sripada
> wrote:
>> The PCI Id's and platform definition are posted earlier.
>
> Please don't send patch series that aren't based on drm-tip or depend on
> other patch series. Even if you've sent the PCI ID stuff earlier
== Series Details ==
Series: drm/i915/hdcp: register cleanup (rev2)
URL : https://patchwork.freedesktop.org/series/106964/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11966 -> Patchwork_106964v2
Summary
---
**FAILU
On Thu, 2022-08-04 at 05:32 +, Tangudu, Tilak wrote:
>
>
> > -Original Message-
> > From: Vivi, Rodrigo
> > Sent: Thursday, August 4, 2022 2:01 AM
> > To: Tangudu, Tilak
> > Cc: Ewins, Jon ; Belgaumkar, Vinay
> > ; Roper, Matthew D
> > ; Wilson, Chris P
> > ;
> > Nikula, Jani ; Gupt
== Series Details ==
Series: series starting with [v4,1/6] drm/ttm: Add new callbacks to ttm res mgr
URL : https://patchwork.freedesktop.org/series/106961/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11966_full -> Patchwork_106961v1_full
=
== Series Details ==
Series: drm/i915/hdcp: register cleanup (rev2)
URL : https://patchwork.freedesktop.org/series/106964/
State : warning
== Summary ==
Error: dim checkpatch failed
99aa46795be6 drm/i915/hdcp: split out hdcp registers to a separate file
Traceback (most recent call last):
Fil
== Series Details ==
Series: drm/i915/combo_phy: Add Workaround to avoid flicker with HBR3 eDP Panels
URL : https://patchwork.freedesktop.org/series/106967/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11966 -> Patchwork_106967v1
==
On Mon, Aug 1, 2022 at 2:02 PM wrote:
>
> The following changes since commit 150864a4d73e8c448eb1e2c68e65f07635fe1a66:
>
> amdgpu partially revert "amdgpu: update beige goby to release 22.20"
> (2022-07-25 14:16:04 -0400)
>
> are available in the Git repository at:
>
> git://anongit.freedeskt
On Fri, Jul 29, 2022 at 1:25 PM Tolakanahalli Pradeep, Madhumitha
wrote:
>
> Kindly add the below changes to linux-firmware:
>
> The following changes since commit 150864a4d73e8c448eb1e2c68e65f07635fe1a66:
>
> amdgpu partially revert "amdgpu: update beige goby to release 22.20"
> (2022-07-
> 25
== Series Details ==
Series: Enabling Pipewriteback (rev3)
URL : https://patchwork.freedesktop.org/series/106902/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11966_full -> Patchwork_106902v3_full
Summary
---
**FAIL
== Series Details ==
Series: drm/i915/hdcp: register cleanup
URL : https://patchwork.freedesktop.org/series/106964/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11966 -> Patchwork_106964v1
Summary
---
**FAILURE**
== Series Details ==
Series: drm/i915/hdcp: register cleanup
URL : https://patchwork.freedesktop.org/series/106964/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/hdcp: register cleanup
URL : https://patchwork.freedesktop.org/series/106964/
State : warning
== Summary ==
Error: dim checkpatch failed
ba366d332f4c drm/i915/hdcp: split out hdcp registers to a separate file
Traceback (most recent call last):
File "scri
WA_14014367875 : When Display PHY is configured in continuous
DCC calibration mode, the DCC (duty cycle correction) for the clock
erroneously goes through a state where the DCC code is 0x00 when it is
supposed to be transitioning from 0x10 to 0x0F. This glitch causes a
distortion in the clock, whic
== Series Details ==
Series: Move TLB invalidation code for its own file and document it (rev4)
URL : https://patchwork.freedesktop.org/series/106805/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11966_full -> Patchwork_106805v4_full
==
Registers contents are supposed to be defined using REG_BIT() to ensure
they're u32 and the shift is within bounds.
Signed-off-by: Jani Nikula
---
.../gpu/drm/i915/display/intel_hdcp_regs.h| 90 +--
1 file changed, 45 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/d
Reduce the bloat of i915_reg.h. The registers are also only needed in a
few places, no need to have them defined everywhere.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 1 +
drivers/gpu/drm/i915/display/intel_hdcp.c | 1 +
.../gpu/drm/i915/display/intel
Posting some cleanups I had written earlier.
Jani Nikula (2):
drm/i915/hdcp: split out hdcp registers to a separate file
drm/i915/hdcp: replace BIT() with REG_BIT() in register definitions
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 1 +
drivers/gpu/drm/i915/display/intel_hdcp.c |
On Tue, 19 Jul 2022, Jouni Högander wrote:
> Luminance range calculation was split out into drm_edid.c and is now
> part of edid parsing. Rely on values calculated during edid parsing and
> use these for caps->aux_max_input_signal and caps->aux_min_input_signal.
Harry, I'll merge patches 1 & 3 in
== Series Details ==
Series: series starting with [v4,1/6] drm/ttm: Add new callbacks to ttm res mgr
URL : https://patchwork.freedesktop.org/series/106961/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11966 -> Patchwork_106961v1
===
== Series Details ==
Series: series starting with [v4,1/6] drm/ttm: Add new callbacks to ttm res mgr
URL : https://patchwork.freedesktop.org/series/106961/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Wed, 27 Jul 2022, Radhakrishna Sripada
wrote:
> The PCI Id's and platform definition are posted earlier.
Please don't send patch series that aren't based on drm-tip or depend on
other patch series. Even if you've sent the PCI ID stuff earlier,
include all the dependencies in the series you po
== Series Details ==
Series: Enabling Pipewriteback (rev3)
URL : https://patchwork.freedesktop.org/series/106902/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11966 -> Patchwork_106902v3
Summary
---
**SUCCESS**
N
Hi Jani,
> >> It moves overflows_type utility macro into drm util header from i915_utils
> >> header. The overflows_type can be used to catch the truncation between data
> >> types. And it adds safe_conversion() macro which performs a type conversion
> >> (cast) of an source value into a new varia
== Series Details ==
Series: Enabling Pipewriteback (rev3)
URL : https://patchwork.freedesktop.org/series/106902/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Enabling Pipewriteback (rev3)
URL : https://patchwork.freedesktop.org/series/106902/
State : warning
== Summary ==
Error: dim checkpatch failed
10ad01a5c747 drm/i915: Define WD trancoder for i915
-:68: CHECK:LINE_SPACING: Please don't use multiple blank lines
#68:
On 04/08/2022 00:03, Stuart Summers wrote:
There can be a race in the PMU process teardown vs the
time when the driver is unbound in which the user attempts
to stop the PMU process, but the actual data structure
in the kernel is no longer available. Avoid this use-after-free
by skipping the PMU
On 04/08/2022 00:03, Stuart Summers wrote:
In the driver teardown, we are unregistering the gt prior
to unregistering the PMU. This means there is a small window
of time in which the application can request metrics from the
PMU, some of which are calling into the uapi engines list,
while the en
== Series Details ==
Series: Move TLB invalidation code for its own file and document it (rev4)
URL : https://patchwork.freedesktop.org/series/106805/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11966 -> Patchwork_106805v4
Adding support for writeback transcoder to start capturing frames using
interrupt mechanism
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_acpi.c | 1 +
drivers/gpu/drm/i915/display/intel_crtc.c | 3 +
.../dr
Adding WD Types, WD transcoder to enum list and WD Transcoder offsets.
Adding i915 register definitions related to WD transcoder
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_display.h | 6 +
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915/i91
A patch series was floated in the drm mailing list which aimed to change
the drm_connector and drm_encoder fields to pointer in the
drm_connector_writeback structure, this received a huge pushback from
the community but since i915 expects each connector present in the
drm_device list to be a intel_
On 04/08/2022 08:37, Mauro Carvalho Chehab wrote:
WRITE_ONCE() should happen at the original var, not on a local
copy of it.
Fixes: 5d36acb7198b ("drm/i915/gt: Batch TLB invalidations")
Cc: stable I think, since the above one was. So both hit 5.21 (or 6.1)
together.
Regards,
Tvrtko
Sig
== Series Details ==
Series: Move TLB invalidation code for its own file and document it (rev4)
URL : https://patchwork.freedesktop.org/series/106805/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Move TLB invalidation code for its own file and document it (rev4)
URL : https://patchwork.freedesktop.org/series/106805/
State : warning
== Summary ==
Error: dim checkpatch failed
c884d515384d drm/i915: pass a pointer for tlb seqno at vma_invalidate_tlb()
e78e81b0
> -Original Message-
> From: Vivi, Rodrigo
> Sent: Thursday, August 4, 2022 2:03 AM
> To: Tangudu, Tilak ; Srivatsa, Anusha
> ; Deak, Imre
> Cc: Ewins, Jon ; Belgaumkar, Vinay
> ; Roper, Matthew D
> ; Wilson, Chris P ;
> Nikula, Jani ; Gupta, saurabhg
> ; Gupta, Anshuman
> ; Nilawar, B
WRITE_ONCE() should happen at the original var, not on a local
copy of it.
Fixes: 5d36acb7198b ("drm/i915/gt: Batch TLB invalidations")
Signed-off-by: Mauro Carvalho Chehab
---
To avoid mailbombing on a large number of people, only mailing lists were C/C
on the cover.
See [PATCH v3 0/3] at:
ht
Add a description for the TLB cache invalidation algorithm and for
the related kAPI functions.
Signed-off-by: Mauro Carvalho Chehab
---
To avoid mailbombing on a large number of people, only mailing lists were C/C
on the cover.
See [PATCH v3 0/3] at:
https://lore.kernel.org/all/cover.165959809
From: Chris Wilson
Prepare for supporting more TLB invalidation scenarios by moving
the current MMIO invalidation to its own file.
It also:
- Renames intel_gt_invalidate_tlb() to intel_gt_invalidate_tlb_full()
- Add intel_gt_init_tlb() and intel_gt_fini_tlb() abstracts.
Signed-off-by: Chris Wi
There are more things to be added to TLB invalidation. Before doing that,
move the code to its own file, and add the relevant documentation.
Patch 1 fixes vma_invalidate_tlb() logic to make it update the right var;
Patch 2 only moves the code and do some function renames. No functional
change;
P
On 04/08/2022 02:21, Umesh Nerlige Ramappa wrote:
On Tue, Aug 02, 2022 at 04:38:45PM -0700, Umesh Nerlige Ramappa wrote:
On Tue, Aug 02, 2022 at 09:41:38AM +0100, Tvrtko Ursulin wrote:
On 01/08/2022 20:02, Umesh Nerlige Ramappa wrote:
On Wed, Jul 27, 2022 at 09:48:18AM +0100, Tvrtko Ursulin
On Tue, 2 Aug 2022 15:30:44 -0700
Niranjana Vishwanathapura wrote:
> On Fri, Jul 29, 2022 at 09:03:55AM +0200, Mauro Carvalho Chehab wrote:
> >Add a description for the TLB cache invalidation algorithm and for
> >the related kAPI functions.
> >
> >Signed-off-by: Mauro Carvalho Chehab
> >---
> >
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