On Thu, Jul 21, 2022 at 03:29:55PM +0530, tilak.tang...@intel.com wrote:
> [...]
> @@ -1706,6 +1716,12 @@ static int intel_runtime_suspend(struct device *kdev)
> if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv))
> intel_hpd_poll_enable(dev_priv);
>
> + if (rpm->d3_state == INTEL_D3COLD_OFF) {
> + i915_save_pci_state(pdev);
> + pci_disable_device(pdev);
> + pci_set_power_state(pdev, PCI_D3cold);
> + }
Could you add a code comment describing why the above is required? For
standard PCI devices pci_pm_runtime_suspend() should do this except for
calling pci_disable_device().
> +
> drm_dbg(&dev_priv->drm, "Device suspended\n");
> return 0;
> }
> @@ -1713,6 +1729,7 @@ static int intel_runtime_suspend(struct device *kdev)
> static int intel_runtime_resume(struct device *kdev)
> {
> struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
> + struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
> struct intel_runtime_pm *rpm = &dev_priv->runtime_pm;
> int ret;
>
> @@ -1724,7 +1741,25 @@ static int intel_runtime_resume(struct device *kdev)
> drm_WARN_ON_ONCE(&dev_priv->drm, atomic_read(&rpm->wakeref_count));
> disable_rpm_wakeref_asserts(rpm);
>
> - intel_opregion_notify_adapter(dev_priv, PCI_D0);
> + if (rpm->d3_state == INTEL_D3COLD_OFF) {
> + ret = pci_set_power_state(pdev, PCI_D0);
> + if (ret) {
> + drm_err(&dev_priv->drm,
> + "failed to set PCI D0 power state (%d)\n", ret);
> + goto out;
> + }
> +
> + i915_load_pci_state(pdev);
> +
> + ret = pci_enable_device(pdev);
> + if (ret)
> + goto out;
> + pci_set_master(pdev);
> + intel_opregion_resume(dev_priv);
> + } else {
> + intel_opregion_notify_adapter(dev_priv, PCI_D0);
> + }
> +
> rpm->suspended = false;
> if (intel_uncore_unclaimed_mmio(&dev_priv->uncore))
> drm_dbg(&dev_priv->drm,
> @@ -1742,8 +1777,20 @@ static int intel_runtime_resume(struct device *kdev)
> * No point of rolling back things in case of an error, as the best
> * we can do is to hope that things will still work (and disable RPM).
> */
> - intel_gt_runtime_resume(to_gt(dev_priv));
> + if (rpm->d3_state == INTEL_D3COLD_OFF) {
> + ret = i915_pcode_init(dev_priv);
> + if (ret)
> + goto out;
>
> + sanitize_gpu(dev_priv);
> + ret = i915_ggtt_enable_hw(dev_priv);
> + if (ret)
> + drm_err(&dev_priv->drm, "failed to re-enable GGTT\n");
> + i915_ggtt_resume(to_gt(dev_priv)->ggtt);
> + i915_gem_resume(dev_priv);
> + } else {
> + intel_gt_runtime_resume(to_gt(dev_priv));
> + }
> /*
> * On VLV/CHV display interrupts are part of the display
> * power well, so hpd is reinitialized from there. For
> @@ -1756,6 +1803,7 @@ static int intel_runtime_resume(struct device *kdev)
>
> intel_enable_ipc(dev_priv);
>
> +out:
> enable_rpm_wakeref_asserts(rpm);
>
> if (ret)
> --
> 2.25.1
>
