== Series Details ==
Series: drm/i915/gt: fix i915_reg_t initialization
URL : https://patchwork.freedesktop.org/series/101594/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11393_full -> Patchwork_22630_full
Summary
---
== Series Details ==
Series: drm/i915/dmc: cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/101499/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11393_full -> Patchwork_22629_full
Summary
---
**SUCCESS
== Series Details ==
Series: drm/i915: Add RPL-S PCI IDs
URL : https://patchwork.freedesktop.org/series/101621/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11395 -> Patchwork_22638
Summary
---
**SUCCESS**
No reg
== Series Details ==
Series: drm/i915/debugfs: Do not return '0' if there is nothing to return (rev2)
URL : https://patchwork.freedesktop.org/series/97340/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11393_full -> Patchwork_22628_full
== Series Details ==
Series: drm/i915: Add RPL-S PCI IDs
URL : https://patchwork.freedesktop.org/series/101621/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_enable' not
found
./drivers/gpu/drm/i9
Add couple of RPL-S device ids
Bspec : 53655
Cc: Matt Roper
Signed-off-by: Tejas Upadhyay
---
include/drm/i915_pciids.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 3609f3254f24..638be9cddba4 100644
--- a/incl
== Series Details ==
Series: drm/privacy-screen: Use connector name in lookup
URL : https://patchwork.freedesktop.org/series/101582/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11393_full -> Patchwork_22627_full
Summary
-
Hi Jani,
I love your patch! Yet something to improve:
[auto build test ERROR on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next v5.17 next-20220321]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--bas
== Series Details ==
Series: lrc selftest fixes (rev3)
URL : https://patchwork.freedesktop.org/series/101353/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11395 -> Patchwork_22637
Summary
---
**FAILURE**
Serious
== Series Details ==
Series: Add DP MST DSC support to i915 (rev3)
URL : https://patchwork.freedesktop.org/series/101492/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11393_full -> Patchwork_22626_full
Summary
---
*
== Series Details ==
Series: lrc selftest fixes (rev3)
URL : https://patchwork.freedesktop.org/series/101353/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_enable' not
found
./drivers/gpu/drm/i915
== Series Details ==
Series: lrc selftest fixes (rev3)
URL : https://patchwork.freedesktop.org/series/101353/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/gt/intel_engine
== Series Details ==
Series: lrc selftest fixes (rev3)
URL : https://patchwork.freedesktop.org/series/101353/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a9e84f56f403 drm/i915/gt: Explicitly clear BB_OFFSET for new contexts
e2339157165f drm/i915/selftests: Check for incomplet
== Series Details ==
Series: drm/i915/ttm: Evict and restore of compressed object (rev3)
URL : https://patchwork.freedesktop.org/series/101106/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11395 -> Patchwork_22636
Summary
On Mon, Mar 21, 2022 at 04:34:49PM -0700, Casey Bowman wrote:
Wanted to ping this older thread to find out where we stand with this patch,
Are we OK with the current state of these changes?
With more recent information gathered from feedback on other patches, would
we prefer changing this to a m
== Series Details ==
Series: drm/i915/ttm: Evict and restore of compressed object (rev3)
URL : https://patchwork.freedesktop.org/series/101106/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_enable'
== Series Details ==
Series: drm/i915/ttm: Evict and restore of compressed object (rev3)
URL : https://patchwork.freedesktop.org/series/101106/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Use drm_clflush* instead of clflush
URL : https://patchwork.freedesktop.org/series/101611/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11395 -> Patchwork_22635
Summary
---
**SUCCESS**
== Series Details ==
Series: drm/i915/ttm: Evict and restore of compressed object (rev3)
URL : https://patchwork.freedesktop.org/series/101106/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a6e13a3a409f drm/i915/gt: Use XY_FAST_COLOR_BLT to clear obj on graphics ver 12+
3d54473
== Series Details ==
Series: Use drm_clflush* instead of clflush
URL : https://patchwork.freedesktop.org/series/101611/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_enable' not
found
./drivers/gp
== Series Details ==
Series: drm/i915: Random cleanups
URL : https://patchwork.freedesktop.org/series/101607/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11395 -> Patchwork_22634
Summary
---
**SUCCESS**
No regre
== Series Details ==
Series: Use drm_clflush* instead of clflush
URL : https://patchwork.freedesktop.org/series/101611/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Random cleanups
URL : https://patchwork.freedesktop.org/series/101607/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_enable' not
found
./drivers/gpu/drm/i915
== Series Details ==
Series: drm/i915: Random cleanups
URL : https://patchwork.freedesktop.org/series/101607/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/rps: Centralize computation of freq caps
URL : https://patchwork.freedesktop.org/series/101606/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11395 -> Patchwork_22633
Summary
---
== Series Details ==
Series: drm/i915/rps: Centralize computation of freq caps
URL : https://patchwork.freedesktop.org/series/101606/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_enable' not
foun
== Series Details ==
Series: drm/i915/rps: Centralize computation of freq caps
URL : https://patchwork.freedesktop.org/series/101606/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Wanted to ping this older thread to find out where we stand with this patch,
Are we OK with the current state of these changes?
With more recent information gathered from feedback on other patches, would
we prefer changing this to a more arch-neutral control flow?
e.g.
#if IS_ENABLED(CONFIG_X86)
From: Chris Wilson
When testing whether we can get the GPU to leak information about
non-privileged state, we first need to ensure that the output buffer is
set to a known value as the HW may opt to skip the write into memory for
a non-privileged read of a sensitive register. We chose POISON_INUS
Now Cc'ing Daniel properly
Lucas De Marchi
On Mon, Mar 21, 2022 at 04:00:56PM -0700, Lucas De Marchi wrote:
+Thomas Zimmermann and +Daniel Vetter
Could you take a look below regarding the I/O to I/O memory access?
On Thu, Mar 03, 2022 at 11:30:11PM +0530, Balasubramani Vivekanandan wrote:
me
On 2022-03-21 at 14:19:01 +0530, Hellstrom, Thomas wrote:
> On Sun, 2022-03-20 at 02:12 +0530, Ramalingam C wrote:
> > XY_FAST_COLOR_BLT cmd is faster than the older XY_COLOR_BLT. Hence
> > for
> > clearing (Zero out) the pages of the newly allocated object, faster
> > cmd
> > is used.
>
> NIT: Im
On 2022-03-21 at 11:11:33 +0100, Das, Nirmoy wrote:
> In the previous version I replied only to the mailing list email so probably
> my email slipped through.
Sorry for the miss. Thank so much for the review.
Ram
>
> Reviewed-by: Nirmoy Das for patch 6-7
>
> On 3/19/2022 9:42 PM, Ramalingam C
On 2022-03-21 at 16:09:08 +0530, Hellstrom, Thomas wrote:
> On Sun, 2022-03-20 at 02:12 +0530, Ramalingam C wrote:
> > While clearing the Flat-CCS capable lmem object, we need to clear the
> > CCS
> > meta data corresponding to the memory.
> >
> > As part of live_migrate_clear add check for the ccs
+Thomas Zimmermann and +Daniel Vetter
Could you take a look below regarding the I/O to I/O memory access?
On Thu, Mar 03, 2022 at 11:30:11PM +0530, Balasubramani Vivekanandan wrote:
memcpy_from_wc functions in i915_memcpy.c will be removed and replaced
by the implementation in drm_cache.c.
Upda
When we are swapping out the local memory obj on flat-ccs capable platform,
we need to capture the ccs data too along with main meory and we need to
restore it when we are swapping in the content.
When lmem object is swapped into a smem obj, smem obj will
have the extra pages required to hold the
On Xe-HP and later devices, dedicated compression control state (CCS)
stored in local memory is used for each surface, to support the
3D and media compression formats.
The memory required for the CCS of the entire local memory is 1/256 of
the local memory size. So before the kernel boot, the requi
Extend the live migrate selftest, to verify the ccs surface clearing
during the Flat-CCS capable lmem obj clear.
v2:
Look at right places for ccs data [Thomas]
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/gt/selftest_migrate.c | 250 ++---
1 file changed, 222 insertion
Add a parameter called "extra_pages" for ttm_tt_init, to indicate that
driver needs extra pages in ttm_tt.
v2:
Used imperative wording [Thomas and Christian]
Signed-off-by: Ramalingam C
cc: Christian Koenig
cc: Hellstrom Thomas
Reviewed-by: Thomas Hellstrom
Reviewed-by: Christian Konig
Rev
Handle the src and dst chunk offsets for different instances of the copy
engines.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/gt/intel_migrate.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c
b/drivers/gpu/drm/i915/gt/intel_migrate.c
inde
Consider the possible round up happened at obj size alignment to
min_page_size during the obj allocation.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/gt/selftest_migrate.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/selftest_migrate.c
b/drivers/gpu/dr
Xe-HP and latest devices support Flat CCS which reserved a portion of
the device memory to store compression metadata, during the clearing of
device memory buffer object we also need to clear the associated
CCS buffer.
XY_CTRL_SURF_COPY_BLT is a BLT cmd used for reading and writing the
ccs surface
Move the static calculations out of the loops for copy and clear.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/gt/intel_migrate.c | 44 -
1 file changed, 21 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c
b/drivers/gpu/drm/i91
Use faster XY_FAST_COLOR_BLT cmd on graphics version of 12 and more,
for clearing (Zero out) the pages of the newly allocated object.
XY_FAST_COLOR_BLT is faster than the older XY_COLOR_BLT.
v2:
Typo fix at title [Thomas]
Signed-off-by: Ramalingam C
Signed-off-by: Chris Wilson
Reviewed-by: T
On Xe-HP and later devices, we use dedicated compression control
state (CCS) stored in local memory for each surface, to support
the 3D and media compression formats.
The memory required for the CCS of the entire local memory is
1/256 of the local memory size. So before the kernel
boot, the requir
Use drm_clflush_virt_range instead of clflushopt and remove the memory
barrier, since drm_clflush_virt_range takes care of that.
v2(Michael Cheng): Use sizeof(*addr) instead of sizeof(addr) to get the
actual size of the page. Thanks to Matt Roper for
pointing
Replace all occurrence of cache_clflush_range with drm_clflush_virt_range.
This will prevent compile errors on non-x86 platforms.
Signed-off-by: Michael Cheng
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 12 ++--
drivers/gpu/drm/i915/gt/intel_execli
Re-work intel_write_status_page to use drm_clflush_virt_range. This
will prevent compiler errors when building for non-x86 architectures.
Signed-off-by: Michael Cheng
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_engine.h | 13 -
1 file changed, 4 insertions(+), 9 deleti
This patch series re-work a few i915 functions to use drm_clflush_virt_range
instead of calling clflush or clflushopt directly. This will prevent errors
when building for non-x86 architectures.
v2: s/PAGE_SIZE/sizeof(value) for Re-work intel_write_status_page and added
more patches to convert addi
Use drm_clflush_virt_range instead of directly invoking clflush. This
will prevent compiler errors when building for non-x86 architectures.
v2(Michael Cheng): Remove extra clflush
v3(Michael Cheng): Remove memory barrier since drm_clflush_virt_range
takes care of it.
v4(Michae
Drop invalidate_csb_entries and directly call drm_clflush_virt_range.
This allows for one less function call, and prevent complier errors when
building for non-x86 architectures.
v2(Michael Cheng): Drop invalidate_csb_entries function and directly
invoke drm_clflush_virt_range.
On Tue, Mar 15, 2022 at 02:52:38PM -0400, Alex Deucher wrote:
> On Mon, Mar 14, 2022 at 6:12 PM Ville Syrjälä
> wrote:
> >
> > On Fri, Feb 18, 2022 at 12:03:41PM +0200, Ville Syrjala wrote:
> > > drm: Add drm_mode_init()
> > > drm/bridge: Use drm_mode_copy()
> > > drm/imx: Use drm_mode_dupli
== Series Details ==
Series: Add GuC Error Capture Support
URL : https://patchwork.freedesktop.org/series/101604/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11393 -> Patchwork_22632
Summary
---
**SUCCESS**
No r
== Series Details ==
Series: Add GuC Error Capture Support
URL : https://patchwork.freedesktop.org/series/101604/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Add GuC Error Capture Support
URL : https://patchwork.freedesktop.org/series/101604/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b440789589db drm/i915/guc: Update GuC ADS size for error capture lists
-:40: WARNING:FILE_PATH_CHANGES: added, moved o
== Series Details ==
Series: drm/i915/uapi: Add struct drm_i915_query_hwconfig_blob_item
URL : https://patchwork.freedesktop.org/series/101599/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11393 -> Patchwork_22631
Summary
== Series Details ==
Series: drm/i915/uapi: Add struct drm_i915_query_hwconfig_blob_item
URL : https://patchwork.freedesktop.org/series/101599/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/gt: fix i915_reg_t initialization
URL : https://patchwork.freedesktop.org/series/101594/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11393 -> Patchwork_22630
Summary
---
**SUCC
On Thu, Mar 03, 2022 at 11:30:10PM +0530, Balasubramani Vivekanandan wrote:
memcpy_from_wc functions in i915_memcpy.c will be removed and replaced
by the implementation in drm_cache.c.
Updated to use the functions provided by drm_cache.c.
v2: Check if the log object allocated from local memory o
On Tue, 2022-03-15 at 22:23 +0200, Ville Syrjälä wrote:
> On Tue, Mar 15, 2022 at 06:54:21PM +, Souza, Jose wrote:
> > On Tue, 2022-03-15 at 15:27 +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Rename the DRRS functiosn to say "(de)activate" rather than
> > > "enable/disabl
== Series Details ==
Series: drm/i915/dmc: cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/101499/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11393 -> Patchwork_22629
Summary
---
**SUCCESS**
No r
== Series Details ==
Series: drm/i915/dmc: cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/101499/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/dmc: cleanups (rev2)
URL : https://patchwork.freedesktop.org/series/101499/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
91b1db13654c drm/i915/dmc: simplify intel_dmc_load_program() conditions
2e6c0cff37da drm/i915/dmc: move assert_dmc_loa
== Series Details ==
Series: drm/i915/debugfs: Do not return '0' if there is nothing to return (rev2)
URL : https://patchwork.freedesktop.org/series/97340/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11393 -> Patchwork_22628
==
From: Ville Syrjälä
Remove some zombies from our device structure.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_drv.h | 9 -
1 file changed, 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 217c09422711..98f04e0ebdbe 100
From: Ville Syrjälä
Stop hand rolling drm_connector_attach_hdr_output_metadata_property().
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu
From: Ville Syrjälä
Follow the new i9xx DPLL FP register programming sequence
introduced in commit 62d66b218386 ("drm/i915: Fold
i9xx_set_pll_dividers() into i9xx_enable_pll()") in the
i830 "power well" code as well. Just for consistency.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/d
From: Ville Syrjälä
Clean up a few random things that caught my eye.
Ville Syrjälä (3):
drm/i915: Program i830 DPLL FP register later
drm/i915: Use drm_connector_attach_hdr_output_metadata_property()
drm/i915: Remove dead members from dev_priv
drivers/gpu/drm/i915/display/intel_display.c
Hi Jani,
I love your patch! Yet something to improve:
[auto build test ERROR on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next v5.17 next-20220321]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--bas
== Series Details ==
Series: drm/privacy-screen: Use connector name in lookup
URL : https://patchwork.freedesktop.org/series/101582/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11393 -> Patchwork_22627
Summary
---
On Thu, Mar 03, 2022 at 11:30:08PM +0530, Balasubramani Vivekanandan wrote:
Fast copy using non-temporal instructions for x86 currently exists at two
locations. One is implemented in i915 driver at i915/i915_memcpy.c and
another copy at drm_cache.c. The plan is to remove the duplicate
implementat
On Mon, 21 Mar 2022 11:17:46 -0700, Lucas De Marchi wrote:
>
> On Mon, Mar 21, 2022 at 10:56:04AM -0700, Ashutosh Dixit wrote:
> > diff --git a/drivers/gpu/drm/i915/gt/intel_rps_types.h
> > b/drivers/gpu/drm/i915/gt/intel_rps_types.h
> > index 3941d8551f52..5990df35b393 100644
> > --- a/drivers/gp
== Series Details ==
Series: Add DP MST DSC support to i915 (rev3)
URL : https://patchwork.freedesktop.org/series/101492/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11393 -> Patchwork_22626
Summary
---
**SUCCESS**
On Wed, Mar 16, 2022 at 10:00:06AM +0200, Jani Nikula wrote:
> On Fri, 18 Feb 2022, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Initialize on-stack modes with drm_mode_init() to guarantee
> > no stack garbage in the list head, or that we aren't copying
> > over another mode's list head.
On 2022-03-21 4:07 a.m., Thomas Hellström wrote:
On 3/21/22 11:30, Tvrtko Ursulin wrote:
On 19/03/2022 19:42, Michael Cheng wrote:
Previous concern with using drm_clflush_sg was that we don't know
what the
sg_table is pointing to, thus the usage of wbinvd_on_all_cpus to flush
everything at
== Series Details ==
Series: Add DP MST DSC support to i915 (rev3)
URL : https://patchwork.freedesktop.org/series/101492/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+./drivers/gpu/drm/amd/am
== Series Details ==
Series: Add DP MST DSC support to i915 (rev3)
URL : https://patchwork.freedesktop.org/series/101492/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5e516f0e4e89 drm: Add missing DP DSC extended capability definitions.
-:45: CHECK:LINE_SPACING: Please don't u
On 21.3.2022 14.29, Matthew Auld wrote:
On Fri, 18 Mar 2022 at 09:22, Juha-Pekka Heikkila
wrote:
On 17.3.2022 13.55, Matthew Auld wrote:
On Wed, 16 Mar 2022 at 22:23, Juha-Pekka Heikkila
wrote:
Add fallback smem allocation for dpt if stolen memory
allocation failed.
Signed-off-by: Juha-Pe
On Mon, Mar 21, 2022 at 10:56:04AM -0700, Ashutosh Dixit wrote:
diff --git a/drivers/gpu/drm/i915/gt/intel_rps_types.h
b/drivers/gpu/drm/i915/gt/intel_rps_types.h
index 3941d8551f52..5990df35b393 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_rps_types
Freq caps (i.e. RP0, RP1 and RPn frequencies) are read from HW. However the
formats (bit positions, widths, registers and units) of these vary for
different generations with even more variations arriving in the future. In
order not to have to do identical computation for these caps in multiple
plac
On 2022-03-21 10:28 a.m., Tvrtko Ursulin wrote:
On 21/03/2022 16:31, Michael Cheng wrote:
On 2022-03-21 3:30 a.m., Tvrtko Ursulin wrote:
On 19/03/2022 19:42, Michael Cheng wrote:
Previous concern with using drm_clflush_sg was that we don't know
what the
sg_table is pointing to, thus the
On 2022-03-21 10:28 a.m., Tvrtko Ursulin wrote:
On 21/03/2022 16:31, Michael Cheng wrote:
On 2022-03-21 3:30 a.m., Tvrtko Ursulin wrote:
On 19/03/2022 19:42, Michael Cheng wrote:
Previous concern with using drm_clflush_sg was that we don't know
what the
sg_table is pointing to, thus the
On 21/03/2022 16:31, Michael Cheng wrote:
On 2022-03-21 3:30 a.m., Tvrtko Ursulin wrote:
On 19/03/2022 19:42, Michael Cheng wrote:
Previous concern with using drm_clflush_sg was that we don't know
what the
sg_table is pointing to, thus the usage of wbinvd_on_all_cpus to flush
everything at
== Series Details ==
Series: drm/i915/display: Add smem fallback allocation for dpt
URL : https://patchwork.freedesktop.org/series/101443/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11372_full -> Patchwork_22588_full
Sum
On Mon, 2022-03-21 at 12:49 +0200, Stanislav Lisovskiy wrote:
> We are currently getting FIFO underruns, in particular
> when PSR2 is enabled. There seem to be no existing workaround
> or patches, which can fix that issue(were expecting some recent
> selective fetch update and DBuf bw/SAGV fixes to
On Mon, 2022-03-21 at 12:49 +0200, Stanislav Lisovskiy wrote:
> We are currently getting FIFO underruns, in particular
> when PSR2 is enabled. There seem to be no existing workaround
> or patches, which can fix that issue(were expecting some recent
> selective fetch update and DBuf bw/SAGV fixes to
Below one looks like a new issue
https://gitlab.freedesktop.org/drm/intel/-/issues/5386
igt@perf@stress-open-close - dmesg-fail - general protection fault, probably
for non-canonical address 0x6b6b6b6b6b6b6bcb, RIP: 0010:i915_oa_init_reg_state
Thanks,
Lakshmi.
-Original Message-
From: Juh
Issue is related to
https://gitlab.freedesktop.org/drm/intel/-/issues/1373
Few tests - incomplete - Kernel panic - not syncing: EXT4-fs (device
nvme0n1p2): panic forced after error|Kernel panic - not syncing: EXT4-fs panic
from previous error
Lakshmi.
-Original Message-
From: Matthew Au
== Series Details ==
Series: Introduce multitile support
URL : https://patchwork.freedesktop.org/series/101551/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11384_full -> Patchwork_22617_full
Summary
---
**SUCCESS**
Print the GuC captured error state register list (string names
and values) when gpu_coredump_state printout is invoked via
the i915 debugfs for flushing the gpu error-state that was
captured prior.
Since GuC could have reported multiple engine register dumps
in a single notification event, parse t
- Upon the G2H Notify-Err-Capture event, parse through the
GuC Log Buffer (error-capture-subregion) and generate one or
more capture-nodes. A single node represents a single "engine-
instance-capture-dump" and contains at least 3 register lists:
global, engine-class and engine-instance. An
Add device specific tables and register lists to cover different engines
class types for GuC error state capture for XE_LP products.
Signed-off-by: Alan Previn
Reviewed-by: Umesh Nerlige Ramappa
---
.../gpu/drm/i915/gt/uc/intel_guc_capture.c| 112 ++
drivers/gpu/drm/i915/gt/
Add GuC's error capture output structures and definitions as how
they would appear in GuC log buffer's error capture subregion after
an error state capture G2H event notification.
Signed-off-by: Alan Previn
Reviewed-by: Matthew Brost
---
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h | 47 ++
In the rare but possible scenario where we are in the midst of
multiple GuC error-capture (and engine reset) events and the
user also triggers a forced full GT reset or the internal watchdog
triggers the same, intel_guc_submission_reset_prepare's call
to flush_work(&guc->ct.requests.worker) can cau
Add a flags parameter through all of the coredump creation
functions. Add a bitmask flag to indicate if the top
level gpu_coredump event is triggered in response to
a GuC context reset notification.
Using that flag, ensure all coredump functions that
read or print mmio-register values related to w
Add intel_guc_capture_output_min_size_est function to
provide a reasonable minimum size for error-capture
region before allocating the shared buffer.
Signed-off-by: Alan Previn
Reviewed-by: Matthew Brost
---
.../gpu/drm/i915/gt/uc/intel_guc_capture.c| 48 +++
.../gpu/drm/i91
Abstract out a Gen9 register list as the default for all other
platforms we don't yet formally support GuC submission on.
Signed-off-by: Alan Previn
Reviewed-by: Umesh Nerlige Ramappa
---
.../gpu/drm/i915/gt/uc/intel_guc_capture.c| 82 +--
1 file changed, 59 insertions(+), 2
GuC log buffer regions for debug-log-events, crash-dumps and
error-state-capture are all part of a single bo allocation that
also includes the guc_log_buffer_state structures. Now that we
support it, increase the size allocation for error-capture.
Since the error-capture region is accessed at non-
For the sake of better code readibility, change previous
relay logging function names with "capture_logs" to
"copy_debug_logs" to differentiate from error capture
functions that will use a different region of the same buffer.
Signed-off-by: Alan Previn
Reviewed-by: Matthew Brost
---
drivers/gpu
Add the ability for runtime allocation and freeing of
steered register list extentions that depend on the
detected HW config fuses.
Signed-off-by: Alan Previn
Reviewed-by: Umesh Nerlige Ramappa
---
drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h | 9 +
.../gpu/drm/i915/gt/uc/intel_guc_capture.c
Add additional DG2 registers for GuC error state capture.
Signed-off-by: Alan Previn
Reviewed-by: Umesh Nerlige Ramappa
---
.../gpu/drm/i915/gt/uc/intel_guc_capture.c| 80 ++-
1 file changed, 77 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc
1 - 100 of 164 matches
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