Though there is a write option available on fec_suport
debugfs file, so far it has been registering with read
permissions only.
Suggested-by: Jani Nikula
Signed-off-by: Vandita Kulkarni
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 +-
1 file changed, 1
This series add debugfs entry to force dsc bpp to
ceratin valid test value, for validation needs.
This series has been tested locally.
With the introduction of i915_dsc_bpp debugfs
the expectation is that whenever there is force_dsc_en
set, force_dsc_bpp should have a valid value for that
format wh
Set DSC BPP to the value forced through
debugfs. It can go from bpc to bpp-1.
v2: Use default dsc bpp when we are just
doing force_dsc_en, use default dsc bpp
for invalid force_dsc_bpp values. (Jani)
Signed-off-by: Vandita Kulkarni
Reviewed-by: Swati Sharma
---
drivers/gpu/drm/i915/dis
From: Patnana Venkata Sai
This patch creates a per connector debugfs node to expose
the Compressed BPP. The same node can be used from userspace
to force DSC to a certain BPP(all accepted values).
This is useful to verify all supported/requested
compression bpp's through IGT
v2: Remove unnecess
Hi all,
After merging the drm-intel-fixes tree, today's linux-next build
(htmldocs) produced this warning:
drivers/gpu/drm/i915/i915_cmd_parser.c:1436: warning: Excess function parameter
'jump_whitelist' description in 'intel_engine_cmd_parser'
drivers/gpu/drm/i915/i915_cmd_parser.c:1436: warnin
On Mon, Jul 19, 2021 at 05:51:46PM -0700, Daniele Ceraolo Spurio wrote:
>
>
> On 7/16/2021 1:16 PM, Matthew Brost wrote:
> > Implement GuC context operations which includes GuC specific operations
> > alloc, pin, unpin, and destroy.
> >
> > v2:
> > (Daniel Vetter)
> >- Use msleep_interrupt
== Series Details ==
Series: drm/i915/dp: Add missing TPS4 programming bits
URL : https://patchwork.freedesktop.org/series/92737/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10354_full -> Patchwork_20650_full
Summary
On Mon, Jul 19, 2021 at 07:48:17PM -0700, Matthew Brost wrote:
> On Mon, Jul 19, 2021 at 04:46:57PM -0700, Daniele Ceraolo Spurio wrote:
> >
> >
> > On 7/16/2021 1:16 PM, Matthew Brost wrote:
> > > If two requests are on the same ring, they are explicitly ordered by the
> > > HW. So, a submission
On Mon, Jul 19, 2021 at 04:46:57PM -0700, Daniele Ceraolo Spurio wrote:
>
>
> On 7/16/2021 1:16 PM, Matthew Brost wrote:
> > If two requests are on the same ring, they are explicitly ordered by the
> > HW. So, a submission fence is sufficient to ensure ordering when using
> > the new GuC submissi
On Mon, Jul 19, 2021 at 05:23:55PM -0700, John Harrison wrote:
> On 7/16/2021 13:16, Matthew Brost wrote:
> > Implement GuC context operations which includes GuC specific operations
> > alloc, pin, unpin, and destroy.
> >
> > v2:
> > (Daniel Vetter)
> >- Use msleep_interruptible rather than
On Mon, Jul 19, 2021 at 06:27:06PM -0700, John Harrison wrote:
> On 7/16/2021 13:16, Matthew Brost wrote:
> > Add trace points for request dependencies and GuC submit. Extended
> > existing request trace points to include submit fence value,, guc_id,
> Still has misplaced commas.
>
> Also, Tvrtko
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/step: Add macro magic for
handling steps
URL : https://patchwork.freedesktop.org/series/92735/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10354_full -> Patchwork_20649_full
On Tue, Jul 13, 2021 at 10:06:17AM +0100, Tvrtko Ursulin wrote:
>
> On 24/06/2021 08:04, Matthew Brost wrote:
> > Add trace points for request dependencies and GuC submit. Extended
> > existing request trace points to include submit fence value,, guc_id,
> > and ring tail value.
> >
> > Cc: John
On Mon, Jul 19, 2021 at 06:28:47PM -0700, John Harrison wrote:
> On 7/16/2021 13:16, Matthew Brost wrote:
> > From: John Harrison
> >
> > The serial number tracking of engines happens at the backend of
> > request submission and was expecting to only be given physical
> > engines. However, in GuC
On Mon, Jul 19, 2021 at 06:03:05PM -0700, John Harrison wrote:
> On 7/16/2021 13:16, Matthew Brost wrote:
> > When running the GuC the GPU can't be considered idle if the GuC still
> > has contexts pinned. As such, a call has been added in
> > intel_gt_wait_for_idle to idle the UC and in turn the G
On 7/16/2021 13:16, Matthew Brost wrote:
From: John Harrison
The serial number tracking of engines happens at the backend of
request submission and was expecting to only be given physical
engines. However, in GuC submission mode, the decomposition of virtual
to physical engines does not happen
On 7/16/2021 13:16, Matthew Brost wrote:
Add trace points for request dependencies and GuC submit. Extended
existing request trace points to include submit fence value,, guc_id,
Still has misplaced commas.
Also, Tvrtko has a bunch of comments/questions on the previous version
that need to be a
On 7/16/2021 13:16, Matthew Brost wrote:
Update GuC debugfs to support the new GuC structures.
v2:
(John Harrison)
- Remove intel_lrc_reg.h include from i915_debugfs.c
(Michal)
- Rename GuC debugfs functions
Signed-off-by: John Harrison
Signed-off-by: Matthew Brost
Reviewed-by: Joh
On 7/16/2021 13:16, Matthew Brost wrote:
When running the GuC the GPU can't be considered idle if the GuC still
has contexts pinned. As such, a call has been added in
intel_gt_wait_for_idle to idle the UC and in turn the GuC by waiting for
the number of unpinned contexts to go to zero.
v2: rtime
On 7/16/2021 1:16 PM, Matthew Brost wrote:
Implement GuC context operations which includes GuC specific operations
alloc, pin, unpin, and destroy.
v2:
(Daniel Vetter)
- Use msleep_interruptible rather than cond_resched in busy loop
(Michal)
- Remove C++ style comment
Signed-off-by:
== Series Details ==
Series: drm/i915/dp: Add missing TPS4 programming bits
URL : https://patchwork.freedesktop.org/series/92737/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10354 -> Patchwork_20650
Summary
---
**S
On 7/16/2021 13:16, Matthew Brost wrote:
Semaphores are an optimization and not required for basic GuC submission
to work properly. Disable until we have time to do the implementation to
enable semaphores and tune them for performance. Also long direction is
just to delete semaphores from the i91
On 7/19/2021 15:55, Matthew Brost wrote:
On Mon, Jul 19, 2021 at 04:01:56PM -0700, John Harrison wrote:
On 7/16/2021 13:16, Matthew Brost wrote:
Implement GuC submission tasklet for new interface. The new GuC
interface uses H2G to submit contexts to the GuC. Since H2G use a single
channel, a si
== Series Details ==
Series: drm/i915/dp: Add missing TPS4 programming bits
URL : https://patchwork.freedesktop.org/series/92737/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/i915_cmd_parser.c:1436: warning: Excess function
parameter 'jump_
On 7/16/2021 13:16, Matthew Brost wrote:
Implement GuC context operations which includes GuC specific operations
alloc, pin, unpin, and destroy.
v2:
(Daniel Vetter)
- Use msleep_interruptible rather than cond_resched in busy loop
(Michal)
- Remove C++ style comment
Signed-off-by: John
== Series Details ==
Series: drm/i915/dp: Add missing TPS4 programming bits
URL : https://patchwork.freedesktop.org/series/92737/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2b13649fc806 drm/i915/dp: Add missing TPS4 programming bits
-:18: WARNING:COMMIT_LOG_LONG_LINE: Possib
Bits 20:19 are used to set CP2520 Patterns 1/2/3 (refer to Specs:50484).
TPS4 is CP2520 Pattern 3 (refer to DP2.0 spaces Table 3-11, DPCD 00248h
LINK_QUAL_PATTERN_SELECT, and DP PHY 1.4 CTS - Appendix A - Compliance
EYE Pattern(CP2520; Normative))
For TPS4, setting bits 20:19 to value != 00b, lead
On 7/16/2021 1:16 PM, Matthew Brost wrote:
If two requests are on the same ring, they are explicitly ordered by the
HW. So, a submission fence is sufficient to ensure ordering when using
the new GuC submission interface. Conversely, if two requests share a
timeline and are on the same physical
On Mon, Jul 19, 2021 at 04:42:50PM -0700, Daniele Ceraolo Spurio wrote:
>
>
> On 7/19/2021 4:27 PM, Matthew Brost wrote:
> > On Mon, Jul 19, 2021 at 04:33:56PM -0700, Daniele Ceraolo Spurio wrote:
> > >
> > > On 7/16/2021 1:16 PM, Matthew Brost wrote:
> > > > Implement GuC virtual engines. Rathe
On 7/19/2021 4:27 PM, Matthew Brost wrote:
On Mon, Jul 19, 2021 at 04:33:56PM -0700, Daniele Ceraolo Spurio wrote:
On 7/16/2021 1:16 PM, Matthew Brost wrote:
Implement GuC virtual engines. Rather simple implementation, basically
just allocate an engine, setup context enter / exit function t
On Mon, Jul 19, 2021 at 04:33:56PM -0700, Daniele Ceraolo Spurio wrote:
>
>
> On 7/16/2021 1:16 PM, Matthew Brost wrote:
> > Implement GuC virtual engines. Rather simple implementation, basically
> > just allocate an engine, setup context enter / exit function to virtual
> > engine specific funct
On 7/16/2021 1:16 PM, Matthew Brost wrote:
Implement GuC virtual engines. Rather simple implementation, basically
just allocate an engine, setup context enter / exit function to virtual
engine specific functions, set all other variables / functions to guc
versions, and set the engine mask to t
== Series Details ==
Series: Fix the debugfs splat from mock selftests
URL : https://patchwork.freedesktop.org/series/92729/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10352_full -> Patchwork_20646_full
Summary
---
Am 19.07.21 um 20:30 schrieb Jason Ekstrand:
If we have a failure, decrement the reference count so that the next
call to ttm_global_init() will actually do something instead of assume
everything is all set up.
Signed-off-by: Jason Ekstrand
Fixes: 62b53b37e4b1 ("drm/ttm: use a static ttm_bo_glo
On Mon, Jul 19, 2021 at 04:01:56PM -0700, John Harrison wrote:
> On 7/16/2021 13:16, Matthew Brost wrote:
> > Implement GuC submission tasklet for new interface. The new GuC
> > interface uses H2G to submit contexts to the GuC. Since H2G use a single
> > channel, a single tasklet submits is used fo
On 7/16/2021 13:16, Matthew Brost wrote:
Implement GuC submission tasklet for new interface. The new GuC
interface uses H2G to submit contexts to the GuC. Since H2G use a single
channel, a single tasklet submits is used for the submission path.
This still needs fixing - 'a single tasklet submits
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/step: Add macro magic for
handling steps
URL : https://patchwork.freedesktop.org/series/92735/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10354 -> Patchwork_20649
==
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/step: Add macro magic for
handling steps
URL : https://patchwork.freedesktop.org/series/92735/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/i915_cmd_parser.c:1436: warning:
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/step: Add macro magic for
handling steps
URL : https://patchwork.freedesktop.org/series/92735/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be check
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/step: Add macro magic for
handling steps
URL : https://patchwork.freedesktop.org/series/92735/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
29663fa4daa2 drm/i915/step: Add macro magic for handling steps
-:24:
Lets use RUNTIME_INFO->step since all platforms now have their
stepping info in intel_step.c. This makes intel_get_stepping_info()
a lot simpler.
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_dmc.c | 50 --
With the addition of stepping info for
all platforms, lets use macros for handling them
and autogenerating code for all steps at a time.
Suggested-by: Matt Roper
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_step.c | 14
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/step: Add macro magic for
handling steps
URL : https://patchwork.freedesktop.org/series/92734/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK
Lets use RUNTIME_INFO->step since all platforms now have their
stepping info in intel_step.c. This makes intel_get_stepping_info()
a lot simpler.
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_dmc.c | 50 --
With the addition of stepping info for
all platforms, lets use macros for handling them
and autogenerating code for all steps at a time.
Suggested-by: Matt Roper
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_step.c | 14
On Tue, Jul 13, 2021 at 08:14:53PM -0700, Matt Roper wrote:
> From: Tvrtko Ursulin
>
> On Xe_HP the fusing register is renamed and changed to have the "enable"
> semantics, but otherwise remains compatible (mmio address, bitmask
> ranges) with older platforms.
>
> To simplify things we do not ad
On Tue, Jul 13, 2021 at 08:14:52PM -0700, Matt Roper wrote:
> From: Paulo Zanoni
>
> The current interrupt handler is getting increasingly complicated and
> Xe_HP changes will bring even more complexity. Let's split off a new
> interrupt handler starting with DG1 (i.e., when the master tile
> in
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/step: Add macro magic for
handling steps
URL : https://patchwork.freedesktop.org/series/92732/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK
Lets use RUNTIME_INFO->step since all platforms now have their
stepping info in intel_step.c. This makes intel_get_stepping_info()
a lot simpler.
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_dmc.c | 50 --
With the addition of stepping info for
all platforms, lets use macros for handling them
and autogenerating code for all steps at a time.
Suggested-by: Matt Roper
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_step.c | 14
On Mon, Jul 19, 2021 at 4:10 AM Matthew Auld
wrote:
>
> On Fri, 16 Jul 2021 at 16:23, Jason Ekstrand wrote:
> >
> > On Fri, Jul 16, 2021 at 9:52 AM Tvrtko Ursulin
> > wrote:
> > >
> > >
> > > On 15/07/2021 11:15, Matthew Auld wrote:
> > > > The CPU domain should be static for discrete, and on DG
== Series Details ==
Series: Fix the debugfs splat from mock selftests
URL : https://patchwork.freedesktop.org/series/92729/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10352 -> Patchwork_20646
Summary
---
**SUCCES
On Mon, Jul 19, 2021 at 11:47:51AM +0530, Nautiyal, Ankit K wrote:
> Patch looks good to me.
>
> Please find below some suggestions
>
> On 7/15/2021 4:04 AM, Manasi Navare wrote:
> >Currently when we do the HW state readout, we dont set the shared dpll to
> >NULL
> >for the bigjoiner slave which
== Series Details ==
Series: Fix the debugfs splat from mock selftests
URL : https://patchwork.freedesktop.org/series/92729/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/i915_cmd_parser.c:1436: warning: Excess function
parameter 'jump_white
On Mon, Jul 19, 2021 at 11:25:55AM -0700, John Harrison wrote:
> On 7/19/2021 10:24, Matthew Brost wrote:
> > On Fri, Jul 16, 2021 at 01:17:14PM -0700, Matthew Brost wrote:
> > > From: John Harrison
> > >
> > > The media watchdog mechanism involves GuC doing a silent reset and
> > > continue of t
== Series Details ==
Series: Fix the debugfs splat from mock selftests
URL : https://patchwork.freedesktop.org/series/92729/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/ttm/t
== Series Details ==
Series: Fix the debugfs splat from mock selftests
URL : https://patchwork.freedesktop.org/series/92729/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ee28cc1d9eee drm/i915: Call i915_globals_exit() after i915_pmu_exit()
175239d5619b drm/i915: Call i915_glob
We create a bunch of debugfs entries as a side-effect of
ttm_global_init() and then never clean them up. This isn't usually a
problem because we free the whole debugfs directory on module unload.
However, if the global reference count ever goes to zero and then
ttm_global_init() is called again, w
There's no reason that I can tell why this should be per-i915_buddy_mm
and doing so causes KMEM_CACHE to throw dmesg warnings because it tries
to create a debugfs entry with the name i915_buddy_block multiple times.
We could handle this by carefully giving each slab its own name but that
brings its
If we have a failure, decrement the reference count so that the next
call to ttm_global_init() will actually do something instead of assume
everything is all set up.
Signed-off-by: Jason Ekstrand
Fixes: 62b53b37e4b1 ("drm/ttm: use a static ttm_bo_global instance")
Cc: Christian König
---
driver
We should tear down in the opposite order we set up.
Signed-off-by: Jason Ekstrand
Reviewed-by: Daniel Vetter
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_pci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i9
If the driver was not fully loaded, we may still have globals lying
around. If we don't tear those down in i915_exit(), we'll leak a bunch
of memory slabs. This can happen two ways: use_kms = false and if we've
run mock selftests. In either case, we have an early exit from
i915_init which happen
In the unlikely event that pci_register_device() fails, we were tearing
down our PMU setup but not globals. This leaves a bunch of memory slabs
lying around.
Signed-off-by: Jason Ekstrand
Fixes: 32eb6bcfdda9 ("drm/i915: Make request allocation caches global")
Cc: Daniel Vetter
---
drivers/gpu/
This patch series fixes a miscellaneous collection of bugs that all add up
to all our mock selftests throwing dmesg warnings in CI. As can be seen
from "drm/i915: Always call i915_globals_exit() from i915_exit()", it's
especially fun since those warnings don't always show up in the selftests
but c
On 7/19/2021 10:24, Matthew Brost wrote:
On Fri, Jul 16, 2021 at 01:17:14PM -0700, Matthew Brost wrote:
From: John Harrison
The media watchdog mechanism involves GuC doing a silent reset and
continue of the hung context. This requires the i915 driver provide a
golden context to GuC in the ADS.
On Tue, 2021-07-13 at 20:15 -0700, Matt Roper wrote:
> DG2 supports compute DSS and has the same maximum number of DSS and EU
> as XeHP SDV.
Reviewed-by: José Roberto de Souza
>
> Signed-off-by: Matt Roper
> ---
> drivers/gpu/drm/i915/gt/intel_sseu.c | 2 +-
> 1 file changed, 1 insertion(+),
On Tue, 2021-07-13 at 20:15 -0700, Matt Roper wrote:
> DG2 has Xe_LPD display (version 13) and Xe_HPG (version 12.55) graphics.
> There are two variants (treated as subplatforms in the code): DG2-G10
> and DG2-G11 that require independent programming in some areas (e.g.,
> workarounds).
Reviewed-
On Tue, 2021-07-13 at 20:15 -0700, Matt Roper wrote:
> From: Lucas De Marchi
>
> XeHP SDV is a Intel® dGPU without display. This is just the definition
> of some basic platform macros, by large a copy of current state of
> Tigerlake which does not reflect the end state of this platform.
>
> v2:
On Tue, 2021-07-13 at 20:15 -0700, Matt Roper wrote:
> Since we can't steer multicast register reads during ring-based
> workaround verification, we need to define the multicast ranges where
> failure to steer could potentially cause us to read back from a
> fused-off register instance.
>
> As wit
On Tue, 2021-07-13 at 20:14 -0700, Matt Roper wrote:
> From: John Harrison
>
> Xe_HP can have a lot of extra media engines. This patch adds the reset
> support for them.
Reviewed-by: José Roberto de Souza
>
> Signed-off-by: John Harrison
> Signed-off-by: Matt Roper
> ---
> drivers/gpu/drm/
On Tue, 2021-07-13 at 20:14 -0700, Matt Roper wrote:
> From: Lucas De Marchi
>
> Our _FEATURES macro went back to GEN7, extending each other, making it
> difficult to grasp what was really enabled/disabled. Take the
> opportunity of the GEN -> XE_HP name break and also break with the
> feature in
On Fri, 2021-07-16 at 22:14 -0700, Matt Roper wrote:
Reviewed-by: José Roberto de Souza
> Bspec: 53273
> Signed-off-by: Matt Roper
> ---
> drivers/gpu/drm/i915/display/intel_display_power.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display
On Fri, 2021-07-16 at 22:14 -0700, Matt Roper wrote:
> Extend the workaround bound to include A1 display.
>
Reviewed-by: José Roberto de Souza
> Bspec: 54370
> Signed-off-by: Matt Roper
> ---
> drivers/gpu/drm/i915/intel_device_info.c | 4 ++--
> drivers/gpu/drm/i915/intel_step.h| 1 +
On Fri, 2021-07-16 at 22:14 -0700, Matt Roper wrote:
> DFR programming (which we enable as an optimization on gen11, but must
> ensure is disabled on gen12) should be handled as a GT workaround rather
> than clock gating initialization. This will ensure that the programming
> of these registers is
On Fri, 2021-07-16 at 22:14 -0700, Matt Roper wrote:
> While doing a quick sanity check of the ICL workarounds in the driver I
> noticed a few things that should be updated:
>
> * There's no mention in the bspec that WaPipelineFlushCoherentLines
>is needed on gen11 (both the current WA databa
On Fri, 2021-07-16 at 22:14 -0700, Matt Roper wrote:
> On SKL we've been applying this workaround on H0+ steppings, which is
> actually backwards; H0 is supposed to be the first stepping where the
> workaround is no longer needed. Flip the bounds so that the workaround
> applies to all steppings _
On Fri, 2021-07-16 at 22:14 -0700, Matt Roper wrote:
> Workarounds are documented in the bspec with an exclusive upper bound
> (i.e., a "fixed" stepping that no longer needs the workaround). This
> makes our driver's use of an inclusive upper bound for stepping ranges
> confusing; the differing no
On Fri, 2021-07-16 at 22:14 -0700, Matt Roper wrote:
> RKL doesn't have PSR2 support, so PSR2-related workarounds no longer
> apply.
Reviewed-by: José Roberto de Souza
>
> Bspec: 53273
> Signed-off-by: Matt Roper
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 10 --
> 1 file chang
On Fri, Jul 16, 2021 at 01:17:14PM -0700, Matthew Brost wrote:
> From: John Harrison
>
> The media watchdog mechanism involves GuC doing a silent reset and
> continue of the hung context. This requires the i915 driver provide a
> golden context to GuC in the ADS.
>
> Signed-off-by: John Harrison
On Mon, Jul 19, 2021 at 10:01:31AM -0300, Jason Gunthorpe wrote:
> On Mon, Jul 19, 2021 at 02:58:58PM +0200, Cornelia Huck wrote:
> > > - ret = device->ops->open(device);
> > > - if (ret) {
> > > - module_put(device->dev->driver->owner);
> > > - vfio_device_put(device);
> > > -
On Mon, Jul 19, 2021 at 02:58:58PM +0200, Cornelia Huck wrote:
> > - ret = device->ops->open(device);
> > - if (ret) {
> > - module_put(device->dev->driver->owner);
> > - vfio_device_put(device);
> > - return ret;
> > + mutex_lock(&device->dev_set->lock);
> > +
On Mon, Jul 19, 2021 at 02:11:38PM +0200, Cornelia Huck wrote:
> On Wed, Jul 14 2021, Jason Gunthorpe wrote:
>
> > From: Max Gurtovoy
> >
> > This pairs with vfio_init_group_dev() and allows undoing any state that is
> > stored in the vfio_device unrelated to registration. Add appropriately
> >
== Series Details ==
Series: Set BPP in the kernel (rev5)
URL : https://patchwork.freedesktop.org/series/92312/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10350_full -> Patchwork_20645_full
Summary
---
**SUCCESS**
On Wed, Jul 14 2021, Jason Gunthorpe wrote:
> The user can open multiple device FDs if it likes, however the open
> function calls vfio_register_notifier() on device global state. Calling
> vfio_register_notifier() twice will trigger a WARN_ON from
> notifier_chain_register() and the first close
On Wed, Jul 14 2021, Jason Gunthorpe wrote:
> mbochs_close() iterates over global device state and frees it. Currently
> this is done every time a device FD is closed, but if multiple device FDs
> are open this could corrupt other still active FDs.
>
> Change this to use close_device() so it only
On Wed, Jul 14 2021, Jason Gunthorpe wrote:
> The user can open multiple device FDs if it likes, however these open()
> functions call vfio_register_notifier() on some device global
> state. Calling vfio_register_notifier() twice in will trigger a WARN_ON
> from notifier_chain_register() and the
On Fri, 16 Jul 2021 at 20:49, Jason Ekstrand wrote:
>
> On Fri, Jul 16, 2021 at 1:45 PM Matthew Auld
> wrote:
> >
> > On Fri, 16 Jul 2021 at 18:39, Jason Ekstrand wrote:
> > >
> > > On Fri, Jul 16, 2021 at 11:00 AM Matthew Auld
> > > wrote:
> > > >
> > > > On Fri, 16 Jul 2021 at 16:52, Matthew
On Wed, Jul 14 2021, Jason Gunthorpe wrote:
> The core code no longer requires these ops to be defined, so delete these
> empty functions and leave the op as NULL. mtty's functions only log a
> pointless message, delete that entirely.
>
> Signed-off-by: Yishai Hadas
> Signed-off-by: Jason Guntho
On Wed, Jul 14 2021, Jason Gunthorpe wrote:
> Currently the driver ops have an open/release pair that is called once
> each time a device FD is opened or closed. Add an additional set of
> open/close_device() ops which are called when the device FD is opened for
> the first time and closed for th
On Mon, Jul 19 2021, Jason Gunthorpe wrote:
> On Mon, Jul 19, 2021 at 02:11:38PM +0200, Cornelia Huck wrote:
>> On Wed, Jul 14 2021, Jason Gunthorpe wrote:
>>
>> > From: Max Gurtovoy
>> >
>> > This pairs with vfio_init_group_dev() and allows undoing any state that is
>> > stored in the vfio_de
== Series Details ==
Series: drm/i915: Check for nomodeset in i915_init() first
URL : https://patchwork.freedesktop.org/series/92700/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10350_full -> Patchwork_20644_full
Summary
On Wed, Jul 14 2021, Jason Gunthorpe wrote:
> From: Max Gurtovoy
>
> This pairs with vfio_init_group_dev() and allows undoing any state that is
> stored in the vfio_device unrelated to registration. Add appropriately
> placed calls to all the drivers.
>
> The following patch will use this to add
On Wed, Jul 14 2021, Jason Gunthorpe wrote:
> The patch to move the get/put to core and the patch to convert the samples
> to use vfio_device crossed in a way that this was missed. When both
> patches are together the samples do not need their own get/put.
>
> Fixes: 437e41368c01 ("vfio/mdpy: Con
== Series Details ==
Series: Set BPP in the kernel (rev5)
URL : https://patchwork.freedesktop.org/series/92312/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10350 -> Patchwork_20645
Summary
---
**SUCCESS**
No reg
== Series Details ==
Series: Set BPP in the kernel (rev5)
URL : https://patchwork.freedesktop.org/series/92312/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/i915_cmd_parser.c:1436: warning: Excess function
parameter 'jump_whitelist' descrip
== Series Details ==
Series: Set BPP in the kernel (rev5)
URL : https://patchwork.freedesktop.org/series/92312/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel
== Series Details ==
Series: MIPI DSI driver enhancements
URL : https://patchwork.freedesktop.org/series/92695/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10350_full -> Patchwork_20643_full
Summary
---
**SUCCESS**
Though there is a write option available on fec_suport
debugfs file, so far it has been registering with read
permissions only.
Suggested-by: Jani Nikula
Signed-off-by: Vandita Kulkarni
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 +-
1 file changed, 1
From: Patnana Venkata Sai
[What]:
This patch creates a per connector debugfs node to expose
the Input and Compressed BPP.
The same node can be used from userspace to force
DSC to a certain BPP(all accepted values).
[Why]:
Useful to verify all supported/requested compression bpp's
through IGT
v
Set DSC BPP to the value forced through
debugfs. It can go from bpc to bpp-1.
v2: Use default dsc bpp when we are just
doing force_dsc_en, use default dsc bpp
for invalid force_dsc_bpp values. (Jani)
Signed-off-by: Vandita Kulkarni
Reviewed-by: Swati Sharma
---
drivers/gpu/drm/i915/dis
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