== Series Details ==
Series: drm/i915: Don't access non-existent PGTBL_ER register
URL : https://patchwork.freedesktop.org/series/86463/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9704_full -> Patchwork_19546_full
Summar
== Series Details ==
Series: drm/i915: Don't access non-existent PGTBL_ER register
URL : https://patchwork.freedesktop.org/series/86463/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9704 -> Patchwork_19546
Summary
---
== Series Details ==
Series: Final set of patches for ADLS enabling (rev3)
URL : https://patchwork.freedesktop.org/series/86322/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9701_full -> Patchwork_19545_full
Summary
--
Quoting Matt Roper (2021-01-30 00:16:20)
> PGTBL_ER (0x2024) isn't documented in the bspec of any recent (SNB+)
> platform; it seems this register was removed ages ago and we probably
> shouldn't still be trying to clear it at init or read it during error
> state dump.
We do support decoding of PG
PGTBL_ER (0x2024) isn't documented in the bspec of any recent (SNB+)
platform; it seems this register was removed ages ago and we probably
shouldn't still be trying to clear it at init or read it during error
state dump.
Since I don't have easy access to a gen4 or gen5 era bspec to confirm
exactly
Hi Dave and Daniel,
On my last pull request I incorrectly stated that
Async flips were enabled for all ilk+ platforms, while it
was only on SKL. I'm sorry about that.
I hope there's still time to include a few changes including
the actual patches that make this statement true for 5.12.
Along wit
== Series Details ==
Series: drm/i915: Add missing -EDEADLK path in execbuffer ggtt pinning.
URL : https://patchwork.freedesktop.org/series/86452/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9700_full -> Patchwork_19543_full
==
Re-reported.
-Original Message-
From: Imre Deak
Sent: Friday, January 29, 2021 12:18 PM
To: intel-gfx@lists.freedesktop.org; Almahallawy, Khaled
Cc: Vudum, Lakshminarayana
Subject: Re: ✗ Fi.CI.IGT: failure for drm/i915/dp: Prevent setting the LTTPR LT
mode if no LTTPRs are detected
Quoting Vinicius Tinti (2021-01-29 18:15:19)
> By enabling -Wunreachable-code-aggressive on Clang the following code
> paths are unreachable.
That code exists as commentary and, especially for sdvo, library
functions that we may need in future.
The ivb-gt1 case => as we now set the gt level for i
== Series Details ==
Series: drm/i915/dp: Prevent setting the LTTPR LT mode if no LTTPRs are detected
URL : https://patchwork.freedesktop.org/series/86007/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9636_full -> Patchwork_19399_full
=
On Tue, Jan 19, 2021 at 01:46:54AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/dp: Prevent setting the LTTPR LT mode if no LTTPRs are
> detected
> URL : https://patchwork.freedesktop.org/series/86007/
> State : failure
Thanks for the review pushed to -din.
The failures
== Series Details ==
Series: Final set of patches for ADLS enabling (rev3)
URL : https://patchwork.freedesktop.org/series/86322/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9701 -> Patchwork_19545
Summary
---
**SUC
== Series Details ==
Series: Final set of patches for ADLS enabling (rev3)
URL : https://patchwork.freedesktop.org/series/86322/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i
== Series Details ==
Series: Final set of patches for ADLS enabling (rev3)
URL : https://patchwork.freedesktop.org/series/86322/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
20fe6c96d8ea drm/i915/adl_s: Update PHY_MISC programming
ad35bfcaf2e4 drm/i915/adl_s: Add power wells
d
On Fri, 2021-01-29 at 10:29 -0800, Aditya Swarup wrote:
> - Extend permanent driver WA Wa_1409767108, Wa_14010685332
> and Wa_14011294188 to adl-s.
> - Extend permanent driver WA Wa_1606054188 to adl-s.
> - Add Wa_14011765242 for adl-s A0 stepping.
Reviewed-by: José Roberto de Souza
>
> Cc: J
== Series Details ==
Series: drm/i915/gt: Ignore error capturing a closed context
URL : https://patchwork.freedesktop.org/series/86447/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9699_full -> Patchwork_19541_full
Summary
On 29/01/2021 09:52, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2021-01-29 09:18:50)
On 26/01/2021 13:05, Chris Wilson wrote:
The client id used is a cyclic allocator as that reduces the likelihood
of userspace seeing the same id used again (and so confusing the new
client as the old). Verif
From: Tejas Upadhyay
Just like RKL, the ADL_S platform also has different memory
characteristics from past platforms. Update the values used
by our memory bandwidth calculations accordingly.
v2: Fix minor nitpick for shifting ADLS case above RKL(based on platform
order).(mdroper)
Bspec: 64631
- Extend permanent driver WA Wa_1409767108, Wa_14010685332
and Wa_14011294188 to adl-s.
- Extend permanent driver WA Wa_1606054188 to adl-s.
- Add Wa_14011765242 for adl-s A0 stepping.
Cc: Jani Nikula
Cc: Ville Syrjälä
Cc: Imre Deak
Cc: Matt Roper
Cc: Lucas De Marchi
Signed-off-by: Aditya S
From: Matt Roper
ADL-S, like RKL, uses the same internal device ID for the GuC and HuC as
TGL did, making them all firmware-compatible. Let's re-use TGL's
firmware for ADL-S.
Bspec: 50668
Cc: John Harrison
Cc: Lucas De Marchi
Signed-off-by: Matt Roper
Signed-off-by: Aditya Swarup
Reviewed-b
From: Anusha Srivatsa
Load DMC on ADL_S v2.01. This is the first offcial
release of DMC for ADL_S.
Cc: Jani Nikula
Cc: Imre Deak
Cc: Matt Roper
Cc: Lucas De Marchi
Cc: Aditya Swarup
Signed-off-by: Anusha Srivatsa
Signed-off-by: Aditya Swarup
Reviewed-by: Aditya Swarup
---
drivers/gpu/dr
From: José Roberto de Souza
- As RKL and ADL-S only have 5 planes, primary and 4 sprites and
the cursor plane, let's group the handling together under
HAS_D12_PLANE_MINIMIZATION.
- Also use macro to select pipe irq fault error mask.
BSpec: 49251
Cc: Lucas De Marchi
Cc: Jani Nikula
Cc: Vill
From: Matt Roper
ADL-S switches up which PHYs are considered a master to other PHYs;
PHY-C is no longer a master, but PHY-D is now.
Bspec: 49291
Cc: Jani Nikula
Cc: Ville Syrjälä
Cc: Imre Deak
Cc: Lucas De Marchi
Signed-off-by: Matt Roper
Signed-off-by: Aditya Swarup
Reviewed-by: Aditya Sw
- Extend Wa_1606931601 and Wa_1409804808 to ADL-S.
- Extend Wa_14010919138 and Wa_14010229206 to ADL-S (Madhumitha)
- Extend Wa_22010271021 to ADLS (cyokoyam)
v2:
- Extend Wa_1409804808 and remove unnecessary branching/redundant
adls workaround placeholder functions.
- Split WAs properly based o
From: Lucas De Marchi
TGL power wells can be re-used for ADL-S with the exception of the fake
power well for TC_COLD, just like DG-1.
BSpec: 53597
Bspec: 49231
Cc: Imre Deak
Cc: Matt Roper
Cc: Aditya Swarup
Signed-off-by: Lucas De Marchi
Signed-off-by: Aditya Swarup
Reviewed-by: Matt Roper
These are the final set of patches required for enabling ADL-S. The
patches have been tested on platform and all display outputs are
working.
v2: Address minor nitpicks provided by mdroper.
Patch "drm/i915/adl_s: MCHBAR memory info registers are moved"
can be ignored as Jose's submission
https:/
== Series Details ==
Series: drm/i915/gt: Restrict the GT clock override to just Icelake
URL : https://patchwork.freedesktop.org/series/86446/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9699_full -> Patchwork_19540_full
On Fri, Jan 29, 2021 at 07:18:03PM +0200, Ville Syrjälä wrote:
> On Fri, Jan 29, 2021 at 07:06:33PM +0200, Imre Deak wrote:
> > On Thu, Jan 28, 2021 at 05:59:46PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Currently we only explicitly power up the combo PHY lanes
> > > for
On Fri, Jan 29, 2021 at 07:22:49PM +0200, Imre Deak wrote:
> On Thu, Jan 28, 2021 at 05:59:47PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > The documented programming sequence indicates the correct point
> > for the vswing programming is just before we enable the DDI.
> > Make it
On Wed, 2021-01-27 at 21:30 -0800, Aditya Swarup wrote:
> - Extend permanent driver WA Wa_1409767108, Wa_14010685332
> and Wa_14011294188 to adl-s.
> - Extend permanent driver WA Wa_1606054188 to adl-s.
> - Add Wa_14011765242 for adl-s A0 stepping.
>
> v2:
> - Extend Wa_14011765242 to STEP A1.(m
On Wed, 2021-01-27 at 21:43 -0800, Aditya Swarup wrote:
> On 1/26/21 9:22 PM, Matt Roper wrote:
> > On Tue, Jan 26, 2021 at 08:11:58PM -0800, Aditya Swarup wrote:
> > > - Extend permanent driver WA Wa_1409767108, Wa_14010685332
> > > and Wa_14011294188 to adl-s.
> > > - Extend permanent driver WA
On Thu, Jan 28, 2021 at 05:59:48PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We shouldn't really trust tc_mode on non-TC PHYs since we never
> initialize it explicitly. So let's check for the PHY type first.
> Fortunately TC_PORT_TBT_ALT happens to be zero so I don't think
> there's a
On Thu, Jan 28, 2021 at 05:59:47PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> The documented programming sequence indicates the correct point
> for the vswing programming is just before we enable the DDI.
> Make it so.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/di
On Fri, Jan 29, 2021 at 07:06:33PM +0200, Imre Deak wrote:
> On Thu, Jan 28, 2021 at 05:59:46PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Currently we only explicitly power up the combo PHY lanes
> > for DP. The spec says we should do it for HDMI as well.
> >
> > Cc: sta...@vge
On Fri, Jan 29, 2021 at 10:30:58AM +, Chris Wilson wrote:
> Quoting Matthew Brost (2021-01-28 22:56:04)
> > On Mon, Jan 25, 2021 at 02:01:15PM +, Chris Wilson wrote:
> > > Replace the priolist rbtree with a skiplist. The crucial difference is
> > > that walking and removing the first elemen
On Thu, Jan 28, 2021 at 05:59:46PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Currently we only explicitly power up the combo PHY lanes
> for DP. The spec says we should do it for HDMI as well.
>
> Cc: sta...@vger.kernel.org
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i91
== Series Details ==
Series: series starting with [v14,1/2] drm/i915/display: Support PSR Multiple
Instances
URL : https://patchwork.freedesktop.org/series/86445/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9699_full -> Patchwork_19539_full
=
On Thu, Jan 28, 2021 at 05:59:45PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Reduce the copypasta by pulling the combo PHY lane
> power up stuff into a helper. We'll have a third user soon.
>
> Cc: sta...@vger.kernel.org
> Signed-off-by: Ville Syrjälä
Reviewed-by: Imre Deak
> ---
On Thu, Jan 28, 2021 at 05:59:44PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> In thunderbolt mode the PHY is owned by the thunderbolt controller.
> We are not supposed to touch it. So skip the vswing programming
> as well (we already skipped the other steps not applicable to TBT).
>
>
== Series Details ==
Series: series starting with [1/2] drm/i915/display: Add a
intel_pipe_is_enabled() helper
URL : https://patchwork.freedesktop.org/series/86454/
State : failure
== Summary ==
Applying: drm/i915/display: Add a intel_pipe_is_enabled() helper
Applying: drm/i915/display: Make
== Series Details ==
Series: drm/i915: Add missing -EDEADLK path in execbuffer ggtt pinning.
URL : https://patchwork.freedesktop.org/series/86452/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9700 -> Patchwork_19543
Summar
== Series Details ==
Series: drm/i915/debugfs: HDCP capability enc NULL check
URL : https://patchwork.freedesktop.org/series/86440/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9698_full -> Patchwork_19538_full
Summary
---
== Series Details ==
Series: series starting with [v14,1/2] drm/i915/display: Support PSR Multiple
Instances
URL : https://patchwork.freedesktop.org/series/86433/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9698_full -> Patchwork_19537_full
=
== Series Details ==
Series: drm/i915: Remove obj->mm.lock! (rev14)
URL : https://patchwork.freedesktop.org/series/82337/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9695_full -> Patchwork_19530_full
Summary
---
**
On Wed, Jan 27, 2021 at 10:45:34AM +0200, Jani Nikula wrote:
> Make the child device details easier to read by turning this:
>
> [drm:parse_ddi_port [i915]] Port B VBT info: CRT:0 DVI:1 HDMI:1 DP:0 eDP:0
> LSPCON:0 USB-Type-C:0 TBT:0 DSC:0
> [drm:parse_ddi_port [i915]] VBT HDMI level shift for po
Chris Wilson writes:
> To capture a context after a gpu hang, we suspend the request and then
> resume its execution afterwards. If the context is already closed, we
> can assume that no one is interested in the result, but instead we are
> trying to terminate execution quickly as part of a force
== Series Details ==
Series: disable the QSES check for HDCP2.2 over MST (rev2)
URL : https://patchwork.freedesktop.org/series/86375/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9697_full -> Patchwork_19536_full
Summary
-
== Series Details ==
Series: drm/i915/gt: Only trust sseu subslice fuse if it is set
URL : https://patchwork.freedesktop.org/series/86451/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9699 -> Patchwork_19542
Summary
--
On Fri, 2021-01-29 at 11:17 +, Patchwork wrote:
Patch Details
Series: series starting with [CI,1/3] drm/i915: Nuke not needed members of
dram_info
URL:https://patchwork.freedesktop.org/series/86404/
State: success
Details:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19531/i
== Series Details ==
Series: series starting with [1/2] drm/i915/gvt: Parse default state to update
reg whitelist
URL : https://patchwork.freedesktop.org/series/86425/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9696_full -> Patchwork_19535_full
Op 29-01-2021 om 14:16 schreef Chris Wilson:
> Quoting Maarten Lankhorst (2021-01-29 13:11:37)
>> In reloc_iomap we swallow the -EDEADLK error, but this needs to
>> be returned for -EDEADLK handling. Add the missing check to
>> make bsw pass again.
> What lock? You already have the pages reserved,
== Series Details ==
Series: drm/i915/gt: Ignore error capturing a closed context
URL : https://patchwork.freedesktop.org/series/86447/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9699 -> Patchwork_19541
Summary
---
Factor the code to check if a pipe is currently enabled out of
assert_pipe() and put it in a new intel_pipe_is_enabled() helper,
so that it can be re-used without copy-pasting it.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/i915/display/intel_display.c | 20 ++--
drivers/gpu
As explained by a long comment block, on VLV intel_setup_outputs()
sometimes thinks there might be an eDP panel connected while there is none.
In this case intel_setup_outputs() will call intel_dp_init() to check.
In this scenario vlv_find_free_pps() ends up selecting pipe A for the pps,
even thou
Quoting Maarten Lankhorst (2021-01-29 13:11:37)
> In reloc_iomap we swallow the -EDEADLK error, but this needs to
> be returned for -EDEADLK handling. Add the missing check to
> make bsw pass again.
What lock? You already have the pages reserved, why are we not just using
the earlier reservation.
In reloc_iomap we swallow the -EDEADLK error, but this needs to
be returned for -EDEADLK handling. Add the missing check to
make bsw pass again.
Testcase: gem_exec_fence.basic-await
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 2 ++
1 file changed, 2 ins
== Series Details ==
Series: series starting with [v3,1/2] drm/i915/hdcp: update cp_irq_count_cached
in intel_dp_hdcp2_read_msg()
URL : https://patchwork.freedesktop.org/series/86424/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9696_full -> Patchwork_19534_full
== Series Details ==
Series: drm/i915/gt: Restrict the GT clock override to just Icelake
URL : https://patchwork.freedesktop.org/series/86446/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9699 -> Patchwork_19540
Summary
--
Since userspace cannot run without any subslices, it seems remarkable
that any system would be configured with all fused off. Ignore the fuse
register if it says 0.
References: https://gitlab.freedesktop.org/drm/intel/-/issues/3022
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_ss
== Series Details ==
Series: series starting with [v14,1/2] drm/i915/display: Support PSR Multiple
Instances
URL : https://patchwork.freedesktop.org/series/86445/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9699 -> Patchwork_19539
===
Quoting Chris Wilson (2021-01-29 12:06:20)
> To capture a context after a gpu hang, we suspend the request and then
> resume its execution afterwards. If the context is already closed, we
> can assume that no one is interested in the result, but instead we are
> trying to terminate execution quickl
To capture a context after a gpu hang, we suspend the request and then
resume its execution afterwards. If the context is already closed, we
can assume that no one is interested in the result, but instead we are
trying to terminate execution quickly as part of a forced-preemption.
In which case, do
On Fri, 29 Jan 2021, Chris Wilson wrote:
> Quoting Jani Nikula (2021-01-29 11:12:02)
>> On Thu, 28 Jan 2021, Matt Roper wrote:
>> > From: Vandita Kulkarni
>> >
>> > Add the qp table for 444 formats, for 8bpc, 10bpc and 12bpc, as given by
>> > the VESA C model for DSC 1.1
>> >
>> > Cc: Manasi Nav
== Series Details ==
Series: series starting with [v14,1/2] drm/i915/display: Support PSR Multiple
Instances
URL : https://patchwork.freedesktop.org/series/86445/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be check
== Series Details ==
Series: series starting with [v14,1/2] drm/i915/display: Support PSR Multiple
Instances
URL : https://patchwork.freedesktop.org/series/86445/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e7df7e13f87c drm/i915/display: Support PSR Multiple Instances
-:88:
Op 28-01-2021 om 17:47 schreef Jason Ekstrand:
> On Thu, Jan 28, 2021 at 10:26 AM Maarten Lankhorst
> wrote:
>> There are a couple of ioctl's related to tiling and cache placement,
>> that make no sense for userptr, reject those:
>> - i915_gem_set_tiling_ioctl()
>> Tiling should always be line
It appears that Elkhart Lake uses the same clock for CTX_TIMESTAMP as
CS_TIMESTAMP, leaving Icelake as the odd one out.
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3024
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c | 2 +-
1 file changed, 1 insertio
== Series Details ==
Series: series starting with [1/5] drm/i915: Skip vswing programming for TBT
(rev2)
URL : https://patchwork.freedesktop.org/series/86402/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9695_full -> Patchwork_19532_full
=
In order to support the PSR state of each transcoder, it adds
i915_psr_status to sub-directory of each transcoder.
v2: Change using of Symbolic permissions 'S_IRUGO' to using of octal
permissions '0444'
v5: Addressed JJani Nikula's review comments
- Remove checking of Gen12 for i915_psr_statu
It is a preliminary work for supporting multiple EDP PSR and
DP PanelReplay. And it refactors singleton PSR to Multi Transcoder
supportable PSR.
And this moves and renames the i915_psr structure of drm_i915_private's to
intel_dp's intel_psr structure.
It also causes changes in PSR interrupt handlin
== Series Details ==
Series: series starting with [CI,1/3] drm/i915: Nuke not needed members of
dram_info
URL : https://patchwork.freedesktop.org/series/86404/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9695_full -> Patchwork_19531_full
Quoting Jani Nikula (2021-01-29 11:12:02)
> On Thu, 28 Jan 2021, Matt Roper wrote:
> > From: Vandita Kulkarni
> >
> > Add the qp table for 444 formats, for 8bpc, 10bpc and 12bpc, as given by
> > the VESA C model for DSC 1.1
> >
> > Cc: Manasi Navare
> > Signed-off-by: Vandita Kulkarni
> > Signe
On Thu, 28 Jan 2021, Matt Roper wrote:
> From: Vandita Kulkarni
>
> Add the qp table for 444 formats, for 8bpc, 10bpc and 12bpc, as given by
> the VESA C model for DSC 1.1
>
> Cc: Manasi Navare
> Signed-off-by: Vandita Kulkarni
> Signed-off-by: Matt Roper
> ---
> .../gpu/drm/i915/display/inte
Quoting Matthew Brost (2021-01-28 22:56:04)
> On Mon, Jan 25, 2021 at 02:01:15PM +, Chris Wilson wrote:
> > Replace the priolist rbtree with a skiplist. The crucial difference is
> > that walking and removing the first element of a skiplist is O(1), but
> > O(lgN) for an rbtree, as we need to r
Quoting Tvrtko Ursulin (2021-01-29 09:37:27)
>
> On 28/01/2021 16:26, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2021-01-28 15:56:19)
>
> >>> -static void assert_priolists(struct i915_sched_engine * const se)
> >>> -{
> >>> - struct rb_node *rb;
> >>> - long last_prio;
> >>> -
> >>>
On 25/01/2021 14:01, Chris Wilson wrote:
Replace the priolist rbtree with a skiplist. The crucial difference is
that walking and removing the first element of a skiplist is O(1), but
O(lgN) for an rbtree, as we need to rebalance on remove. This is a
hindrance for submission latency as it occurs
== Series Details ==
Series: drm/i915/debugfs: HDCP capability enc NULL check
URL : https://patchwork.freedesktop.org/series/86440/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9698 -> Patchwork_19538
Summary
---
**
Quoting Tvrtko Ursulin (2021-01-29 09:18:50)
>
>
> On 26/01/2021 13:05, Chris Wilson wrote:
> > The client id used is a cyclic allocator as that reduces the likelihood
> > of userspace seeing the same id used again (and so confusing the new
> > client as the old). Verify that each new client has
On 28/01/2021 16:26, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2021-01-28 15:56:19)
-static void assert_priolists(struct i915_sched_engine * const se)
-{
- struct rb_node *rb;
- long last_prio;
-
- if (!IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
- return;
-
- GEM_BU
== Series Details ==
Series: series starting with [v14,1/2] drm/i915/display: Support PSR Multiple
Instances
URL : https://patchwork.freedesktop.org/series/86433/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9698 -> Patchwork_19537
===
On 28/01/2021 22:44, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2021-01-28 16:42:44)
On 28/01/2021 16:26, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2021-01-28 15:56:19)
On 25/01/2021 14:01, Chris Wilson wrote:
diff --git a/drivers/gpu/drm/i915/i915_priolist_types.h
b/drivers/gpu/drm/i9
On 26/01/2021 13:05, Chris Wilson wrote:
The client id used is a cyclic allocator as that reduces the likelihood
of userspace seeing the same id used again (and so confusing the new
client as the old). Verify that each new client has an id greater than
the last.
Signed-off-by: Chris Wilson
C
== Series Details ==
Series: series starting with [v14,1/2] drm/i915/display: Support PSR Multiple
Instances
URL : https://patchwork.freedesktop.org/series/86433/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be check
== Series Details ==
Series: series starting with [v14,1/2] drm/i915/display: Support PSR Multiple
Instances
URL : https://patchwork.freedesktop.org/series/86433/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2beed3acee30 drm/i915/display: Support PSR Multiple Instances
-:88:
DP-MST connector encoder initializes at modeset
Adding a connector->encoder NULL check in order to
avoid any NULL pointer dereference.
intel_hdcp_enable() already handle this but debugfs
can also invoke the intel_{hdcp,hdcp2_capable}.
Handling it gracefully.
Signed-off-by: Anshuman Gupta
---
dri
On 2021.01.29 00:49:33 +, Chris Wilson wrote:
> Use the right intel_gt stored as a backpointer in intel_vgpu.
>
> Signed-off-by: Chris Wilson
> ---
Reviewed-by: Zhenyu Wang
I'll queue these two. Thanks!
> drivers/gpu/drm/i915/gvt/execlist.c | 8 +++-
> drivers/gpu/drm/i915/gvt/sched
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