Hi Venkata,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next linus/master v5.6 next-20200410]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we
== Series Details ==
Series: cpufreq/pstate: Only mention the BIOS disabling turbo mode once
URL : https://patchwork.freedesktop.org/series/75815/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8290_full -> Patchwork_17280_full
==
Hi Chris,
On Wed, Apr 08, 2020 at 11:24:08AM +0100, Chris Wilson wrote:
> Hang tests are slow since we must wait for the kernel to detect the GPU
> hang before it forcibly completes the execution and signals the fence.
> The flip is not allowed before the fence is signaled and so must wait.
> Our
== Series Details ==
Series: series starting with [v3,1/3] drm/dp: DRM DP helper for reading Ignore
MSA from DPCD
URL : https://patchwork.freedesktop.org/series/75820/
State : failure
== Summary ==
Applying: drm/dp: DRM DP helper for reading Ignore MSA from DPCD
Applying: drm/i915/dp: Attach
From: Bhanuprakash Modem
[Why]
It's useful to know the min and max vrr range for IGT testing.
[How]
Expose the min and max vfreq for the connector via a debugfs file
on the connector, "i915_vrr_info".
Example usage: cat /sys/kernel/debug/dri/0/DP-1/i915_vrr_info
v2:
* Fix the typo in max_vfreq
From: Aditya Swarup
This function sets the VRR property for connector based
on the platform support, EDID monitor range and DP sink
DPCD capability of outputing video without msa
timing information.
v3:
* intel_dp_is_vrr_capable can be used for debugfs, make it
non static (Manasi)
v2:
* Just set
DP sink device sets the Ignore MSA bit in its
DP_DOWNSTREAM_PORT_COUNT register to indicate its ability to
ignore the MSA video timing parameters and its ability to support
seamless video timing change over a range of timing exposed by
DisplayID and EDID.
This is required for the sink to indicate t
== Series Details ==
Series: drm/i915/gt: remove redundant assignment to variable x
URL : https://patchwork.freedesktop.org/series/75814/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8290_full -> Patchwork_17279_full
Summa
Hi Venkata,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next linus/master v5.6 next-20200410]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we
== Series Details ==
Series: cpufreq/pstate: Only mention the BIOS disabling turbo mode once
URL : https://patchwork.freedesktop.org/series/75815/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8290 -> Patchwork_17280
Summar
On Tue, Apr 7, 2020 at 12:48 AM Pavel Machek wrote:
>
> >
> > Beyond the fix already submitted?
>
> I did not get that one, can I have a pointer?
What's the status of this one?
I'm assuming the fix is commit 721017cf4bd8 ("drm/i915/gem: Ignore
readonly failures when updating relics"), but didn't
== Series Details ==
Series: drm/i915/gt: remove redundant assignment to variable x
URL : https://patchwork.freedesktop.org/series/75814/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8290 -> Patchwork_17279
Summary
---
On Fri, 2020-04-10 at 15:43 +0100, Chris Wilson wrote:
> Flush the async power domain work after aborting the module probe:
>
> <3> [307.785552] ODEBUG: free active (active state 0) object type:
> timer_list hint: intel_display_power_put_async_work+0x0/0xf0 [i915]
>
> Closes: https://gitlab.freed
On Fri, Apr 10, 2020 at 05:56:13PM +0200, Rafael J. Wysocki wrote:
> From: "Rafael J. Wysocki"
>
> Rename DPM_FLAG_NEVER_SKIP to DPM_FLAG_NO_DIRECT_COMPLETE which
> matches its purpose more closely.
>
> No functional impact.
>
> Signed-off-by: Rafael J. Wysocki
Acked-by: Bjorn Helgaas # for
Make a note of the first time we discover the turbo mode has been
disabled by the BIOS, as otherwise we complain every time we try to
update the mode.
Signed-off-by: Chris Wilson
Cc: Srinivas Pandruvada
Cc: Len Brown
Cc: "Rafael J. Wysocki"
Cc: Viresh Kumar
---
drivers/cpufreq/intel_pstate.c
From: Colin Ian King
The variable x is being initialized with a value that is never read
and it is being updated later with a new value. The initialization is
redundant and can be removed.
Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/i915/gt/intel_eng
== Series Details ==
Series: drm/i915: Flush async power domains on probe failure
URL : https://patchwork.freedesktop.org/series/75805/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8290_full -> Patchwork_17277_full
Summary
== Series Details ==
Series: series starting with [1/4] drm/i915: introduce a mechanism to extend
execbuf2
URL : https://patchwork.freedesktop.org/series/75810/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8290 -> Patchwork_17278
=
Seems to be some issue in lmem self tests: :<4> [342.485150] intel_pstate:
Turbo disabled by BIOS or unavailable on processor.
This is not related to SAGV.
Best Regards,
Lisovskiy Stanislav
Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo
__
== Series Details ==
Series: series starting with [1/4] drm/i915: introduce a mechanism to extend
execbuf2
URL : https://patchwork.freedesktop.org/series/75810/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915: introduce a mechanism to extend e
== Series Details ==
Series: series starting with [1/4] drm/i915: introduce a mechanism to extend
execbuf2
URL : https://patchwork.freedesktop.org/series/75810/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f52f98b82c3b drm/i915: introduce a mechanism to extend execbuf2
-:141:
simple tests using drm api for timeline semaphore.
Signed-off-by: Venkata Sandeep Dhanalakota
---
drivers/gpu/drm/selftests/Makefile| 2 +-
.../drm/selftests/drm_timeline_selftests.h| 16 +
.../selftests/test-drm_timeline_semaphore.c | 545 ++
3 files changed
From: Lionel Landwerlin
To allow faster engine to engine synchronization, peel the layer of
dma-fence-chain to expose potential i915 fences so that the
i915-request code can emit HW semaphore wait/signal operations in the
ring which is faster than waking up the host to submit unblocked
workloads
Introduces a new parameters to execbuf so that we can specify syncobj
handles as well as timeline points.
v2: Reuse i915_user_extension_fn
v3: Check that the chained extension is only present once (Chris)
v4: Check that dma_fence_chain_find_seqno returns a non NULL fence
(Lionel)
v5: Use BIT_UL
From: Lionel Landwerlin
We're planning to use this for a couple of new feature where we need
to provide additional parameters to execbuf.
v2: Check for invalid flags in execbuffer2 (Lionel)
v3: Rename I915_EXEC_EXT -> I915_EXEC_USE_EXTENSIONS (Chris)
Signed-off-by: Lionel Landwerlin
Reviewed-
On 03/04/2020 12:12, Chris Wilson wrote:
A few very simple testcases to exercise the dma-fence-chain API.
Signed-off-by: Chris Wilson
---
drivers/dma-buf/Makefile | 3 +-
drivers/dma-buf/selftests.h | 1 +
drivers/dma-buf/st-dma-fence-chain.c | 713 +
From: "Rafael J. Wysocki"
Rename DPM_FLAG_NEVER_SKIP to DPM_FLAG_NO_DIRECT_COMPLETE which
matches its purpose more closely.
No functional impact.
Signed-off-by: Rafael J. Wysocki
---
Documentation/driver-api/pm/devices.rst| 6 +++---
Documentation/power/pci.rst| 10 +-
Hi Chris,
> With timeslice yielding on a semaphore, we may complete timeslices much
> faster than we were expecting and already have yielded the stuck
> request. Before complaining that timeslicing is not enabled, check that
> we haven't already applied the switch.
>
> Signed-off-by: Chris Wilson
== Series Details ==
Series: drm/i915: Flush async power domains on probe failure
URL : https://patchwork.freedesktop.org/series/75805/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8290 -> Patchwork_17277
Summary
---
== Series Details ==
Series: drm/i915: Flush async power domains on probe failure
URL : https://patchwork.freedesktop.org/series/75805/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a52e41b23f79 drm/i915: Flush async power domains on probe failure
-:11: WARNING:COMMIT_LOG_LONG_
Flush the async power domain work after aborting the module probe:
<3> [307.785552] ODEBUG: free active (active state 0) object type: timer_list
hint: intel_display_power_put_async_work+0x0/0xf0 [i915]
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1647
Fixes: b664259f3fe2 ("drm/i915:
== Series Details ==
Series: agp/intel: Reinforce the barrier after GTT updates (rev2)
URL : https://patchwork.freedesktop.org/series/75785/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8289_full -> Patchwork_17274_full
Su
Hi Chris,
> After changing the timing between GTT updates and execution on the GPU,
> we started seeing sporadic failures on Ironlake. These were narrowed
> down to being an insufficiently strong enough barrier/delay after
> updating the GTT and scheduling execution on the GPU. By forcing the
> un
== Series Details ==
Series: drm/i915/display: Poison the async power domain on shutdown
URL : https://patchwork.freedesktop.org/series/75784/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8289_full -> Patchwork_17273_full
== Series Details ==
Series: SAGV support for Gen12+ (rev18)
URL : https://patchwork.freedesktop.org/series/75129/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8289 -> Patchwork_17276
Summary
---
**FAILURE**
Seri
== Series Details ==
Series: drm/i915/selftests: Check for an already completed timeslice
URL : https://patchwork.freedesktop.org/series/75783/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8288_full -> Patchwork_17272_full
== Series Details ==
Series: SAGV support for Gen12+ (rev18)
URL : https://patchwork.freedesktop.org/series/75129/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915: Start passing latency as parameter
Okay!
Commit: drm/i915: Eliminate magic numb
Starting from TGL we need to have a separate wm0
values for SAGV and non-SAGV which affects
how calculations are done.
v2: Remove long lines
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/display/intel_display.c | 8 +-
.../drm/i915/display/intel_display_types.h| 3 +
driv
Introduce platform dependent SAGV checking in
combination with bandwidth state pipe SAGV mask.
v2: Fix rebase conflict
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/intel_pm.c | 39 +++--
1 file changed, 27 insertions(+), 12 deletions(-)
diff --git a/d
Future platforms require per-crtc SAGV evaluation
and serializing global state when those are changed
from different commits.
v2: - Add has_sagv check to intel_crtc_can_enable_sagv
so that it sets bit in reject mask.
- Use bw_state in intel_pre/post_plane_enable_sagv
instead of ato
Addressing one of the comments, recommending to extract platform
specific code from intel_can_enable_sagv as a preparation, before
we are going to add support for tgl+.
v2: - Removed whitespace
Signed-off-by: Stanislav Lisovskiy
---
drivers/gpu/drm/i915/intel_pm.c | 66 ++---
== Series Details ==
Series: Patch "drm/i915: Fix ref->mutex deadlock in i915_active_wait()" has
been added to the 5.4-stable tree
URL : https://patchwork.freedesktop.org/series/75798/
State : failure
== Summary ==
Patch is empty.
When you have resolved this problem, run "git am --continue".
This is a note to let you know that I've just added the patch titled
drm/i915: Fix ref->mutex deadlock in i915_active_wait()
to the 5.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
== Series Details ==
Series: agp/intel: Reinforce the barrier after GTT updates (rev2)
URL : https://patchwork.freedesktop.org/series/75785/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8289 -> Patchwork_17274
Summary
== Series Details ==
Series: agp/intel: Reinforce the barrier after GTT updates (rev2)
URL : https://patchwork.freedesktop.org/series/75785/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c1e1db29df8c agp/intel: Reinforce the barrier after GTT updates
-:42: WARNING:MEMORY_BARRIE
== Series Details ==
Series: drm/i915/display: Poison the async power domain on shutdown
URL : https://patchwork.freedesktop.org/series/75784/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8289 -> Patchwork_17273
Summary
--
On Tue, Apr 07, 2020 at 12:18:09AM -0700, Sultan Alsawaf wrote:
> From: Sultan Alsawaf
>
> The following deadlock exists in i915_active_wait() due to a double lock
> on ref->mutex (call chain listed in order from top to bottom):
> i915_active_wait();
> mutex_lock_interruptible(&ref->mutex); <--
== Series Details ==
Series: drm/i915/selftests: Check for an already completed timeslice
URL : https://patchwork.freedesktop.org/series/75783/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8288 -> Patchwork_17272
Summary
-
After changing the timing between GTT updates and execution on the GPU,
we started seeing sporadic failures on Ironlake. These were narrowed
down to being an insufficiently strong enough barrier/delay after
updating the GTT and scheduling execution on the GPU. By forcing the
uncached read, and addi
From: Chris Wilson
After changing the timing between GTT updates and execution on the GPU,
we started seeing sporadic failures on Ironlake. These were narrowed
down to being an insufficiently strong enough barrier/delay after
updating the GTT and scheduling execution on the GPU. By forcing the
un
Lets see if we can find who is still running after the driver has been
removed!
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/display/intel_display_power.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
b/drivers/gpu/drm/i915/displa
With timeslice yielding on a semaphore, we may complete timeslices much
faster than we were expecting and already have yielded the stuck
request. Before complaining that timeslicing is not enabled, check that
we haven't already applied the switch.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/
== Series Details ==
Series: SAGV support for Gen12+ (rev14)
URL : https://patchwork.freedesktop.org/series/75129/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8285_full -> Patchwork_17271_full
Summary
---
**FAILURE
== Series Details ==
Series: series starting with [1/2] drm/i915: remove unneeded ccflags-y from
gvt/Makefile
URL : https://patchwork.freedesktop.org/series/75756/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8284_full -> Patchwork_17270_full
== Series Details ==
Series: drm/i915: remove redundant assignment to variable err
URL : https://patchwork.freedesktop.org/series/75747/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8284_full -> Patchwork_17269_full
Summar
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