Re: [Intel-gfx] [PATCH] kernel.h: Add non_block_start/end()

2019-05-21 Thread Michal Hocko
On Wed 22-05-19 06:06:31, Tetsuo Handa wrote: [...] > Since OOM notifier will be called after shrinkers are attempted, > can i915 move from OOM notifier to shrinker? That would be indeed preferable. OOM notifier is an API from hell. -- Michal Hocko SUSE Labs _

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix the interpretation of MAX_PRE-EMPHASIS_REACHED bit inorder to pass Link Layer compliance test number 400.3.1.15 (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: drm/i915: Fix the interpretation of MAX_PRE-EMPHASIS_REACHED bit inorder to pass Link Layer compliance test number 400.3.1.15 (rev2) URL : https://patchwork.freedesktop.org/series/60880/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6113_full -> P

Re: [Intel-gfx] [PATCH 2/5] drm/i915/perf: allow holding preemption on filtered ctx

2019-05-21 Thread kbuild test robot
Hi Lionel, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on next-20190521] [cannot apply to v5.2-rc1] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,01/10] drm/i915: Restore control over ppgtt for context creation ABI

2019-05-21 Thread Patchwork
== Series Details == Series: series starting with [CI,01/10] drm/i915: Restore control over ppgtt for context creation ABI URL : https://patchwork.freedesktop.org/series/60931/ State : success == Summary == CI Bug Log - changes from CI_DRM_6115 -> Patchwork_13066 =

Re: [Intel-gfx] [PATCH] drm/i915: Fix the interpretation of MAX_PRE-EMPHASIS_REACHED bit inorder to pass Link Layer compliance test number 400.3.1.15

2019-05-21 Thread Manasi Navare
On Tue, May 21, 2019 at 04:24:58PM +0300, Ville Syrjälä wrote: > On Mon, May 20, 2019 at 04:25:41PM -0700, Khaled Almahallawy wrote: > > According to DP 1.4 standard, if the source supports four pre-emphasis > > levels, then the source shall set the bit MAX_PRE-EMPHASIS_REACHED = 1 only > > when

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,01/10] drm/i915: Restore control over ppgtt for context creation ABI

2019-05-21 Thread Patchwork
== Series Details == Series: series starting with [CI,01/10] drm/i915: Restore control over ppgtt for context creation ABI URL : https://patchwork.freedesktop.org/series/60931/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Restore control o

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,01/10] drm/i915: Restore control over ppgtt for context creation ABI

2019-05-21 Thread Patchwork
== Series Details == Series: series starting with [CI,01/10] drm/i915: Restore control over ppgtt for context creation ABI URL : https://patchwork.freedesktop.org/series/60931/ State : warning == Summary == $ dim checkpatch origin/drm-tip a7f0011a8006 drm/i915: Restore control over ppgtt for

Re: [Intel-gfx] [PATCH v3 2/2] drm/i915: add in-kernel blitter client

2019-05-21 Thread Chris Wilson
Quoting Matthew Auld (2019-05-21 21:42:35) > +static void clear_pages_signal_irq_worker(struct irq_work *work) > +{ > + struct clear_pages_work *w = container_of(work, typeof(*w), irq_work); > + > + dma_fence_signal(&w->dma); > + dma_fence_put(&w->dma); > +} > + > +static void cle

Re: [Intel-gfx] Comments in Fixes: line (Was: Re: linux-next: Fixes tag needs some work in the drm-intel tree)

2019-05-21 Thread Stephen Rothwell
Hi Joonas, On Tue, 21 May 2019 16:04:16 +0300 Joonas Lahtinen wrote: > > We also have an incoming patch where the Fixes: line has a comment in > it. Does your tooling account for this when checking the Fixes: line? I will make sure mine does. -- Cheers, Stephen Rothwell pgpcXXON36fiK.pgp De

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/2] drm/i915/gtt: grab wakeref in gen6_alloc_va_range

2019-05-21 Thread Patchwork
== Series Details == Series: series starting with [v3,1/2] drm/i915/gtt: grab wakeref in gen6_alloc_va_range URL : https://patchwork.freedesktop.org/series/60930/ State : success == Summary == CI Bug Log - changes from CI_DRM_6114 -> Patchwork_13065 ===

[Intel-gfx] [CI 02/10] drm/i915: Allow a context to define its set of engines

2019-05-21 Thread Chris Wilson
Over the last few years, we have debated how to extend the user API to support an increase in the number of engines, that may be sparse and even be heterogeneous within a class (not all video decoders created equal). We settled on using (class, instance) tuples to identify a specific engine, with a

[Intel-gfx] [CI 06/10] drm/i915: Load balancing across a virtual engine

2019-05-21 Thread Chris Wilson
Having allowed the user to define a set of engines that they will want to only use, we go one step further and allow them to bind those engines into a single virtual instance. Submitting a batch to the virtual engine will then forward it to any one of the set in a manner as best to distribute load.

[Intel-gfx] [CI 07/10] drm/i915: Apply an execution_mask to the virtual_engine

2019-05-21 Thread Chris Wilson
Allow the user to direct which physical engines of the virtual engine they wish to execute one, as sometimes it is necessary to override the load balancing algorithm. v2: Only kick the virtual engines on context-out if required Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko

[Intel-gfx] [CI 03/10] drm/i915: Extend I915_CONTEXT_PARAM_SSEU to support local ctx->engine[]

2019-05-21 Thread Chris Wilson
Allow the user to specify a local engine index (as opposed to class:index) that they can use to refer to a preset engine inside the ctx->engine[] array defined by an earlier I915_CONTEXT_PARAM_ENGINES. This will be useful for setting SSEU parameters on virtual engines that are local to the context

[Intel-gfx] [CI 04/10] drm/i915: Re-expose SINGLE_TIMELINE flags for context creation

2019-05-21 Thread Chris Wilson
The SINGLE_TIMELINE flag can be used to create a context such that all engine instances within that context share a common timeline. This can be useful for mixing operations between real and virtual engines, or when using a composite context for a single client API context. Signed-off-by: Chris Wi

[Intel-gfx] [CI 09/10] drm/i915/execlists: Virtual engine bonding

2019-05-21 Thread Chris Wilson
Some users require that when a master batch is executed on one particular engine, a companion batch is run simultaneously on a specific slave engine. For this purpose, we introduce virtual engine bonding, allowing maps of master:slaves to be constructed to constrain which physical engines a virtual

[Intel-gfx] [CI 01/10] drm/i915: Restore control over ppgtt for context creation ABI

2019-05-21 Thread Chris Wilson
Having hid the partially exposed new ABI from the PR, put it back again for completion of context recovery. A significant part of context recovery is the ability to reuse as much of the old context as is feasible (to avoid expensive reconstruction). The biggest chunk kept hidden at the moment is fi

[Intel-gfx] [CI 08/10] drm/i915: Extend execution fence to support a callback

2019-05-21 Thread Chris Wilson
In the next patch, we will want to configure the slave request depending on which physical engine the master request is executed on. For this, we introduce a callback from the execute fence to convey this information. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i

[Intel-gfx] [CI 10/10] drm/i915: Allow specification of parallel execbuf

2019-05-21 Thread Chris Wilson
There is a desire to split a task onto two engines and have them run at the same time, e.g. scanline interleaving to spread the workload evenly. Through the use of the out-fence from the first execbuf, we can coordinate secondary execbuf to only become ready simultaneously with the first, so that w

[Intel-gfx] [CI 05/10] drm/i915: Allow userspace to clone contexts on creation

2019-05-21 Thread Chris Wilson
A usecase arose out of handling context recovery in mesa, whereby they wish to recreate a context with fresh logical state but preserving all other details of the original. Currently, they create a new context and iterate over which bits they want to copy across, but it would much more convenient i

Re: [Intel-gfx] [PATCH] kernel.h: Add non_block_start/end()

2019-05-21 Thread Tetsuo Handa
On 2019/05/21 23:44, Daniel Vetter wrote: OOM notifiers should not depend on any locks or sleepable conditionals. If some lock directly or indirectly depended on __GFP_DIRECT_RECLAIM, it will deadlock. Thus, despite blocking API, this should effectively be non-blocking. All OOM

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v3,1/2] drm/i915/gtt: grab wakeref in gen6_alloc_va_range

2019-05-21 Thread Patchwork
== Series Details == Series: series starting with [v3,1/2] drm/i915/gtt: grab wakeref in gen6_alloc_va_range URL : https://patchwork.freedesktop.org/series/60930/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/gtt: grab wakeref in gen6_alloc_

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/2] drm/i915/gtt: grab wakeref in gen6_alloc_va_range

2019-05-21 Thread Patchwork
== Series Details == Series: series starting with [v3,1/2] drm/i915/gtt: grab wakeref in gen6_alloc_va_range URL : https://patchwork.freedesktop.org/series/60930/ State : warning == Summary == $ dim checkpatch origin/drm-tip c2a5e301596f drm/i915/gtt: grab wakeref in gen6_alloc_va_range dd9e0

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for C: Revert "net/sch_generic: Shut up noise"

2019-05-21 Thread Daniel Vetter
On Fri, May 17, 2019 at 09:02:46AM -, Patchwork wrote: > == Series Details == > > Series: C: Revert "net/sch_generic: Shut up noise" > URL : https://patchwork.freedesktop.org/series/60758/ > State : success Discussed with Martin on irc, he's ok with us dropping this one. There's still a cib

[Intel-gfx] [PATCH v3 2/2] drm/i915: add in-kernel blitter client

2019-05-21 Thread Matthew Auld
The plan is to use the blitter engine for async object clearing when using local memory, but before we can move the worker to get_pages() we have to first tame some more of our struct_mutex usage. With this in mind we should be able to upstream the object clearing as some selftests, which should se

[Intel-gfx] [PATCH v3 1/2] drm/i915/gtt: grab wakeref in gen6_alloc_va_range

2019-05-21 Thread Matthew Auld
Some steps in gen6_alloc_va_range require the HW to be awake, so ideally we should be grabbing the wakeref ourselves and not relying on the caller already holding it for us. Suggested-by: Chris Wilson Signed-off-by: Matthew Auld Reviewed-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem_gtt.c

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Re-add enable_rc6 modparam

2019-05-21 Thread Summers, Stuart
On Fri, 2019-05-17 at 09:17 -0700, Rodrigo Vivi wrote: > On Thu, May 16, 2019 at 03:49:19PM +, Summers, Stuart wrote: > > On Thu, 2019-05-16 at 18:42 +0300, Jani Nikula wrote: > > > On Thu, 16 May 2019, "Summers, Stuart" > > > wrote: > > > > On Thu, 2019-05-16 at 12:59 +0300, Jani Nikula wrote

Re: [Intel-gfx] [18/21] drm/i915: extract intel_runtime_pm.h from intel_drv.h

2019-05-21 Thread Nathan Chancellor
Hi Jani, On Mon, Apr 29, 2019 at 03:29:36PM +0300, Jani Nikula wrote: > It used to be handy that we only had a couple of headers, but over time > intel_drv.h has become unwieldy. Extract declarations to a separate > header file corresponding to the implementation module, clarifying the > modularit

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/2] drm/i915: Make sandybridge_pcode_read() deal with the second data register

2019-05-21 Thread Patchwork
== Series Details == Series: series starting with [v5,1/2] drm/i915: Make sandybridge_pcode_read() deal with the second data register URL : https://patchwork.freedesktop.org/series/60921/ State : success == Summary == CI Bug Log - changes from CI_DRM_6114 -> Patchwork_13064 ==

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v5,1/2] drm/i915: Make sandybridge_pcode_read() deal with the second data register

2019-05-21 Thread Patchwork
== Series Details == Series: series starting with [v5,1/2] drm/i915: Make sandybridge_pcode_read() deal with the second data register URL : https://patchwork.freedesktop.org/series/60921/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Make s

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v5,1/2] drm/i915: Make sandybridge_pcode_read() deal with the second data register

2019-05-21 Thread Patchwork
== Series Details == Series: series starting with [v5,1/2] drm/i915: Make sandybridge_pcode_read() deal with the second data register URL : https://patchwork.freedesktop.org/series/60921/ State : warning == Summary == $ dim checkpatch origin/drm-tip e58657ffae31 drm/i915: Make sandybridge_pco

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] mm: Check if mmu notifier callbacks are allowed to fail (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: series starting with [1/4] mm: Check if mmu notifier callbacks are allowed to fail (rev2) URL : https://patchwork.freedesktop.org/series/60874/ State : success == Summary == CI Bug Log - changes from CI_DRM_6114 -> Patchwork_13063 =

Re: [Intel-gfx] [PATCH 4/5] drm/i915: add a new perf configuration execbuf parameter

2019-05-21 Thread Lionel Landwerlin
On 21/05/2019 18:48, Chris Wilson wrote: Quoting Lionel Landwerlin (2019-05-21 18:19:50) On 21/05/2019 18:07, Chris Wilson wrote: Quoting Lionel Landwerlin (2019-05-21 15:08:54) + if (eb->oa_config && + eb->oa_config != eb->i915->perf.oa.exclusive_stream->oa_config) { But the

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] mm: Check if mmu notifier callbacks are allowed to fail (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: series starting with [1/4] mm: Check if mmu notifier callbacks are allowed to fail (rev2) URL : https://patchwork.freedesktop.org/series/60874/ State : warning == Summary == $ dim checkpatch origin/drm-tip b2f1812e79cc mm: Check if mmu notifier callbacks are allow

Re: [Intel-gfx] [PATCH 2/5] drm/i915/perf: allow holding preemption on filtered ctx

2019-05-21 Thread Lionel Landwerlin
On 21/05/2019 18:17, Chris Wilson wrote: Quoting Lionel Landwerlin (2019-05-21 17:50:30) On 21/05/2019 17:36, Chris Wilson wrote: Quoting Lionel Landwerlin (2019-05-21 15:08:52) diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index f263a8374273..2ad95977

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v4,1/2] drm/i915/selftests: Verify context workarounds (rev3)

2019-05-21 Thread Patchwork
== Series Details == Series: series starting with [v4,1/2] drm/i915/selftests: Verify context workarounds (rev3) URL : https://patchwork.freedesktop.org/series/60857/ State : success == Summary == CI Bug Log - changes from CI_DRM_6114 -> Patchwork_13062 ===

Re: [Intel-gfx] [PATCH 4/5] drm/i915: add a new perf configuration execbuf parameter

2019-05-21 Thread Chris Wilson
Quoting Lionel Landwerlin (2019-05-21 18:19:50) > On 21/05/2019 18:07, Chris Wilson wrote: > > Quoting Lionel Landwerlin (2019-05-21 15:08:54) > >> + if (eb->oa_config && > >> + eb->oa_config != > >> eb->i915->perf.oa.exclusive_stream->oa_config) { > > But the oa_config is not orde

[Intel-gfx] ✗ Fi.CI.BAT: failure for fbcon notifier begone! (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: fbcon notifier begone! (rev2) URL : https://patchwork.freedesktop.org/series/60843/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6114 -> Patchwork_13061 Summary --- **FAILURE** Seriou

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Vulkan performance query support

2019-05-21 Thread Patchwork
== Series Details == Series: drm/i915: Vulkan performance query support URL : https://patchwork.freedesktop.org/series/60916/ State : failure == Summary == CI Bug Log - changes from CI_DRM_6114 -> Patchwork_13060 Summary --- **FAILUR

[Intel-gfx] ✓ Fi.CI.IGT: success for drm: Allow modeset on unregisted connectors unconditionally (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: drm: Allow modeset on unregisted connectors unconditionally (rev2) URL : https://patchwork.freedesktop.org/series/60871/ State : success == Summary == CI Bug Log - changes from CI_DRM_6110_full -> Patchwork_13054_full ===

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for fbcon notifier begone! (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: fbcon notifier begone! (rev2) URL : https://patchwork.freedesktop.org/series/60843/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: dummycon: Sprinkle locking checks Okay! Commit: fbdev: locking check for fb_set_suspend Oka

Re: [Intel-gfx] [PATCH 4/5] drm/i915: add a new perf configuration execbuf parameter

2019-05-21 Thread Lionel Landwerlin
On 21/05/2019 18:07, Chris Wilson wrote: Quoting Lionel Landwerlin (2019-05-21 15:08:54) + if (eb->oa_config && + eb->oa_config != eb->i915->perf.oa.exclusive_stream->oa_config) { But the oa_config is not ordered with respect to requests, and the registers changed here are not c

Re: [Intel-gfx] [PATCH 2/5] drm/i915/perf: allow holding preemption on filtered ctx

2019-05-21 Thread Chris Wilson
Quoting Lionel Landwerlin (2019-05-21 17:50:30) > On 21/05/2019 17:36, Chris Wilson wrote: > > Quoting Lionel Landwerlin (2019-05-21 15:08:52) > >> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c > >> b/drivers/gpu/drm/i915/gt/intel_lrc.c > >> index f263a8374273..2ad95977f7a8 100644 > >> --- a/dr

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: add i2c symlink under hdmi connector (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: drm/i915: add i2c symlink under hdmi connector (rev2) URL : https://patchwork.freedesktop.org/series/60866/ State : success == Summary == CI Bug Log - changes from CI_DRM_6110_full -> Patchwork_13053_full Summar

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for fbcon notifier begone! (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: fbcon notifier begone! (rev2) URL : https://patchwork.freedesktop.org/series/60843/ State : warning == Summary == $ dim checkpatch origin/drm-tip 6712c9a81334 dummycon: Sprinkle locking checks -:45: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal

Re: [Intel-gfx] [PATCH 4/5] drm/i915: add a new perf configuration execbuf parameter

2019-05-21 Thread Chris Wilson
Quoting Lionel Landwerlin (2019-05-21 15:08:54) > + if (eb->oa_config && > + eb->oa_config != eb->i915->perf.oa.exclusive_stream->oa_config) { But the oa_config is not ordered with respect to requests, and the registers changed here are not context saved and so may be changed by a

Re: [Intel-gfx] [PATCH 3/5] drm/i915/perf: allow for CS OA configs to be created lazily

2019-05-21 Thread Lionel Landwerlin
On 21/05/2019 17:43, Chris Wilson wrote: Quoting Lionel Landwerlin (2019-05-21 15:08:53) Here we introduce a mechanism by which the execbuf part of the i915 driver will be able to request that a batch buffer containing the programming for a particular OA config be created. We'll execute these O

Re: [Intel-gfx] [PATCH 2/5] drm/i915/perf: allow holding preemption on filtered ctx

2019-05-21 Thread Lionel Landwerlin
On 21/05/2019 17:36, Chris Wilson wrote: Quoting Lionel Landwerlin (2019-05-21 15:08:52) diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index f263a8374273..2ad95977f7a8 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_l

Re: [Intel-gfx] [PATCH] drm/i915: add force_probe module parameter to replace alpha_support

2019-05-21 Thread Rodrigo Vivi
On Mon, May 06, 2019 at 04:48:01PM +0300, Jani Nikula wrote: > The i915.alpha_support module parameter has caused some confusion along > the way. Add new i915.force_probe parameter to specify PCI IDs of > devices to probe, when the devices are recognized but not automatically > probed by the driver

Re: [Intel-gfx] [PATCH 3/5] drm/i915/perf: allow for CS OA configs to be created lazily

2019-05-21 Thread Chris Wilson
Quoting Lionel Landwerlin (2019-05-21 15:08:53) > Here we introduce a mechanism by which the execbuf part of the i915 > driver will be able to request that a batch buffer containing the > programming for a particular OA config be created. > > We'll execute these OA configuration buffers right befo

[Intel-gfx] [PATCH v5 2/2] drm/i915: Make sure we have enough memory bandwidth on ICL

2019-05-21 Thread Ville Syrjala
From: Ville Syrjälä ICL has so many planes that it can easily exceed the maximum effective memory bandwidth of the system. We must therefore check that we don't exceed that limit. The algorithm is very magic number heavy and lacks sufficient explanation for now. We also have no sane way to query

[Intel-gfx] [PATCH v5 1/2] drm/i915: Make sandybridge_pcode_read() deal with the second data register

2019-05-21 Thread Ville Syrjala
From: Ville Syrjälä The pcode mailbox has two data registers. So far we've only ever used the one, but that's about to change. Expose the second data register to the callers of sandybridge_pcode_read(). Signed-off-by: Ville Syrjälä Reviewed-by: Clint Taylor Reviewed-by: Radhakrishna Sripada R

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Vulkan performance query support

2019-05-21 Thread Patchwork
== Series Details == Series: drm/i915: Vulkan performance query support URL : https://patchwork.freedesktop.org/series/60916/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/perf: introduce a versioning of the i915-perf uapi Okay! Commit: drm/

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Vulkan performance query support

2019-05-21 Thread Patchwork
== Series Details == Series: drm/i915: Vulkan performance query support URL : https://patchwork.freedesktop.org/series/60916/ State : warning == Summary == $ dim checkpatch origin/drm-tip 9577e457931d drm/i915/perf: introduce a versioning of the i915-perf uapi 3744cae4f12a drm/i915/perf: allow

Re: [Intel-gfx] [PATCH 2/5] drm/i915/perf: allow holding preemption on filtered ctx

2019-05-21 Thread Chris Wilson
Quoting Lionel Landwerlin (2019-05-21 15:08:52) > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c > b/drivers/gpu/drm/i915/gt/intel_lrc.c > index f263a8374273..2ad95977f7a8 100644 > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > @@ -2085,7 +2085,7 @@ stati

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,01/10] drm/i915: Restore control over ppgtt for context creation ABI

2019-05-21 Thread Patchwork
== Series Details == Series: series starting with [CI,01/10] drm/i915: Restore control over ppgtt for context creation ABI URL : https://patchwork.freedesktop.org/series/60909/ State : success == Summary == CI Bug Log - changes from CI_DRM_6114 -> Patchwork_13059 =

Re: [Intel-gfx] [PATCH 4/4] mm, notifier: Add a lockdep map for invalidate_range_start

2019-05-21 Thread Jerome Glisse
On Tue, May 21, 2019 at 06:00:36PM +0200, Daniel Vetter wrote: > On Tue, May 21, 2019 at 5:41 PM Jerome Glisse wrote: > > > > On Mon, May 20, 2019 at 11:39:45PM +0200, Daniel Vetter wrote: > > > This is a similar idea to the fs_reclaim fake lockdep lock. It's > > > fairly easy to provoke a specifi

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,01/10] drm/i915: Restore control over ppgtt for context creation ABI

2019-05-21 Thread Patchwork
== Series Details == Series: series starting with [CI,01/10] drm/i915: Restore control over ppgtt for context creation ABI URL : https://patchwork.freedesktop.org/series/60909/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Restore control o

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,01/10] drm/i915: Restore control over ppgtt for context creation ABI

2019-05-21 Thread Patchwork
== Series Details == Series: series starting with [CI,01/10] drm/i915: Restore control over ppgtt for context creation ABI URL : https://patchwork.freedesktop.org/series/60909/ State : warning == Summary == $ dim checkpatch origin/drm-tip 0ef328fc3f6f drm/i915: Restore control over ppgtt for

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dp: Support for DP YCbCr4:2:0 outputs (rev4)

2019-05-21 Thread Patchwork
== Series Details == Series: drm/i915/dp: Support for DP YCbCr4:2:0 outputs (rev4) URL : https://patchwork.freedesktop.org/series/60404/ State : success == Summary == CI Bug Log - changes from CI_DRM_6114 -> Patchwork_13058 Summary ---

Re: [Intel-gfx] [PATCH 4/4] mm, notifier: Add a lockdep map for invalidate_range_start

2019-05-21 Thread Daniel Vetter
On Tue, May 21, 2019 at 5:41 PM Jerome Glisse wrote: > > On Mon, May 20, 2019 at 11:39:45PM +0200, Daniel Vetter wrote: > > This is a similar idea to the fs_reclaim fake lockdep lock. It's > > fairly easy to provoke a specific notifier to be run on a specific > > range: Just prep it, and then munm

Re: [Intel-gfx] [PATCH 5/5] drm/i915: Expand subslice mask

2019-05-21 Thread Summers, Stuart
On Thu, 2019-05-16 at 15:40 -0700, Daniele Ceraolo Spurio wrote: > > > > --- a/drivers/gpu/drm/i915/gt/intel_sseu.h > > +++ b/drivers/gpu/drm/i915/gt/intel_sseu.h > > @@ -9,16 +9,18 @@ > > > > #include > > #include > > +#include > > AFAICS this header is not needed anymore. With it rem

[Intel-gfx] ✓ Fi.CI.BAT: success for kernel.h: Add non_block_start/end()

2019-05-21 Thread Patchwork
== Series Details == Series: kernel.h: Add non_block_start/end() URL : https://patchwork.freedesktop.org/series/60896/ State : success == Summary == CI Bug Log - changes from CI_DRM_6114 -> Patchwork_13057 Summary --- **SUCCESS**

Re: [Intel-gfx] [PATCH 1/4] mm: Check if mmu notifier callbacks are allowed to fail

2019-05-21 Thread Jerome Glisse
On Mon, May 20, 2019 at 11:39:42PM +0200, Daniel Vetter wrote: > Just a bit of paranoia, since if we start pushing this deep into > callchains it's hard to spot all places where an mmu notifier > implementation might fail when it's not allowed to. > > Inspired by some confusion we had discussing i

Re: [Intel-gfx] [PATCH 4/4] mm, notifier: Add a lockdep map for invalidate_range_start

2019-05-21 Thread Jerome Glisse
On Mon, May 20, 2019 at 11:39:45PM +0200, Daniel Vetter wrote: > This is a similar idea to the fs_reclaim fake lockdep lock. It's > fairly easy to provoke a specific notifier to be run on a specific > range: Just prep it, and then munmap() it. > > A bit harder, but still doable, is to provoke the

Re: [Intel-gfx] [PATCH 3/4] mm, notifier: Catch sleeping/blocking for !blockable

2019-05-21 Thread Jerome Glisse
On Mon, May 20, 2019 at 11:39:44PM +0200, Daniel Vetter wrote: > We need to make sure implementations don't cheat and don't have a > possible schedule/blocking point deeply burried where review can't > catch it. > > I'm not sure whether this is the best way to make sure all the > might_sleep() cal

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for kernel.h: Add non_block_start/end()

2019-05-21 Thread Patchwork
== Series Details == Series: kernel.h: Add non_block_start/end() URL : https://patchwork.freedesktop.org/series/60896/ State : warning == Summary == $ dim checkpatch origin/drm-tip 945d83c6e58d kernel.h: Add non_block_start/end() -:77: WARNING:SINGLE_STATEMENT_DO_WHILE_MACRO: Single statement

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 02/27] trace.pl: Ignore signaling on non i915 fences

2019-05-21 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-05-21 14:22:18) > > On 21/05/2019 08:57, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2019-05-20 15:47:14) > >> From: Tvrtko Ursulin > >> > >> gem_wsim uses the sw_fence timeline and confuses the script. > >> > >> v2: > >> * Check the correct timeline as well. (C

[Intel-gfx] ✓ Fi.CI.BAT: success for linux-next: manual merge of the drm-misc tree with Linus' tree (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: linux-next: manual merge of the drm-misc tree with Linus' tree (rev2) URL : https://patchwork.freedesktop.org/series/60886/ State : success == Summary == CI Bug Log - changes from CI_DRM_6114 -> Patchwork_13056

Re: [Intel-gfx] [PATCH 10/33] fbcon: call fbcon_fb_(un)registered directly

2019-05-21 Thread Daniel Vetter
On Mon, May 20, 2019 at 10:37:53AM +0200, Thomas Zimmermann wrote: > Hi > > Am 20.05.19 um 10:33 schrieb Thomas Zimmermann: > > Hi > > > > Am 20.05.19 um 10:21 schrieb Daniel Vetter: > > ... > >> diff --git a/drivers/video/fbdev/core/fbmem.c > >> b/drivers/video/fbdev/core/fbmem.c > >> index fc3

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for linux-next: manual merge of the drm-misc tree with Linus' tree (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: linux-next: manual merge of the drm-misc tree with Linus' tree (rev2) URL : https://patchwork.freedesktop.org/series/60886/ State : warning == Summary == $ dim checkpatch origin/drm-tip 9ade394d0944 linux-next: manual merge of the drm-misc tree with Linus' tree -:1

Re: [Intel-gfx] [PATCH] kernel.h: Add non_block_start/end()

2019-05-21 Thread Christopher Lameter
On Tue, 21 May 2019, Daniel Vetter wrote: > In some special cases we must not block, but there's not a > spinlock, preempt-off, irqs-off or similar critical section already > that arms the might_sleep() debug checks. Add a non_block_start/end() > pair to annotate these. Just putting preempt on/of

Re: [Intel-gfx] [PATCH] kernel.h: Add non_block_start/end()

2019-05-21 Thread Daniel Vetter
On Tue, May 21, 2019 at 12:46:38PM +0200, Michal Hocko wrote: > On Tue 21-05-19 12:06:11, Daniel Vetter wrote: > > In some special cases we must not block, but there's not a > > spinlock, preempt-off, irqs-off or similar critical section already > > that arms the might_sleep() debug checks. Add a n

[Intel-gfx] [PATCH] kernel.h: Add non_block_start/end()

2019-05-21 Thread Daniel Vetter
In some special cases we must not block, but there's not a spinlock, preempt-off, irqs-off or similar critical section already that arms the might_sleep() debug checks. Add a non_block_start/end() pair to annotate these. This will be used in the oom paths of mmu-notifiers, where blocking is not al

Re: [Intel-gfx] [PATCH] kernel.h: Add non_block_start/end()

2019-05-21 Thread Michal Hocko
On Tue 21-05-19 14:43:38, Cristopher Lameter wrote: > On Tue, 21 May 2019, Daniel Vetter wrote: > > > In some special cases we must not block, but there's not a > > spinlock, preempt-off, irqs-off or similar critical section already > > that arms the might_sleep() debug checks. Add a non_block_sta

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix the interpretation of MAX_PRE-EMPHASIS_REACHED bit inorder to pass Link Layer compliance test number 400.3.1.15 (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: drm/i915: Fix the interpretation of MAX_PRE-EMPHASIS_REACHED bit inorder to pass Link Layer compliance test number 400.3.1.15 (rev2) URL : https://patchwork.freedesktop.org/series/60880/ State : success == Summary == CI Bug Log - changes from CI_DRM_6113 -> Patchw

Re: [Intel-gfx] [PATCH] kernel.h: Add non_block_start/end()

2019-05-21 Thread Daniel Vetter
On Tue, May 21, 2019 at 08:24:53PM +0900, Tetsuo Handa wrote: > On 2019/05/21 20:11, Michal Hocko wrote: > > On Tue 21-05-19 20:04:34, Tetsuo Handa wrote: > >> On 2019/05/21 19:51, Michal Hocko wrote: > >>> On Tue 21-05-19 19:44:01, Tetsuo Handa wrote: > On 2019/05/21 19:06, Daniel Vetter wrot

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix the interpretation of MAX_PRE-EMPHASIS_REACHED bit inorder to pass Link Layer compliance test number 400.3.1.15 (rev2)

2019-05-21 Thread Patchwork
== Series Details == Series: drm/i915: Fix the interpretation of MAX_PRE-EMPHASIS_REACHED bit inorder to pass Link Layer compliance test number 400.3.1.15 (rev2) URL : https://patchwork.freedesktop.org/series/60880/ State : warning == Summary == $ dim checkpatch origin/drm-tip ee90db0cb06a dr

[Intel-gfx] [PATCH] fbcon: Remove fbcon_has_exited

2019-05-21 Thread Daniel Vetter
This is unused code since commit 6104c37094e729f3d4ce65797002112735d49cd1 Author: Daniel Vetter Date: Tue Aug 1 17:32:07 2017 +0200 fbcon: Make fbcon a built-time depency for fbdev when fbcon was made a compile-time static dependency of fbdev. We can't exit fbcon anymore without exiting f

[Intel-gfx] [PATCH 3/5] drm/i915/perf: allow for CS OA configs to be created lazily

2019-05-21 Thread Lionel Landwerlin
Here we introduce a mechanism by which the execbuf part of the i915 driver will be able to request that a batch buffer containing the programming for a particular OA config be created. We'll execute these OA configuration buffers right before executing a set of userspace commands so that a particu

[Intel-gfx] [PATCH 5/5] drm/i915: add support for perf configuration queries

2019-05-21 Thread Lionel Landwerlin
Listing configurations at the moment is supported only through sysfs. This might cause issues for applications wanting to list configurations from a container where sysfs isn't available. This change adds a way to query the number of configurations and their content through the i915 query uAPI. v

[Intel-gfx] [PATCH 0/5] drm/i915: Vulkan performance query support

2019-05-21 Thread Lionel Landwerlin
Hi all, This small (but maybe not to everybody's taste) series enables us to support performance queries on Vulkan. We've gone through the process to define this as a Vulkan INTEL extension (it should appear on [1] soonish). We'll publish the Mesa side shortly. Cheers, [1] : https://github.com

[Intel-gfx] [PATCH 4/5] drm/i915: add a new perf configuration execbuf parameter

2019-05-21 Thread Lionel Landwerlin
We want the ability to dispatch a set of command buffer to the hardware, each with a different OA configuration. To achieve this, we reuse a couple of fields from the execbuf2 struct (I CAN HAZ execbuf3?) to notify what OA configuration should be used for a batch buffer. This requires the process m

[Intel-gfx] [PATCH 1/5] drm/i915/perf: introduce a versioning of the i915-perf uapi

2019-05-21 Thread Lionel Landwerlin
Reporting this version will help application figure out what level of the support the running kernel provides. Signed-off-by: Lionel Landwerlin --- drivers/gpu/drm/i915/i915_drv.c | 3 +++ include/uapi/drm/i915_drm.h | 20 2 files changed, 23 insertions(+) diff --git a

[Intel-gfx] [PATCH 2/5] drm/i915/perf: allow holding preemption on filtered ctx

2019-05-21 Thread Lionel Landwerlin
We would like to make use of perf in Vulkan. The Vulkan API is much lower level than OpenGL, with applications directly exposed to the concept of command buffers (pretty much equivalent to our batch buffers). In Vulkan, queries are always limited in scope to a command buffer. In OpenGL, the lack of

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 24/27] gem_wsim: Discover engines

2019-05-21 Thread Andi Shyti
Hi Tvrtko, On Mon, May 20, 2019 at 03:47:36PM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > Instead of hardcoding the VCS balancing engines, discover, both with the > new engines query, or with the legacy get_param in the fallback case, so > class based addressing always works. > > v2

Re: [Intel-gfx] [v6][PATCH 03/12] drm/i915: Add intel_color_lut_equal() to compare hw and sw gamma/degamma lut values

2019-05-21 Thread Sharma, Swati2
On 14-May-19 9:40 PM, Ville Syrjälä wrote: On Tue, May 14, 2019 at 03:13:21PM +0530, Swati Sharma wrote: v3: -Rebase v4: -Renamed intel_compare_color_lut() to intel_color_lut_equal() [Jani] -Added the default label above the correct label [Jani] -Corrected smatch warn "variable derefe

Re: [Intel-gfx] [PATCH] drm/i915: Fix the interpretation of MAX_PRE-EMPHASIS_REACHED bit inorder to pass Link Layer compliance test number 400.3.1.15

2019-05-21 Thread Ville Syrjälä
On Mon, May 20, 2019 at 04:25:41PM -0700, Khaled Almahallawy wrote: > According to DP 1.4 standard, if the source supports four pre-emphasis > levels, then the source shall set the bit MAX_PRE-EMPHASIS_REACHED = 1 only > when trasmitter programmed PRE-EMPHASIS_SET field (bits 4:3) to 11b (Level

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 02/27] trace.pl: Ignore signaling on non i915 fences

2019-05-21 Thread Tvrtko Ursulin
On 21/05/2019 08:57, Chris Wilson wrote: Quoting Tvrtko Ursulin (2019-05-20 15:47:14) From: Tvrtko Ursulin gem_wsim uses the sw_fence timeline and confuses the script. v2: * Check the correct timeline as well. (Chris) Signed-off-by: Tvrtko Ursulin --- scripts/trace.pl | 3 +++ 1 file

[Intel-gfx] Comments in Fixes: line (Was: Re: linux-next: Fixes tag needs some work in the drm-intel tree)

2019-05-21 Thread Joonas Lahtinen
We also have an incoming patch where the Fixes: line has a comment in it. Does your tooling account for this when checking the Fixes: line? Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/l

[Intel-gfx] [CI 06/10] drm/i915: Load balancing across a virtual engine

2019-05-21 Thread Chris Wilson
Having allowed the user to define a set of engines that they will want to only use, we go one step further and allow them to bind those engines into a single virtual instance. Submitting a batch to the virtual engine will then forward it to any one of the set in a manner as best to distribute load.

Re: [Intel-gfx] linux-next: Fixes tag needs some work in the drm-intel tree

2019-05-21 Thread Joonas Lahtinen
Quoting Stephen Rothwell (2019-05-20 15:15:38) > Hi all, > > In commit > > 0d90ccb70211 ("drm/i915: Delay semaphore submission until the start of the > signaler") > > Fixes tag > > Fixes: e88619646971 ("drm/i915: Use HW semaphores for inter-engine synchroni > > has these problem(s): > >

[Intel-gfx] [CI 03/10] drm/i915: Extend I915_CONTEXT_PARAM_SSEU to support local ctx->engine[]

2019-05-21 Thread Chris Wilson
Allow the user to specify a local engine index (as opposed to class:index) that they can use to refer to a preset engine inside the ctx->engine[] array defined by an earlier I915_CONTEXT_PARAM_ENGINES. This will be useful for setting SSEU parameters on virtual engines that are local to the context

[Intel-gfx] [CI 07/10] drm/i915: Apply an execution_mask to the virtual_engine

2019-05-21 Thread Chris Wilson
Allow the user to direct which physical engines of the virtual engine they wish to execute one, as sometimes it is necessary to override the load balancing algorithm. v2: Only kick the virtual engines on context-out if required Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko

[Intel-gfx] [CI 10/10] drm/i915: Allow specification of parallel execbuf

2019-05-21 Thread Chris Wilson
There is a desire to split a task onto two engines and have them run at the same time, e.g. scanline interleaving to spread the workload evenly. Through the use of the out-fence from the first execbuf, we can coordinate secondary execbuf to only become ready simultaneously with the first, so that w

[Intel-gfx] [CI 08/10] drm/i915: Extend execution fence to support a callback

2019-05-21 Thread Chris Wilson
In the next patch, we will want to configure the slave request depending on which physical engine the master request is executed on. For this, we introduce a callback from the execute fence to convey this information. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i

[Intel-gfx] [CI 05/10] drm/i915: Allow userspace to clone contexts on creation

2019-05-21 Thread Chris Wilson
A usecase arose out of handling context recovery in mesa, whereby they wish to recreate a context with fresh logical state but preserving all other details of the original. Currently, they create a new context and iterate over which bits they want to copy across, but it would much more convenient i

[Intel-gfx] [CI 01/10] drm/i915: Restore control over ppgtt for context creation ABI

2019-05-21 Thread Chris Wilson
Having hid the partially exposed new ABI from the PR, put it back again for completion of context recovery. A significant part of context recovery is the ability to reuse as much of the old context as is feasible (to avoid expensive reconstruction). The biggest chunk kept hidden at the moment is fi

[Intel-gfx] [CI 02/10] drm/i915: Allow a context to define its set of engines

2019-05-21 Thread Chris Wilson
Over the last few years, we have debated how to extend the user API to support an increase in the number of engines, that may be sparse and even be heterogeneous within a class (not all video decoders created equal). We settled on using (class, instance) tuples to identify a specific engine, with a

[Intel-gfx] [CI 09/10] drm/i915/execlists: Virtual engine bonding

2019-05-21 Thread Chris Wilson
Some users require that when a master batch is executed on one particular engine, a companion batch is run simultaneously on a specific slave engine. For this purpose, we introduce virtual engine bonding, allowing maps of master:slaves to be constructed to constrain which physical engines a virtual

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