== Series Details ==
Series: drm/i915: Engine discovery query (rev10)
URL : https://patchwork.freedesktop.org/series/39958/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
48c015259183 drm/i915: Engine discovery query
-:63: WARNING:TYPO_SPELLING: 'assigment' may be misspelled - p
== Series Details ==
Series: drm/i915: add single combo phy init/unit functions (rev2)
URL : https://patchwork.freedesktop.org/series/60112/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6025 -> Patchwork_12931
Summary
Adjust the get transcoder timings for mipi dsi as per the
set timing calculations.
v2: Use the existing intel_get_pipe_timings and do the dsi
specific adjustments in the encoder get_config hook.(Ville, Jani)
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/icl_dsi.c | 29 +++
Read back the pixel fomrat register and get the bpp.
v2: Read the PIPE_MISC register (Jani).
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/icl_dsi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c
index 45fe69c..c
Move bdw_get_pipemisc_bpp alongside bdw_set_pipemisc
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/intel_display.c | 22 ++
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/vlv_dsi.c | 22 --
3 files changed, 23 insertions
In case of dual link mode, the mode clock that we get
from the VBT is halved.
v2: Simplify the calculation (Jani).
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/icl_dsi.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl
From: Tvrtko Ursulin
Engine discovery query allows userspace to enumerate engines, probe their
configuration features, all without needing to maintain the internal PCI
ID based database.
A new query for the generic i915 query ioctl is added named
DRM_I915_QUERY_ENGINE_INFO, together with accompa
== Series Details ==
Series: drm/i915: Engine discovery query (rev9)
URL : https://patchwork.freedesktop.org/series/39958/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/compile.h
AR
From: Tvrtko Ursulin
Engine discovery query allows userspace to enumerate engines, probe their
configuration features, all without needing to maintain the internal PCI
ID based database.
A new query for the generic i915 query ioctl is added named
DRM_I915_QUERY_ENGINE_INFO, together with accompa
== Series Details ==
Series: drm/i915: Move the engine->destroy() vfunc onto the engine
URL : https://patchwork.freedesktop.org/series/60147/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6020_full -> Patchwork_12921_full
S
== Series Details ==
Series: drm/i915/hangcheck: Track context changes
URL : https://patchwork.freedesktop.org/series/60143/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6020_full -> Patchwork_12920_full
Summary
---
On 5/1/19 8:34 AM, Stuart Summers wrote:
Currently, the subslice_mask runtime parameter is stored as an
array of subslices per slice. Expand the subslice mask array to
better match what is presented to userspace through the
I915_QUERY_TOPOLOGY_INFO ioctl. The index into this array is
then calcu
== Series Details ==
Series: drm/i915: Complete both freed-object passes before draining the
workqueue
URL : https://patchwork.freedesktop.org/series/60142/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6020_full -> Patchwork_12919_full
===
On 4/26/19 12:31 AM, Lucas De Marchi wrote:
On Thu, Apr 25, 2019 at 12:24 PM Ville Syrjala
wrote:
From: Ville Syrjälä
When I refactored the code into its own function I accidentally
misplaced the <<16 shifts for some of the registers causing us
to lose the blue channel entirely.
We should r
On Wed, 2019-05-01 at 14:19 -0700, Daniele Ceraolo Spurio wrote:
>
> On 5/1/19 2:04 PM, Summers, Stuart wrote:
> > On Wed, 2019-05-01 at 13:04 -0700, Daniele Ceraolo Spurio wrote:
> > > Can you elaborate a bit more on what's the rationale for this? do
> > > you
> > > just want to avoid having too
On 5/1/19 2:04 PM, Summers, Stuart wrote:
On Wed, 2019-05-01 at 13:04 -0700, Daniele Ceraolo Spurio wrote:
Can you elaborate a bit more on what's the rationale for this? do
you
just want to avoid having too many inlines since the paths they're
used
in are not critical, or do you have some more
On Wed, 2019-05-01 at 13:04 -0700, Daniele Ceraolo Spurio wrote:
> Can you elaborate a bit more on what's the rationale for this? do
> you
> just want to avoid having too many inlines since the paths they're
> used
> in are not critical, or do you have some more functional reason? This
> is
> no
Can you elaborate a bit more on what's the rationale for this? do you
just want to avoid having too many inlines since the paths they're used
in are not critical, or do you have some more functional reason? This is
not a critic to the patch, I just want to understand where you're coming
from ;)
On Wed, 2019-05-01 at 19:29 +0100, Tvrtko Ursulin wrote:
> On 01/05/2019 19:22, Tvrtko Ursulin wrote:
>
> [snip]
>
> > > +#define SS_STR_MAX_SIZE (GEN_MAX_SUBSLICE_STRIDE * 2)
> > > +
> > > +static u8 *
> > > +subslice_per_slice_str(u8 *buf, const struct sseu_dev_info
> > > *sseu, u8
> > > slice
On Wed, 2019-05-01 at 10:54 -0700, Daniele Ceraolo Spurio wrote:
>
> On 5/1/19 8:34 AM, Stuart Summers wrote:
> > In the GETPARAM ioctl handler, use a local variable to consolidate
> > usage of SSEU runtime info.
> >
> > v2: add const to sseu_dev_info variable
> >
> > Cc: Daniele Ceraolo Spurio
On Wed, 2019-05-01 at 11:11 -0700, Daniele Ceraolo Spurio wrote:
>
> On 5/1/19 8:34 AM, Stuart Summers wrote:
> > Subslice stride and EU stride are calculated multiple times in
> > i915_query. Move this calculation to a macro to reduce code
> > duplication.
> >
> > v2: update headers in intel_sse
On Wed, 2019-05-01 at 11:14 -0700, Daniele Ceraolo Spurio wrote:
>
> On 5/1/19 8:34 AM, Stuart Summers wrote:
> > Add a new function to return the number of subslices per slice to
> > consolidate code usage.
> >
> > v2: rebase on changes to move sseu struct to intel_sseu.h
> >
> > Cc: Daniele Ce
On Wed, 2019-05-01 at 11:48 -0700, Daniele Ceraolo Spurio wrote:
>
> On 5/1/19 8:34 AM, Stuart Summers wrote:
> > v2: fix spacing from checkpatch warning
> >
> > Signed-off-by: Stuart Summers
> > ---
> > drivers/gpu/drm/i915/gt/intel_sseu.h | 47
> >
> > drivers/g
Hi Da.*,
Quiet week since the last PR, I'd say we're ready for the merge window!
drm-misc-next-fixes-2019-05-01:
core: restore drm mmap_range size back to 1TB (Philip)
sphinx: squash warning (Sean)
Cc: Philip Yang
Cc: Sean Paul
Cheers, Sean
The following changes since commit 1de7259275ca4e
On 5/1/19 8:34 AM, Stuart Summers wrote:
v2: fix spacing from checkpatch warning
Signed-off-by: Stuart Summers
---
drivers/gpu/drm/i915/gt/intel_sseu.h | 47
drivers/gpu/drm/i915/intel_device_info.h | 47
2 files changed, 47 insertions
On 01/05/2019 19:22, Tvrtko Ursulin wrote:
[snip]
+#define SS_STR_MAX_SIZE (GEN_MAX_SUBSLICE_STRIDE * 2)
+
+static u8 *
+subslice_per_slice_str(u8 *buf, const struct sseu_dev_info *sseu, u8
slice)
+{
+ int i;
+ u8 ss_offset = slice * sseu->ss_stride;
+
+ GEM_BUG_ON(slice >= sseu->ma
Just one drive by below...
On 01/05/2019 16:34, Stuart Summers wrote:
Currently, the subslice_mask runtime parameter is stored as an
array of subslices per slice. Expand the subslice mask array to
better match what is presented to userspace through the
I915_QUERY_TOPOLOGY_INFO ioctl. The index
On 5/1/19 8:34 AM, Stuart Summers wrote:
Add a new function to return the number of subslices per slice to
consolidate code usage.
v2: rebase on changes to move sseu struct to intel_sseu.h
Cc: Daniele Ceraolo Spurio
Signed-off-by: Stuart Summers
---
drivers/gpu/drm/i915/gt/intel_sseu.h
On 5/1/19 8:34 AM, Stuart Summers wrote:
Subslice stride and EU stride are calculated multiple times in
i915_query. Move this calculation to a macro to reduce code duplication.
v2: update headers in intel_sseu.h
Cc: Daniele Ceraolo Spurio
Signed-off-by: Stuart Summers
---
drivers/gpu/drm/
On 5/1/19 8:34 AM, Stuart Summers wrote:
In the GETPARAM ioctl handler, use a local variable to consolidate
usage of SSEU runtime info.
v2: add const to sseu_dev_info variable
Cc: Daniele Ceraolo Spurio
Signed-off-by: Stuart Summers
Reviewed-by: Daniele Ceraolo Spurio
---
drivers/gpu
== Series Details ==
Series: drm/i915/perf: Refactor oa object to better manage resources
URL : https://patchwork.freedesktop.org/series/60176/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6021 -> Patchwork_12929
Summary
-
== Series Details ==
Series: series starting with [01/14] drm/i915/hangcheck: Track context changes
(rev4)
URL : https://patchwork.freedesktop.org/series/60153/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6021 -> Patchwork_12928
=
== Series Details ==
Series: drm/i915/perf: Refactor oa object to better manage resources
URL : https://patchwork.freedesktop.org/series/60176/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/perf: Refactor oa object to better manage resources
On Wed, 1 May 2019 at 14:58, Chris Wilson wrote:
>
> The workqueue code complains viciously if we try to queue more work onto
> the queue while attampting to drain it. As we asynchronously free
> objects and defer their enqueuing with RCU, it is quite tricky to
> quiesce the system before attempti
== Series Details ==
Series: drm/i915/perf: Refactor oa object to better manage resources
URL : https://patchwork.freedesktop.org/series/60176/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
aec4c50375a0 drm/i915/perf: Refactor oa object to better manage resources
-:1161: CHECK:
== Series Details ==
Series: series starting with [01/14] drm/i915/hangcheck: Track context changes
(rev4)
URL : https://patchwork.freedesktop.org/series/60153/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/hangcheck: Track context changes
O
== Series Details ==
Series: series starting with [01/14] drm/i915/hangcheck: Track context changes
(rev3)
URL : https://patchwork.freedesktop.org/series/60153/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6021 -> Patchwork_12927
=
The oa object manages the oa buffer and must be allocated when the user
intends to read performance counter snapshots. This can be achieved by
making the oa object part of the stream object which is allocated when a
stream is opened by the user.
Attributes in the oa object that are gen-specific ar
== Series Details ==
Series: series starting with [01/14] drm/i915/hangcheck: Track context changes
(rev3)
URL : https://patchwork.freedesktop.org/series/60153/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/hangcheck: Track context changes
O
The handling of the no-preemption priority level imposes the restriction
that we need to maintain the implied ordering even though preemption is
disabled. Otherwise we may end up with an AB-BA deadlock across multiple
engine due to a real preemption event reordering the no-preemption
WAITs. To reso
The handling of the no-preemption priority level imposes the restriction
that we need to maintain the implied ordering even though preemption is
disabled. Otherwise we may end up with an AB-BA deadlock across multiple
engine due to a real preemption event reordering the no-preemption
WAITs. To reso
== Series Details ==
Series: Refactor to expand subslice mask (rev7)
URL : https://patchwork.freedesktop.org/series/59742/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6021 -> Patchwork_12926
Summary
---
**SUCCESS**
== Series Details ==
Series: Refactor to expand subslice mask (rev7)
URL : https://patchwork.freedesktop.org/series/59742/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Use local variable for SSEU info in GETPARAM ioctl
Okay!
Commit: drm/i9
Quoting Tvrtko Ursulin (2019-05-01 16:51:28)
>
> On 01/05/2019 12:55, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-05-01 12:45:36)
> >> Hmm.. probably manual check for no holes _and_ alignment is good enough
> >> for uAPI since once it's in it's in. Will triple-check.
> >
> > Yeah, we act
== Series Details ==
Series: Refactor to expand subslice mask (rev7)
URL : https://patchwork.freedesktop.org/series/59742/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
47812364a20c drm/i915: Use local variable for SSEU info in GETPARAM ioctl
b0f425609a7b drm/i915: Add macro fo
On 01/05/2019 12:52, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-05-01 12:42:59)
+ switch (engine->engine.engine_class) {
+ case I915_ENGINE_CLASS_RENDER:
+ /* Will be tested later. */
+ break;
+ case I91
== Series Details ==
Series: drm/i915: Fix 90/270 degree rotated RGB565 src coord checks (rev2)
URL : https://patchwork.freedesktop.org/series/59956/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6018_full -> Patchwork_12916_full
===
On 01/05/2019 12:55, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-05-01 12:45:36)
On 01/05/2019 12:10, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-05-01 11:52:28)
From: Tvrtko Ursulin
Engine discovery query allows userspace to enumerate engines, probe their
configuration features,
On Wed, 2019-05-01 at 00:58 +, Patchwork wrote:
> == Series Details ==
>
> Series: Refactor to expand subslice mask (rev6)
> URL : https://patchwork.freedesktop.org/series/59742/
> State : failure
I'm not sure what happened here, but my assumption is that CI didn't
like the fact that I sent
== Series Details ==
Series: series starting with [01/14] drm/i915/hangcheck: Track context changes
(rev2)
URL : https://patchwork.freedesktop.org/series/60153/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6021 -> Patchwork_12925
=
Add a new function to return the number of subslices per slice to
consolidate code usage.
v2: rebase on changes to move sseu struct to intel_sseu.h
Cc: Daniele Ceraolo Spurio
Signed-off-by: Stuart Summers
---
drivers/gpu/drm/i915/gt/intel_sseu.h | 6 ++
drivers/gpu/drm/i915/i915_debugf
Currently, the subslice_mask runtime parameter is stored as an
array of subslices per slice. Expand the subslice mask array to
better match what is presented to userspace through the
I915_QUERY_TOPOLOGY_INFO ioctl. The index into this array is
then calculated:
slice * subslice stride + subslice i
v2: fix spacing from checkpatch warning
Signed-off-by: Stuart Summers
---
drivers/gpu/drm/i915/gt/intel_sseu.h | 47
drivers/gpu/drm/i915/intel_device_info.h | 47
2 files changed, 47 insertions(+), 47 deletions(-)
diff --git a/drivers/gpu/d
This patch series contains a few code clean-up patches, followed
by a patch which changes the storage of the subslice mask to better
match the userspace access through the I915_QUERY_TOPOLOGY_INFO
ioctl. The index into the subslice_mask array is then calculated:
slice * subslice stride + subslice
Additionally, ensure these are all prefixed with intel_sseu_*
to match the convention of other functions in i915.
Signed-off-by: Stuart Summers
---
drivers/gpu/drm/i915/gt/intel_sseu.c | 54 +++
drivers/gpu/drm/i915/gt/intel_sseu.h | 57 +++-
drivers/gpu/d
Subslice stride and EU stride are calculated multiple times in
i915_query. Move this calculation to a macro to reduce code duplication.
v2: update headers in intel_sseu.h
Cc: Daniele Ceraolo Spurio
Signed-off-by: Stuart Summers
---
drivers/gpu/drm/i915/gt/intel_sseu.h | 2 ++
drivers/gpu/drm/
In the GETPARAM ioctl handler, use a local variable to consolidate
usage of SSEU runtime info.
v2: add const to sseu_dev_info variable
Cc: Daniele Ceraolo Spurio
Signed-off-by: Stuart Summers
---
drivers/gpu/drm/i915/i915_drv.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
== Series Details ==
Series: series starting with [01/14] drm/i915/hangcheck: Track context changes
(rev2)
URL : https://patchwork.freedesktop.org/series/60153/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/hangcheck: Track context changes
O
The handling of the no-preemption priority level imposes the restriction
that we need to maintain the implied ordering even though preemption is
disabled. Otherwise we may end up with an AB-BA deadlock across multiple
engine due to a real preemption event reordering the no-preemption
WAITs. To reso
== Series Details ==
Series: series starting with [1/3] drm/i915: Complete both freed-object passes
before draining the workqueue
URL : https://patchwork.freedesktop.org/series/60162/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6021 -> Patchwork_12924
==
i915 driver now includes DRIVER_CGROUPS in feature bits.
To charge device memory allocations, we need to (1) identify appropriate
cgroup to charge (currently decided at object creation time), and (2)
make the charging call at the time that memory pages are being allocated.
For (1), see prior DRM
Change the kernfs_node.priv to store the cgroup_subsys_state (CSS) pointer
for directories, instead of storing cgroup pointer. This is done in order
to support files within the cgroup associated with devices. We require
of_css() to return the device-specific CSS pointer for these files.
Cc: cgro
With new cgroups per-device framework, registration with memory cgroup
subsystem can allow us to enforce limit for allocation of device memory
against process cgroups.
This patch adds new driver feature bit, DRIVER_CGROUPS, such that DRM
will register the device with cgroups. Doing so allows devic
Here we update memory cgroup to enable the newly introduced per-device
framework. As mentioned in the prior patch, the intent here is to allow
drivers to have their own private cgroup controls (such as memory limit)
to be applied to device resources instead of host system resources.
In summary, t
In containerized or virtualized environments, there is desire to have
controls in place for resources that can be consumed by users of a GPU
device. This RFC patch series proposes a framework for integrating
use of existing cgroup controllers into device drivers.
The i915 driver is updated in thi
In containerized or virtualized environments, there is desire to have
controls in place for resources that can be consumed by users of a GPU
device. For this purpose, we extend control groups with a mechanism
for device drivers to register with cgroup subsystems.
Device drivers (GPU or other) are
Quoting Chris Wilson (2019-05-01 14:57:52)
> The counter goes to zero at the start of the parking cycle, but the
> wakeref itself is held until the end. Likewise, the counter becomes one
> at the end of the unparking, but the wakeref is taken first. If we check
> the wakeref instead of the counter,
Due to the asynchronous tasklet and recursive GT wakeref, it may happen
that we submit to the engine (underneath it's own wakeref) prior to the
central wakeref being marked as taken. Switch to checking the local wakeref
for greater consistency.
Fixes: 79ffac8599c4 ("drm/i915: Invert the GEM wakere
The counter goes to zero at the start of the parking cycle, but the
wakeref itself is held until the end. Likewise, the counter becomes one
at the end of the unparking, but the wakeref is taken first. If we check
the wakeref instead of the counter, we include the unpark/unparking time
as intel_wake
The workqueue code complains viciously if we try to queue more work onto
the queue while attampting to drain it. As we asynchronously free
objects and defer their enqueuing with RCU, it is quite tricky to
quiesce the system before attempting to drain the workqueue. Yet drain
we must to ensure that
== Series Details ==
Series: series starting with [01/14] drm/i915/hangcheck: Track context changes
URL : https://patchwork.freedesktop.org/series/60153/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6021 -> Patchwork_12923
== Series Details ==
Series: Enable Multi-segmented-gamma for ICL
URL : https://patchwork.freedesktop.org/series/60126/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6018_full -> Patchwork_12915_full
Summary
---
**FA
== Series Details ==
Series: series starting with [01/14] drm/i915/hangcheck: Track context changes
URL : https://patchwork.freedesktop.org/series/60153/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/hangcheck: Track context changes
Okay!
Co
Quoting Tvrtko Ursulin (2019-05-01 12:45:36)
>
> On 01/05/2019 12:10, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2019-05-01 11:52:28)
> >> From: Tvrtko Ursulin
> >>
> >> Engine discovery query allows userspace to enumerate engines, probe their
> >> configuration features, all without needing
To avoid pulling in a forward declaration in the next patch, move the
i915_sched_node handling to after the main dfs of the scheduler.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_scheduler.c | 210 +-
1 file changed, 105 insertions(+), 105 deletions(-)
diff
If the user is racing a call to debugfs/i915_drop_caches with ongoing
submission from another thread/process, we may never end up idling the
GPU and be uninterruptibly spinning in debugfs/i915_drop_caches trying
to catch an idle moment.
Just flush the work once, that should be enough to park the s
Quoting Tvrtko Ursulin (2019-05-01 12:42:59)
> + switch (engine->engine.engine_class) {
> + case I915_ENGINE_CLASS_RENDER:
> + /* Will be tested later. */
> + break;
> + case I915_ENGINE_CLASS_COPY:
> +
Do not treat reset as a normal preemption event and avoid giving the
guilty request a priority boost for simply being active at the time of
reset.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --gi
Drop the check in GEM parking that the engines were already parked. The
intention here was that before we dropped the GT wakeref, we were sure
that no more interrupts could be raised -- however, we have already
dropped the wakeref by this point and the warning is no longer valid.
Signed-off-by: Ch
If we couple the scheduler more tightly with the execlists policy, we
can apply the preemption policy to the question of whether we need to
kick the tasklet at all for this priority bump.
v2: Rephrase it as a core i915 policy and not an execlists foible.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ur
Remove the modification of the "constant" device info by promoting the
inconsistent intel_engine static table into an initialisation error.
Now, if we add a new engine into the device_info, we must first add that
engine information into the intel_engines.
Signed-off-by: Chris Wilson
---
drivers/
The original intent for the delay before running the idle_work was to
provide a hysteresis to avoid ping-ponging the device runtime-pm. Since
then we have also pulled in some memory management and general device
management for parking. But with the inversion of the wakeref handling,
GEM is no longe
To simplify the next patch, update bump_priority and schedule to accept
the internal i915_sched_ndoe directly and not expect a request pointer.
add/remove: 0/0 grow/shrink: 2/1 up/down: 8/-15 (-7)
Function old new delta
i915_schedule_bump_priority
Given sufficient preemption, we may see a busy system that doesn't
advance seqno while performing work across multiple contexts, and given
sufficient pathology not even notice a change in ACTHD. What does change
between the preempting contexts is their RING, so take note of that and
treat a change
Tidy up the cleanup sequence by always ensure that the tasklet is
flushed on parking (before we cleanup). The parking provides a
convenient point to ensure that the backend is truly idle.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 7 ++-
drivers/gpu/drm/i91
The handling of the no-preemption priority level imposes the restriction
that we need to maintain the implied ordering even though preemption is
disabled. Otherwise we may end up with an AB-BA deadlock across multiple
engine due to a real preemption event reordering the no-preemption
WAITs. To reso
Show the fence flags view of request completion in addition to the
normal hwsp check and whether signaling is enabled.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_e
Currently we submit the semaphore busywait as soon as the signaler is
submitted to HW. However, we may submit the signaler as the tail of a
batch of requests, and even not as the first context in the HW list,
i.e. the busywait may start spinning far in advance of the signaler even
starting.
If we
Replace the racy continuation check within retire_work with a definite
kill-switch on idling. The race was being exposed by gem_concurrent_blit
where the retire_worker would be terminated too early leaving us
spinning in debugfs/i915_drop_caches with nothing flushing the
retirement queue.
Although
On 01/05/2019 12:10, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-05-01 11:52:28)
From: Tvrtko Ursulin
Engine discovery query allows userspace to enumerate engines, probe their
configuration features, all without needing to maintain the internal PCI
ID based database.
A new query for the
From: Tvrtko Ursulin
Test the new engine discovery query.
Signed-off-by: Tvrtko Ursulin
---
tests/i915/i915_query.c | 247
1 file changed, 247 insertions(+)
diff --git a/tests/i915/i915_query.c b/tests/i915/i915_query.c
index 7d0c0e3a061c..ecbec3ae141d
From: Tvrtko Ursulin
Catch up to drm-tip headers.
Signed-off-by: Tvrtko Ursulin
---
include/drm-uapi/amdgpu_drm.h | 52 +-
include/drm-uapi/drm.h | 36 +++
include/drm-uapi/drm_mode.h | 4 +-
include/drm-uapi/i915_drm.h | 42
include/drm-uapi/lima_d
From: Tvrtko Ursulin
As usual, second patch is the only one to be looked at.
Tvrtko Ursulin (2):
headers: bump
tests/i915_query: Engine discovery tests
include/drm-uapi/amdgpu_drm.h | 52 ++-
include/drm-uapi/drm.h | 36 +
include/drm-uapi/drm_mode.h | 4 +-
incl
== Series Details ==
Series: series starting with [1/5] drm/i915/execlists: Flush the tasklet on
parking
URL : https://patchwork.freedesktop.org/series/60125/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6018_full -> Patchwork_12914_full
=
Quoting Tvrtko Ursulin (2019-05-01 11:52:28)
> From: Tvrtko Ursulin
>
> Engine discovery query allows userspace to enumerate engines, probe their
> configuration features, all without needing to maintain the internal PCI
> ID based database.
>
> A new query for the generic i915 query ioctl is ad
== Series Details ==
Series: drm/i915: Move the engine->destroy() vfunc onto the engine
URL : https://patchwork.freedesktop.org/series/60147/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6020 -> Patchwork_12921
Summary
---
== Series Details ==
Series: drm/i915: Engine discovery query (rev8)
URL : https://patchwork.freedesktop.org/series/39958/
State : failure
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/compile.h
AR
From: Tvrtko Ursulin
Engine discovery query allows userspace to enumerate engines, probe their
configuration features, all without needing to maintain the internal PCI
ID based database.
A new query for the generic i915 query ioctl is added named
DRM_I915_QUERY_ENGINE_INFO, together with accompa
== Series Details ==
Series: drm/i915: Move the engine->destroy() vfunc onto the engine
URL : https://patchwork.freedesktop.org/series/60147/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: Move the engine->destroy() vfunc onto the engine
-dri
On Thu, 25 Apr 2019 at 10:20, Chris Wilson wrote:
>
> An old optimisation to reduce the number of atomics per batch sadly
> relies on struct_mutex for coordination. In order to remove struct_mutex
> from serialising object/context closing, always taking and releasing an
> active reference on first
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