[Intel-gfx] ✓ Fi.CI.IGT: success for drm/dp_mst: Improve VCPI helpers, use in nouveau (rev2)

2018-10-26 Thread Patchwork
== Series Details == Series: drm/dp_mst: Improve VCPI helpers, use in nouveau (rev2) URL : https://patchwork.freedesktop.org/series/51412/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5044_full -> Patchwork_10617_full = == Summary - SUCCESS == No regressions found.

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915: Add short HPD IRQ storm detection for non-MST systems

2018-10-26 Thread kbuild test robot
Hi Lyude, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on v4.19 next-20181019] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Consolidate cdclk hooks. (rev2)

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915: Consolidate cdclk hooks. (rev2) URL : https://patchwork.freedesktop.org/series/51271/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5044_full -> Patchwork_10616_full = == Summary - SUCCESS == No regressions found. == Known issu

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Switch the order of function parameters

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915: Switch the order of function parameters URL : https://patchwork.freedesktop.org/series/51623/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5044_full -> Patchwork_10614_full = == Summary - SUCCESS == No regressions found. == Kn

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Prefer IS_GEN check with bitmask.

2018-10-26 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Prefer IS_GEN check with bitmask. URL : https://patchwork.freedesktop.org/series/51622/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5044_full -> Patchwork_10613_full = == Summary - SUCCESS == No regress

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,v3,1/2] drm/i915: Add function to check for linear surfaces

2018-10-26 Thread Patchwork
== Series Details == Series: series starting with [CI,v3,1/2] drm/i915: Add function to check for linear surfaces URL : https://patchwork.freedesktop.org/series/51620/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5044_full -> Patchwork_10611_full = == Summary - WARNING ==

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Clean up the wm mem latency stuff (rev5)

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915: Clean up the wm mem latency stuff (rev5) URL : https://patchwork.freedesktop.org/series/50802/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5044_full -> Patchwork_10610_full = == Summary - WARNING == Minor unknown changes coming wi

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Make number of ddi ports explicit.

2018-10-26 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915: Make number of ddi ports explicit. URL : https://patchwork.freedesktop.org/series/51634/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5044 -> Patchwork_10619 = == Summary - SUCCESS == No regressions found

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915: Make number of ddi ports explicit.

2018-10-26 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915: Make number of ddi ports explicit. URL : https://patchwork.freedesktop.org/series/51634/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Make number of ddi ports explicit. Okay!

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Make number of ddi ports explicit.

2018-10-26 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915: Make number of ddi ports explicit. URL : https://patchwork.freedesktop.org/series/51634/ State : warning == Summary == $ dim checkpatch origin/drm-tip a961fba149af drm/i915: Make number of ddi ports explicit. b844d4b37a60 drm/i9

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/glk: Remove 99% limitation.

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915/glk: Remove 99% limitation. URL : https://patchwork.freedesktop.org/series/51561/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5043_full -> Patchwork_10605_full = == Summary - SUCCESS == No regressions found. == Known issues ==

[Intel-gfx] [PATCH 3/3] drm/i915: Use the ddi_ports info to kill ugly CNL_WITH_PORT_F.

2018-10-26 Thread Rodrigo Vivi
Now that we have the number of ddi ports information available let's use it instead of that ugly platform macro. v2: - Don't override platform info (Jani) But use platform info (Daniel) - Don't use ddi_ports when it doesn't make sense (Lucas) - Add a comment to let clear that port E is fus

[Intel-gfx] [PATCH 1/3] drm/i915: Make number of ddi ports explicit.

2018-10-26 Thread Rodrigo Vivi
Instead of a simple bool that shows if we have ddi ports or not, let's highlight the number of ddi ports. So we can use this information to determine the code path instead of using platforms codenames. v2: s/ddi_ports/num_ddi_ports (Ville) Cc: Ville Syrjälä Signed-off-by: Rodrigo Vivi --- dri

[Intel-gfx] [PATCH 2/3] drm/i915: Prefer direct IS_CANNONLAKE over IS_CNL_WITH_PORT_F

2018-10-26 Thread Rodrigo Vivi
After all, no Cannonlake has HPD_PORT_F, even the skus with port F. Also we will only reach this case if PORT_F is already there in use. So let's use IS_CANNONLAKE directly here and avoid the ugly check starting from here. Cc: Lucas De Marchi Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i9

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: HPD IRQ storm detection fixes (rev2)

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915: HPD IRQ storm detection fixes (rev2) URL : https://patchwork.freedesktop.org/series/51556/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5044 -> Patchwork_10618 = == Summary - SUCCESS == No regressions found. External URL: https

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: HPD IRQ storm detection fixes (rev2)

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915: HPD IRQ storm detection fixes (rev2) URL : https://patchwork.freedesktop.org/series/51556/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Fix possible race in intel_dp_add_mst_connector() Okay! Commit:

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gtt: Allow mixed pages to setup large PTE (rev2)

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915/gtt: Allow mixed pages to setup large PTE (rev2) URL : https://patchwork.freedesktop.org/series/51596/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5043_full -> Patchwork_10604_full = == Summary - WARNING == Minor unknown changes co

[Intel-gfx] [PATCH v2 3/3] drm/i915: Add short HPD IRQ storm detection for non-MST systems

2018-10-26 Thread Lyude Paul
Unfortunately, it seems that the HPD IRQ storm problem from the early days of Intel GPUs was never entirely solved, only mostly. Within the last couple of days, I got a bug report from one of our customers who had been having issues with their machine suddenly booting up very slowly after having up

[Intel-gfx] [PATCH v2 0/3] drm/i915: HPD IRQ storm detection fixes

2018-10-26 Thread Lyude Paul
IMPORTANT - As a note: I have not had the customer who this second patch is for test this yet, I'm sending this ahead of time to make sure this is something that isn't too crazy for upstream to accept. I'm not planning on pushing this after review until I've verified this actually fixes th

[Intel-gfx] [PATCH v2 1/3] drm/i915: Fix possible race in intel_dp_add_mst_connector()

2018-10-26 Thread Lyude Paul
This hasn't caused any issues yet that I'm aware of, but as Ville Syrjälä pointed out - we need to make sure that intel_connector->mst_port is set before initializing MST connectors, since in theory we could potentially check intel_connector->mst_port in i915_hpd_poll_init_work() after registering

[Intel-gfx] [PATCH v2 2/3] drm/i915: Fix NULL deref when re-enabling HPD IRQs on systems with MST

2018-10-26 Thread Lyude Paul
Turns out that if you trigger an HPD storm on a system that has an MST topology connected to it, you'll end up causing the kernel to eventually hit a NULL deref: [ 332.339041] BUG: unable to handle kernel NULL pointer dereference at 00ec [ 332.340906] PGD 0 P4D 0 [ 332.342750] Oops

Re: [Intel-gfx] [PATCH v5 5/5] drm/tinydrm: Switch from CMA to shmem buffers

2018-10-26 Thread Noralf Trønnes
Den 17.10.2018 15.04, skrev Noralf Trønnes: This move makes tinydrm useful for more drivers. tinydrm doesn't need continuous memory, but at the time it was convenient to use the CMA library. The spi core can do dma on is_vmalloc() addresses making this possible. Cc: David Lechner Signed-off-by

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/dp_mst: Improve VCPI helpers, use in nouveau (rev2)

2018-10-26 Thread Patchwork
== Series Details == Series: drm/dp_mst: Improve VCPI helpers, use in nouveau (rev2) URL : https://patchwork.freedesktop.org/series/51412/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5044 -> Patchwork_10617 = == Summary - SUCCESS == No regressions found. External UR

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Consolidate cdclk hooks. (rev2)

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915: Consolidate cdclk hooks. (rev2) URL : https://patchwork.freedesktop.org/series/51271/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5044 -> Patchwork_10616 = == Summary - WARNING == Minor unknown changes coming with Patchwork_10616

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/dp_mst: Improve VCPI helpers, use in nouveau (rev2)

2018-10-26 Thread Patchwork
== Series Details == Series: drm/dp_mst: Improve VCPI helpers, use in nouveau (rev2) URL : https://patchwork.freedesktop.org/series/51412/ State : warning == Summary == $ dim checkpatch origin/drm-tip 4ddbf8c47846 drm/dp_mst: Add some atomic state iterator macros -:7: WARNING:COMMIT_MESSAGE: M

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Simplify has_sagv (rev3)

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915: Simplify has_sagv (rev3) URL : https://patchwork.freedesktop.org/series/51266/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_5044 -> Patchwork_10615 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10615 absol

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Switch the order of function parameters

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915: Switch the order of function parameters URL : https://patchwork.freedesktop.org/series/51623/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5044 -> Patchwork_10614 = == Summary - WARNING == Minor unknown changes coming with Patchwor

[Intel-gfx] [PATCH v2 1/4] drm/dp_mst: Add some atomic state iterator macros

2018-10-26 Thread Lyude Paul
Signed-off-by: Lyude Paul Cc: Daniel Vetter --- include/drm/drm_dp_mst_helper.h | 77 + 1 file changed, 77 insertions(+) diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h index 59f005b419cf..3faceb66f5cb 100644 --- a/include/drm/drm_d

[Intel-gfx] [PATCH v2 2/4] drm/dp_mst: Start tracking per-port VCPI allocations

2018-10-26 Thread Lyude Paul
There has been a TODO waiting for quite a long time in drm_dp_mst_topology.c: /* We cannot rely on port->vcpi.num_slots to update * topology_state->avail_slots as the port may not exist if the parent * branch device was unplugged. This should be fixed by tracking

[Intel-gfx] [PATCH v2 4/4] drm/nouveau: Use atomic VCPI helpers for MST

2018-10-26 Thread Lyude Paul
Currently, nouveau uses the yolo method of setting up MST displays: it uses the old VCPI helpers (drm_dp_find_vcpi_slots()) for computing the display configuration. These helpers don't take care to make sure they take a reference to the mstb port that they're checking, and additionally don't actual

[Intel-gfx] [PATCH v2 3/4] drm/dp_mst: Check payload count in drm_dp_mst_atomic_check()

2018-10-26 Thread Lyude Paul
It occurred to me that we never actually check this! So let's start doing that. Signed-off-by: Lyude Paul Cc: Daniel Vetter --- drivers/gpu/drm/drm_dp_mst_topology.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/d

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Prefer IS_GEN check with bitmask.

2018-10-26 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Prefer IS_GEN check with bitmask. URL : https://patchwork.freedesktop.org/series/51622/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5044 -> Patchwork_10613 = == Summary - SUCCESS == No regressions found

[Intel-gfx] [PATCH v2 0/4] drm/dp_mst: Improve VCPI helpers, use in nouveau

2018-10-26 Thread Lyude Paul
This patchset does some cleaning up of the atomic VCPI helpers for MST, and converts nouveau over to using them. I would have included amdgpu in this patch as well, but at the moment moving them over to the atomic helpers is nontrivial. Cc: Daniel Vetter Lyude Paul (4): drm/dp_mst: Add some at

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Prefer IS_GEN check with bitmask.

2018-10-26 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Prefer IS_GEN check with bitmask. URL : https://patchwork.freedesktop.org/series/51622/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Prefer IS_GEN check with bitmask. -O:dri

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,v3,1/2] drm/i915: Add function to check for linear surfaces

2018-10-26 Thread Patchwork
== Series Details == Series: series starting with [CI,v3,1/2] drm/i915: Add function to check for linear surfaces URL : https://patchwork.freedesktop.org/series/51620/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5044 -> Patchwork_10611 = == Summary - SUCCESS == No reg

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Fix spelling mistake in intel_psr

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915: Fix spelling mistake in intel_psr URL : https://patchwork.freedesktop.org/series/51621/ State : failure == Summary == Applying: drm/i915: Fix spelling mistake in intel_psr Using index info to reconstruct a base tree... M drivers/gpu/drm/i915/intel_p

Re: [Intel-gfx] [PATCH v3 2/4] drm/i915: Eliminate the horrendous format check code

2018-10-26 Thread Dhinakaran Pandiyan
On Fri, 2018-03-09 at 17:14 +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Replace the messy framebuffer format/modifier validation code > with a single call to drm_any_plane_has_format(). The code was > extremely annoying to maintain as you had to have a lot of platform > checks for diffe

Re: [Intel-gfx] [PATCH] drm/i915: Fix spelling mistake in intel_psr

2018-10-26 Thread Rodrigo Vivi
On Fri, Oct 26, 2018 at 03:45:04PM -0400, Sean Paul wrote: > From: Sean Paul > > Noticed this while reading the comments, s/defesive/defensive/ > > Signed-off-by: Sean Paul Reviewed-by: Rodrigo Vivi > --- > drivers/gpu/drm/i915/intel_psr.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletio

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix ilk+ watermarks when disabling pipes

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915: Fix ilk+ watermarks when disabling pipes URL : https://patchwork.freedesktop.org/series/51518/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_5042_full -> Patchwork_10603_full = == Summary - FAILURE == Serious unknown changes coming

Re: [Intel-gfx] [PATCH v3 1/4] drm: Add drm_any_plane_has_format()

2018-10-26 Thread Dhinakaran Pandiyan
On Fri, 2018-03-09 at 17:14 +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Add a function to check whether there is at least one plane that > supports a specific format and modifier combination. Drivers can > use this to reject unsupported formats/modifiers in .fb_create(). > > v2: Accept

[Intel-gfx] [PATCH] drm/i915: Simplify has_sagv function

2018-10-26 Thread Rodrigo Vivi
The specially case for SKL for not controlled sagv is already taken care inside intel_enable_sagv, so there's no need to duplicate the check here. v2: Go one step further and remove skl special case. (Jani) v3: Separate runtime status handle from has_sagv flag. v4: Go back and accept simple Jani p

[Intel-gfx] [PATCH] drm/i915: Switch the order of function parameters

2018-10-26 Thread Dhinakaran Pandiyan
intel_fb_pitch_limit() has the parameters pixel_format and fb_modifier switched in their positions. The parameters are however used correctly, but change the order for consistency. Also use kernel data types for both parameters. Cc: Ville Syrjälä Signed-off-by: Dhinakaran Pandiyan --- drivers/

Re: [Intel-gfx] [RFC 2/3] drm/i915: Prefer IS_GEN check with bitmask.

2018-10-26 Thread Rodrigo Vivi
On Fri, Oct 26, 2018 at 09:47:05PM +0200, Julia Lawall wrote: > > > On Fri, 26 Oct 2018, Rodrigo Vivi wrote: > > > On Thu, Oct 25, 2018 at 12:11:57PM +0100, Julia Lawall wrote: > > > > > > > > > On Thu, 25 Oct 2018, Ville Syrjälä wrote: > > > > > > > On Wed, Oct 24, 2018 at 04:41:06PM -0700, Rod

[Intel-gfx] [PATCH 2/2] drm/i915: Kill GEN_FOREVER

2018-10-26 Thread Rodrigo Vivi
commit ac657f6461e5 ("drm/i915: Introduce IS_GEN macro") introduced GEN_FOREVER that was never used. My first attempt was to rename it to FOREVER since GEN is already part of the macro. Then I used coccinelle to change all -INTEL_GEN(e1) >= e2 +INTEL_GEN_RANGE(e1, e2, FOREVER) -INTEL_GEN(e1) <= e2

[Intel-gfx] [PATCH 1/2] drm/i915: Prefer IS_GEN check with bitmask.

2018-10-26 Thread Rodrigo Vivi
Whenever possible we should stick with IS_GEN checks. Bitmaks has been introduced on commit ae7617f0ef18 ("drm/i915: Allow optimized platform checks") for efficiency. Let's stick with it whenever possible. This patch was generated with coccinelle: spatch -sp_file is_gen.cocci *{c,h} --in-place

Re: [Intel-gfx] [PATCH] drm/i915/gtt: Allow mixed pages to setup large PTE

2018-10-26 Thread Chris Wilson
Quoting Matthew Auld (2018-10-26 20:27:46) > On Fri, 26 Oct 2018 at 16:16, Chris Wilson wrote: > > > > For example, we may want to split a 2MiB large page into multiple 64KiB > > PTEs. To do so, we want to allow a vma that only has the 2MiB flag set > > to utilise the 64KiB as required, i.e. we wa

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Clean up the wm mem latency stuff (rev5)

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915: Clean up the wm mem latency stuff (rev5) URL : https://patchwork.freedesktop.org/series/50802/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5044 -> Patchwork_10610 = == Summary - SUCCESS == No regressions found. External URL: h

Re: [Intel-gfx] [RFC 2/3] drm/i915: Prefer IS_GEN check with bitmask.

2018-10-26 Thread Julia Lawall
On Fri, 26 Oct 2018, Rodrigo Vivi wrote: > On Thu, Oct 25, 2018 at 12:11:57PM +0100, Julia Lawall wrote: > > > > > > On Thu, 25 Oct 2018, Ville Syrjälä wrote: > > > > > On Wed, Oct 24, 2018 at 04:41:06PM -0700, Rodrigo Vivi wrote: > > > > On Wed, Oct 24, 2018 at 01:22:57PM +0300, Ville Syrjälä w

[Intel-gfx] [PATCH] drm/i915: Fix spelling mistake in intel_psr

2018-10-26 Thread Sean Paul
From: Sean Paul Noticed this while reading the comments, s/defesive/defensive/ Signed-off-by: Sean Paul --- drivers/gpu/drm/i915/intel_psr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index 4bd5768731e

[Intel-gfx] [CI v3 2/2] drm/i915: Do not program aux plane offsets on gen11+

2018-10-26 Thread Dhinakaran Pandiyan
The PLANE_AUX_OFFSET mmio does not exist on ICL, do not program it. We'll still calculate the aux offset as it is required for adjusing x-y offsets. Cc: Ville Syrjälä Cc: Maarten Lankhorst Signed-off-by: Dhinakaran Pandiyan Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_sprite.c |

[Intel-gfx] [CI v3 1/2] drm/i915: Add function to check for linear surfaces

2018-10-26 Thread Dhinakaran Pandiyan
A framebuffer can comprise surfaces with distinct tiling formats, making checks against modifier alone insufficient. Make use of a function to identify a linear surface based on both modifier and color plane. v2: Typo fix v3: remove 'inline' from function definition (Ville) Cc: Ville Syrjälä Sig

Re: [Intel-gfx] [RFC 2/3] drm/i915: Prefer IS_GEN check with bitmask.

2018-10-26 Thread Rodrigo Vivi
On Thu, Oct 25, 2018 at 12:11:57PM +0100, Julia Lawall wrote: > > > On Thu, 25 Oct 2018, Ville Syrjälä wrote: > > > On Wed, Oct 24, 2018 at 04:41:06PM -0700, Rodrigo Vivi wrote: > > > On Wed, Oct 24, 2018 at 01:22:57PM +0300, Ville Syrjälä wrote: > > > > On Tue, Oct 23, 2018 at 04:36:19PM -0700,

Re: [Intel-gfx] [PATCH v3 09/10] drm/i915: Keep PSR disabled after a driver reload after a PSR error

2018-10-26 Thread Souza, Jose
On Fri, 2018-10-26 at 21:01 +0300, Ville Syrjälä wrote: > On Fri, Oct 26, 2018 at 05:53:47PM +, Souza, Jose wrote: > > On Thu, 2018-10-25 at 18:17 -0700, José Roberto de Souza wrote: > > > If a PSR error happened and the driver is reloaded, the > > > EDP_PSR_IIR > > > will still keep the error

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Clean up the wm mem latency stuff (rev5)

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915: Clean up the wm mem latency stuff (rev5) URL : https://patchwork.freedesktop.org/series/50802/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Store all wm memory latency values in .1 usec units -O:driver

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Clean up the wm mem latency stuff (rev5)

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915: Clean up the wm mem latency stuff (rev5) URL : https://patchwork.freedesktop.org/series/50802/ State : warning == Summary == $ dim checkpatch origin/drm-tip 220f3eac5592 drm/i915: Store all wm memory latency values in .1 usec units 488b0f8bd38a drm/i915:

Re: [Intel-gfx] [PATCH] drm/i915/gtt: Allow mixed pages to setup large PTE

2018-10-26 Thread Matthew Auld
On Fri, 26 Oct 2018 at 16:16, Chris Wilson wrote: > > For example, we may want to split a 2MiB large page into multiple 64KiB > PTEs. To do so, we want to allow a vma that only has the 2MiB flag set > to utilise the 64KiB as required, i.e. we want to include all larger > pages as well. I thought

[Intel-gfx] [PATCH v2 09/12] drm/i915: Sanitize wm latency values for ilk+

2018-10-26 Thread Ville Syrjala
From: Ville Syrjälä For skl+ we disable all wm levels with a decreasing memory latency value. Let's generalize the same code to work for all platoforms, and let's use it for ilk-bdw as well since those platforms also read the latency values from a scratch register. v2: n*10 usec, rebase Signed-

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Clean up the wm mem latency stuff (rev4)

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915: Clean up the wm mem latency stuff (rev4) URL : https://patchwork.freedesktop.org/series/50802/ State : failure == Summary == Applying: drm/i915: Store all wm memory latency values in .1 usec units Applying: drm/i915: Use the spr/cur latencies on vlv/chv/g

[Intel-gfx] [PATCH v2 08/12] drm/i915: Split skl+ and ilk+ read_wm_latency()

2018-10-26 Thread Ville Syrjala
From: Ville Syrjälä There's no point it having the skl+ and ilk+ codepaths for reading the wm latency values in the same function. Split them apart. v2: * 10 Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 195 +--- 1 file changed, 103 insertion

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Reuse plane format modifier checks to verify addfb() arguments

2018-10-26 Thread Pandiyan, Dhinakaran
> -Original Message- > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] > Sent: Friday, October 26, 2018 7:46 AM > To: Pandiyan, Dhinakaran > Cc: intel-gfx@lists.freedesktop.org > Subject: Re: [PATCH 2/2] drm/i915: Reuse plane format modifier checks to > verify addfb() argument

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Clean up the wm mem latency stuff (rev3)

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915: Clean up the wm mem latency stuff (rev3) URL : https://patchwork.freedesktop.org/series/50802/ State : failure == Summary == Applying: drm/i915: Store all wm memory latency values in .1 usec units Applying: drm/i915: Use the spr/cur latencies on vlv/chv/g

[Intel-gfx] [PATCH v2 04/12] drm/i915: Add dev_priv->wm.num_levels and use it everywhere

2018-10-26 Thread Ville Syrjala
From: Ville Syrjälä Unify our approach to figuring out how many wm levels are supported by having dev_priv->wm.num_levels. This replaces the older dev_priv->wm.max_level which was used on some of the platforms. I think num_levels is less confusing than max_level in most places. The +/-1 is now mo

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Clean up the wm mem latency stuff (rev2)

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915: Clean up the wm mem latency stuff (rev2) URL : https://patchwork.freedesktop.org/series/50802/ State : failure == Summary == Applying: drm/i915: Store all wm memory latency values in .1 usec units Applying: drm/i915: Use the spr/cur latencies on vlv/chv/g

[Intel-gfx] [PATCH v2 01/12] drm/i915: Store all wm memory latency values in .1 usec units

2018-10-26 Thread Ville Syrjala
From: Ville Syrjälä In order to simplify the code let's store all memory latency values in 0.1 usec units. This limits the platform specific units to the initial setup code for the most part. v2: Write the constants as ' * 10' for clarity Fix up the SKL+ wm calculations to match the .1 usec

Re: [Intel-gfx] [PATCH v3 09/10] drm/i915: Keep PSR disabled after a driver reload after a PSR error

2018-10-26 Thread Ville Syrjälä
On Fri, Oct 26, 2018 at 05:53:47PM +, Souza, Jose wrote: > On Thu, 2018-10-25 at 18:17 -0700, José Roberto de Souza wrote: > > If a PSR error happened and the driver is reloaded, the EDP_PSR_IIR > > will still keep the error set even after the reset done in the > > irq_preinstall and irq_uninst

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Add short HPD IRQ storm detection for non-MST systems

2018-10-26 Thread Lyude Paul
On Fri, 2018-10-26 at 20:52 +0300, Ville Syrjälä wrote: > On Thu, Oct 25, 2018 at 06:26:57PM -0400, Lyude Paul wrote: > > Unfortunately, it seems that the HPD IRQ storm problem from the early > > days of Intel GPUs was never entirely solved, only mostly. Within the > > last couple of days, I got a

Re: [Intel-gfx] [PATCH v3 09/10] drm/i915: Keep PSR disabled after a driver reload after a PSR error

2018-10-26 Thread Souza, Jose
On Thu, 2018-10-25 at 18:17 -0700, José Roberto de Souza wrote: > If a PSR error happened and the driver is reloaded, the EDP_PSR_IIR > will still keep the error set even after the reset done in the > irq_preinstall and irq_uninstall hooks. > And enabling in this situation cause the screen to freez

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Add short HPD IRQ storm detection for non-MST systems

2018-10-26 Thread Ville Syrjälä
On Thu, Oct 25, 2018 at 06:26:57PM -0400, Lyude Paul wrote: > Unfortunately, it seems that the HPD IRQ storm problem from the early > days of Intel GPUs was never entirely solved, only mostly. Within the > last couple of days, I got a bug report from one of our customers who > had been having issue

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Fix NULL deref when re-enabling HPD IRQs on systems with MST

2018-10-26 Thread Ville Syrjälä
On Thu, Oct 25, 2018 at 06:26:56PM -0400, Lyude Paul wrote: > Turns out that if you trigger an HPD storm on a system that has an MST > topology connected to it, you'll end up causing the kernel to eventually > hit a NULL deref: > > [ 332.339041] BUG: unable to handle kernel NULL pointer dereferen

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/7] drm/i915/dsc: Add slice_row_per_frame in DSC PPS programming

2018-10-26 Thread Patchwork
== Series Details == Series: series starting with [CI,1/7] drm/i915/dsc: Add slice_row_per_frame in DSC PPS programming URL : https://patchwork.freedesktop.org/series/51558/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5044 -> Patchwork_10606 = == Summary - SUCCESS ==

Re: [Intel-gfx] [PATCH v3 07/10] drm/i915/icl: Reset PSR interruptions

2018-10-26 Thread Ville Syrjälä
On Thu, Oct 25, 2018 at 06:17:34PM -0700, José Roberto de Souza wrote: > All other interruptions gen11 interruptions are reset in > gen11_irq_reset() also it is done for other gens that supports PSR. > > Cc: Dhinakaran Pandiyan > Cc: Paulo Zanoni > Signed-off-by: José Roberto de Souza > --- >

Re: [Intel-gfx] [PATCH v3 02/10] drm/i915/psr: Always wait for idle state when disabling PSR

2018-10-26 Thread Souza, Jose
On Fri, 2018-10-26 at 09:45 -0700, Rodrigo Vivi wrote: > On Thu, Oct 25, 2018 at 06:17:29PM -0700, José Roberto de Souza > wrote: > > It should always wait for idle state when disabling PSR because PSR > > could be inactive due a call to intel_psr_exit() and while PSR is > > still being disabled as

Re: [Intel-gfx] [PATCH v3 06/10] drm/i915: Unmask PSR interruptions before assert IIR

2018-10-26 Thread Ville Syrjälä
On Thu, Oct 25, 2018 at 06:17:33PM -0700, José Roberto de Souza wrote: > The IIR register is a result of a AND operation between the mask > register and the actual interruption state so checking IIR before > unmask interruptions will never get any errors even if they exits. IIR is the latched stat

Re: [Intel-gfx] [PATCH 1/2] ALSA: x86: Fix runtime PM for hdmi-lpe-audio

2018-10-26 Thread Ville Syrjälä
On Thu, Oct 25, 2018 at 07:50:29AM +0100, Chris Wilson wrote: > Quoting Chris Wilson (2018-10-24 17:32:04) > > Quoting Ville Syrjälä (2018-10-24 17:28:45) > > > On Wed, Oct 24, 2018 at 04:52:22PM +0100, Chris Wilson wrote: > > > > Quoting Ville Syrjala (2018-10-24 16:48:24) > > > > > From: Ville Sy

Re: [Intel-gfx] [PATCH] drm/i915/glk: Remove 99% limitation.

2018-10-26 Thread Ville Syrjälä
On Thu, Oct 25, 2018 at 05:56:36PM -0700, Rodrigo Vivi wrote: > While checking the opportunity to add a display_gen > check to allow glk and cnl to be on same bucket I noticed > these FIXME cases here. > > So I got the confirmation from HW architect that we actually > never needed this workaround.

Re: [Intel-gfx] [PATCH v3 02/10] drm/i915/psr: Always wait for idle state when disabling PSR

2018-10-26 Thread Rodrigo Vivi
On Thu, Oct 25, 2018 at 06:17:29PM -0700, José Roberto de Souza wrote: > It should always wait for idle state when disabling PSR because PSR > could be inactive due a call to intel_psr_exit() and while PSR is > still being disabled asynchronously userspace could change the > modeset causing a call

Re: [Intel-gfx] [PATCH v4 1/2] drm/i915/skl: Rework MOCS tables to keep common part in a define

2018-10-26 Thread Lucas De Marchi
On Fri, Oct 26, 2018 at 05:32:45PM +0200, Tomasz Lis wrote: > The MOCS tables are going to be very similar across platforms. > > To reduce the amount of copied code, this patch rips the common part and > puts it into a definition valid for all gen9 platforms. > > Signed-off-by: Tomasz Lis > Sugg

[Intel-gfx] ✓ Fi.CI.IGT: success for Enable Plane Input CSC for ICL (rev4)

2018-10-26 Thread Patchwork
== Series Details == Series: Enable Plane Input CSC for ICL (rev4) URL : https://patchwork.freedesktop.org/series/51463/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5041_full -> Patchwork_10599_full = == Summary - WARNING == Minor unknown changes coming with Patchwork_

Re: [Intel-gfx] [PATCH v2] drm/i915/hdmi: Detect HDMI 2.0 monitors using multiple EDID capabilities

2018-10-26 Thread Ville Syrjälä
On Wed, Oct 24, 2018 at 02:04:33PM -0700, clinton.a.tay...@intel.com wrote: > From: Clint Taylor > > HDMI 2.0 monitors may not support SCDC and still be able to accept VICs > above 63. Use multiple EDID capbilities to determine if the SINK is > actually an HDMI 2.0 device. The QD980B HDMI 2.0 Ana

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/glk: Remove 99% limitation.

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915/glk: Remove 99% limitation. URL : https://patchwork.freedesktop.org/series/51561/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5043 -> Patchwork_10605 = == Summary - SUCCESS == No regressions found. External URL: https://patchwo

Re: [Intel-gfx] [PATCH] drm/i915/fia: FIA registers offset implementation.

2018-10-26 Thread Lucas De Marchi
On Thu, Oct 25, 2018 at 10:14:39PM -0700, Anusha Srivatsa wrote: > The registers DPCSSS,DPSP,DPMLE1 and DPPMS are all at an offset > from the base - which is the FLexi IO Adaptor. Lets follow the > offset calculation while accessing these registers. > > Cc: Lucas De Marchi > Signed-off-by: Anusha

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gtt: Allow mixed pages to setup large PTE (rev2)

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915/gtt: Allow mixed pages to setup large PTE (rev2) URL : https://patchwork.freedesktop.org/series/51596/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5043 -> Patchwork_10604 = == Summary - SUCCESS == No regressions found. External

Re: [Intel-gfx] [PATCH] drm/i915: convert HDCP DRM_ERROR into DRM_DEBUG

2018-10-26 Thread Sean Paul
On Thu, Oct 25, 2018 at 11:47:52PM +0530, Ramalingam C wrote: > Conceptually user should be knowing the feature status through uAPI. > So HDCP authentication failure information need not DRM_ERRORS. > They are needed only for ENG debugging. > > And also in HDCP we tolerate the retries for HDCP aut

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Do not program aux plane offsets on gen11+

2018-10-26 Thread Ville Syrjälä
On Thu, Oct 25, 2018 at 02:32:44PM -0700, Dhinakaran Pandiyan wrote: > The PLANE_AUX_OFFSET mmio does not exist on ICL, do not program it. We'll > still calculate the aux offset as it is required for adjusing x-y offsets. Ah yes. CCS doesn't have its own offsets, and with NV12 using another plane

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gtt: Allow mixed pages to setup large PTE (rev2)

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915/gtt: Allow mixed pages to setup large PTE (rev2) URL : https://patchwork.freedesktop.org/series/51596/ State : warning == Summary == $ dim checkpatch origin/drm-tip d26af29fb682 drm/i915/gtt: Allow mixed pages to setup large PTE -:76: CHECK:PARENTHESIS_ALI

[Intel-gfx] [PATCH v4 2/2] drm/i915/icl: Define MOCS table for Icelake

2018-10-26 Thread Tomasz Lis
The table has been unified across OSes to minimize virtualization overhead. The MOCS table is now published as part of bspec, and versioned. Entries are supposed to never be modified, but new ones can be added. Adding entries increases table version. The patch includes version 1 entries. Meaning

[Intel-gfx] [PATCH v4 1/2] drm/i915/skl: Rework MOCS tables to keep common part in a define

2018-10-26 Thread Tomasz Lis
The MOCS tables are going to be very similar across platforms. To reduce the amount of copied code, this patch rips the common part and puts it into a definition valid for all gen9 platforms. Signed-off-by: Tomasz Lis Suggested-by: Lucas De Marchi Cc: Joonas Lahtinen Cc: Chris Wilson Cc: Dani

Re: [Intel-gfx] [PATCH] RFC: Make igts for cross-driver stuff mandatory?

2018-10-26 Thread Alex Deucher
On Fri, Oct 19, 2018 at 4:51 AM Daniel Vetter wrote: > > Hi all, > > This is just to collect feedback on this idea, and see whether the > overall dri-devel community stands on all this. I think the past few > cross-vendor uapi extensions all came with igts attached, and > personally I think there'

[Intel-gfx] [PATCH] drm/i915/gtt: Allow mixed pages to setup large PTE

2018-10-26 Thread Chris Wilson
For example, we may want to split a 2MiB large page into multiple 64KiB PTEs. To do so, we want to allow a vma that only has the 2MiB flag set to utilise the 64KiB as required, i.e. we want to include all larger pages as well. Signed-off-by: Chris Wilson Cc: Matthew Auld --- drivers/gpu/drm/i91

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915: Add function to check for linear surfaces

2018-10-26 Thread Ville Syrjälä
On Thu, Oct 25, 2018 at 04:10:26PM -0700, Dhinakaran Pandiyan wrote: > A framebuffer can comprise surfaces with distinct tiling formats, > making checks against modifier alone insufficient. Make use of a > function to identify a linear surface based on both modifier and color > plane. > > v2: Typo

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Reuse plane format modifier checks to verify addfb() arguments

2018-10-26 Thread Ville Syrjälä
On Thu, Oct 25, 2018 at 06:32:56PM -0700, Dhinakaran Pandiyan wrote: > Currently there is some duplication of pixel format and modifier > validation code between the fb creation and plane check paths. We can > unify them by checking if any plane supports a pixel format and modifier > combination du

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for dma-buf: Update reservation shared_count after adding the new fence

2018-10-26 Thread Chris Wilson
Quoting Patchwork (2018-10-26 15:40:01) > == Series Details == > > Series: dma-buf: Update reservation shared_count after adding the new fence > URL : https://patchwork.freedesktop.org/series/51579/ > State : success > > == Summary == > > = CI Bug Log - changes from CI_DRM_5039_full -> Patchwo

Re: [Intel-gfx] [igt-dev] [PATCH] RFC: Make igts for cross-driver stuff mandatory?

2018-10-26 Thread Alex Deucher
On Fri, Oct 26, 2018 at 4:32 AM Daniel Vetter wrote: > > On Fri, Oct 26, 2018 at 5:50 AM Zhou, David(ChunMing) > wrote: > > > > Make igt for cross-driver, I think you should rename it first, not an intel > > specific. NO company wants their employee working on other company stuff. > > You can re

[Intel-gfx] ✓ Fi.CI.IGT: success for dma-buf: Update reservation shared_count after adding the new fence

2018-10-26 Thread Patchwork
== Series Details == Series: dma-buf: Update reservation shared_count after adding the new fence URL : https://patchwork.freedesktop.org/series/51579/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5039_full -> Patchwork_10598_full = == Summary - SUCCESS == No regressions

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix ilk+ watermarks when disabling pipes

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915: Fix ilk+ watermarks when disabling pipes URL : https://patchwork.freedesktop.org/series/51518/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5042 -> Patchwork_10603 = == Summary - SUCCESS == No regressions found. External URL: h

Re: [Intel-gfx] [PATCH] drm/i915/userptr: Avoid struct_mutex recursion for mmu_invalidate_range_start

2018-10-26 Thread Daniel Vetter
On Fri, Oct 26, 2018 at 11:02 AM Daniel Vetter wrote: > > On Thu, Oct 25, 2018 at 9:39 PM Chris Wilson wrote: > > > > Quoting Daniel Vetter (2018-10-25 20:16:50) > > > On Thu, Oct 25, 2018 at 01:45:42PM +0100, Chris Wilson wrote: > > > > Since commit 93065ac753e4 ("mm, oom: distinguish blockable

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/syncobj: Avoid kmalloc(GFP_KERNEL) under spinlock (rev2)

2018-10-26 Thread Patchwork
== Series Details == Series: drm/syncobj: Avoid kmalloc(GFP_KERNEL) under spinlock (rev2) URL : https://patchwork.freedesktop.org/series/51525/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5038_full -> Patchwork_10597_full = == Summary - WARNING == Minor unknown changes

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gtt: Allow mixed pages to setup large PTE

2018-10-26 Thread Patchwork
== Series Details == Series: drm/i915/gtt: Allow mixed pages to setup large PTE URL : https://patchwork.freedesktop.org/series/51596/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_5042 -> Patchwork_10600 = == Summary - FAILURE == Serious unknown changes coming with Patch

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [2/2] drm/i915: Allow disabling error capture (rev3)

2018-10-26 Thread Patchwork
== Series Details == Series: series starting with [2/2] drm/i915: Allow disabling error capture (rev3) URL : https://patchwork.freedesktop.org/series/13576/ State : failure == Summary == Applying: drm/i915: Allow disabling error capture Using index info to reconstruct a base tree... M d

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [2/2] drm/i915: Allow disabling error capture (rev3)

2018-10-26 Thread Patchwork
== Series Details == Series: series starting with [2/2] drm/i915: Allow disabling error capture (rev3) URL : https://patchwork.freedesktop.org/series/13576/ State : failure == Summary == Applying: drm/i915: Allow disabling error capture Using index info to reconstruct a base tree... M d

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