Em Qua, 2018-08-15 às 23:27 +0300, Imre Deak escreveu:
> On Wed, Aug 08, 2018 at 03:16:11PM -0700, Paulo Zanoni wrote:
> > Use the same coding pattern as we use in the other functions of the
> > same file: just call lookup_power_well() directly in the only
> > caller.
> >
> > Cc: Imre Deak
> > Si
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/icl: Implement HSDIV_RATIO of
MG_CLKTOP2_HSCLKCTL_PORT reg as separate divider value defines
URL : https://patchwork.freedesktop.org/series/48416/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4687_full ->
Em Sex, 2018-08-17 às 09:25 -0700, Srivatsa, Anusha escreveu:
> > -Original Message-
> > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On
> > Behalf Of
> > Paulo Zanoni
> > Sent: Wednesday, August 1, 2018 10:35 AM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Zanoni, Pa
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/icl: Implement HSDIV_RATIO of
MG_CLKTOP2_HSCLKCTL_PORT reg as separate divider value defines
URL : https://patchwork.freedesktop.org/series/48416/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4687 -> Patch
From: Manasi Navare
PLLs are the source clocks for the DDIs so in order to determine the
ddi clock we need to check the PLL configuration.
For MG PHy Ports (C - F), depending on whether it is a TBT PLL or MG
PLL the link lock can be obtained from the the PLL divisors based on
the specification.
From: Manasi Navare
The register value of Divider Ratio for high speed divider
(hsdiv_ratio) in MG_CLKTOP2_HSCLKCTL_PORT register is not same as the
actual numerical value of the divider. So this patch implements
separate divider value defines for that field.
icl_mg_pll_find_divisors() can use th
Thanks Lyude.
So based on the imitial comments from Jani N, the recommendation was to
disconnect
downclock_mode from drrs_init so that user can set downclock mode
independently from drrs mode.
Jani,
So we would need following changes:
* Set the panel->downclock_mode in edp_init_connector() using
== Series Details ==
Series: drm/i915: Increase LSPCON timeout
URL : https://patchwork.freedesktop.org/series/48414/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4686_full -> Patchwork_9975_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_9975_
On Fri, Aug 17, 2018 at 09:04:24PM +0300, Imre Deak wrote:
> On Fri, Aug 17, 2018 at 10:33:30AM -0700, Anusha Srivatsa wrote:
> > Let us reuse the already defined has_csr check and not
> > redefine it.
>
> The main difference is that in effect this will flip .has_csr to 1
> (via GEN9_FEATURES whic
On Fri, 2018-08-17 at 13:40 -0700, Manasi Navare wrote:
> On Fri, Aug 17, 2018 at 04:32:09PM -0400, Lyude Paul wrote:
> > After reading the discussion so far on this patch, this sounds correct! One
> > nit
> > pick below though:
> >
> > On Wed, 2018-05-16 at 19:21 -0700, Manasi Navare wrote:
> > >
On Fri, Aug 17, 2018 at 04:32:09PM -0400, Lyude Paul wrote:
> After reading the discussion so far on this patch, this sounds correct! One
> nit
> pick below though:
>
> On Wed, 2018-05-16 at 19:21 -0700, Manasi Navare wrote:
> > This patch fixes the original commit c0cfb10d9e1de49 ("drm/i915/edp:
== Series Details ==
Series: drm/i915: Increase LSPCON timeout
URL : https://patchwork.freedesktop.org/series/48414/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4686 -> Patchwork_9975 =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_9975 need to be
On Fri, 2018-08-17 at 13:12 +0200, Jan-Marek Glogowski wrote:
> Resend, as this was in my sent-mail folder, but it doesn't appear in the list
> archive…
>
> Am August 16, 2018 6:03:50 PM UTC schrieb Manasi Navare <
> manasi.d.nav...@intel.com>:
> > On Wed, Aug 08, 2018 at 10:53:35AM +0200, Jan-Mar
After reading the discussion so far on this patch, this sounds correct! One nit
pick below though:
On Wed, 2018-05-16 at 19:21 -0700, Manasi Navare wrote:
> This patch fixes the original commit c0cfb10d9e1de49 ("drm/i915/edp:
> Do not do link training fallback or prune modes on EDP") that causes
>
== Series Details ==
Series: drm/i915: Increase LSPCON timeout
URL : https://patchwork.freedesktop.org/series/48414/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b7c954809a11 drm/i915: Increase LSPCON timeout
-:10: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit descri
100 ms is not enough time for the LSPCON adapter on Intel NUC devices to
settle. This causes dropped display modes at boot or screen reconfiguration.
Empirical testing can reproduce the error up to a timeout of 190 ms. Basic
boot and stress testing at 200 ms has not (yet) failed.
Increase timeout
>-Original Message-
>From: Navare, Manasi D
>Sent: Monday, July 30, 2018 7:13 PM
>To: intel-gfx@lists.freedesktop.org
>Cc: ville.syrj...@linux.intel.com; jani.nik...@linux.intel.com; Srivatsa,
>Anusha
>; Singh, Gaurav K ;
>Navare, Manasi D ; Vivi, Rodrigo
>; Nikula, Jani
>Subject: [PATC
>-Original Message-
>From: Navare, Manasi D
>Sent: Tuesday, July 31, 2018 2:07 PM
>To: intel-gfx@lists.freedesktop.org
>Cc: Navare, Manasi D ; Singh, Gaurav K
>; Jani Nikula ; Ville
>Syrjala ; Srivatsa, Anusha
>
>Subject: [PATCH v2 11/23] drm/i915/dp: Add DSC params and DSC config to
>int
This patch needs to now incorporate the newly added slice_row_per_frame
parameter in PPS_16.
Anusha
>-Original Message-
>From: Navare, Manasi D
>Sent: Tuesday, July 31, 2018 2:07 PM
>To: intel-gfx@lists.freedesktop.org
>Cc: Navare, Manasi D ; Singh, Gaurav K
>; dri-de...@lists.freedeskt
>-Original Message-
>From: Navare, Manasi D
>Sent: Tuesday, July 31, 2018 2:07 PM
>To: intel-gfx@lists.freedesktop.org
>Cc: Navare, Manasi D ; Singh, Gaurav K
>; Jani Nikula ; Ville
>Syrjala ; Srivatsa, Anusha
>; Pandiyan, Dhinakaran
>
>Subject: [PATCH v2 04/23] drm/i915/dp: Add helpers f
>-Original Message-
>From: Navare, Manasi D
>Sent: Tuesday, July 31, 2018 2:07 PM
>To: intel-gfx@lists.freedesktop.org
>Cc: Navare, Manasi D ; Singh, Gaurav K
>; Jani Nikula ; Ville
>Syrjala ; Srivatsa, Anusha
>
>Subject: [PATCH v2 05/23] drm/i915/dp: Validate modes using max Output BPP
>
On Fri, Aug 17, 2018 at 07:40:11PM +0100, Chris Wilson wrote:
> Quoting Rodrigo Vivi (2018-08-17 19:24:14)
> > On Fri, Aug 17, 2018 at 05:59:59PM -, Patchwork wrote:
> > > == Series Details ==
> > >
> > > Series: drm/i915: Do not redefine the has_csr parameter.
> > > URL : https://patchwork.
== Series Details ==
Series: drm/i915: Do not redefine the has_csr parameter.
URL : https://patchwork.freedesktop.org/series/48408/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4686_full -> Patchwork_9974_full =
== Summary - SUCCESS ==
No regressions found.
== Know
Quoting Rodrigo Vivi (2018-08-17 19:24:14)
> On Fri, Aug 17, 2018 at 05:59:59PM -, Patchwork wrote:
> > == Series Details ==
> >
> > Series: drm/i915: Do not redefine the has_csr parameter.
> > URL : https://patchwork.freedesktop.org/series/48408/
> > State : success
> >
> > == Summary ==
>
On 17/08/18 10:49, Chris Wilson wrote:
Quoting Antonio Argenziano (2018-08-17 18:29:09)
On 15/08/18 02:25, Chris Wilson wrote:
Fixes: d8e78990aa2b ("igt/pm_rpm: Test reaquisition of runtime-pm after module
reload")
Signed-off-by: Chris Wilson
---
tests/pm_rpm.c | 2 ++
1 file changed
On Fri, Aug 17, 2018 at 05:59:59PM -, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Do not redefine the has_csr parameter.
> URL : https://patchwork.freedesktop.org/series/48408/
> State : success
>
> == Summary ==
>
> = CI Bug Log - changes from CI_DRM_4686 -> Patchwork_99
On Thu, Jul 26, 2018 at 07:44:09PM +0530, Mahesh Kumar wrote:
> IPC may cause underflows if not used with dual channel symmetric
> memory configuration. Disable IPC for non symmetric configurations in
> affected platforms.
> Display WA #1141
>
> Signed-off-by: Mahesh Kumar
> ---
> drivers/gpu/drm
On Fri, Aug 17, 2018 at 10:33:30AM -0700, Anusha Srivatsa wrote:
> Let us reuse the already defined has_csr check and not
> redefine it.
The main difference is that in effect this will flip .has_csr to 1
(via GEN9_FEATURES which GEN11_FEATURES pulls in).
Fixes: https://bugs.freedesktop.org/show_b
== Series Details ==
Series: drm/i915: Do not redefine the has_csr parameter.
URL : https://patchwork.freedesktop.org/series/48408/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4686 -> Patchwork_9974 =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_
On Thu, Jul 26, 2018 at 07:44:08PM +0530, Mahesh Kumar wrote:
> Memory with 16GB dimms require an increase of 1us in level-0 latency.
> This patch implements the same.
> Bspec: 4381
>
> changes since V1:
> - s/memdev_info/dram_info
> - make skl_is_16gb_dimm pure function
>
> Signed-off-by: Mahe
Quoting Antonio Argenziano (2018-08-17 18:29:09)
>
>
> On 15/08/18 02:25, Chris Wilson wrote:
> > Fixes: d8e78990aa2b ("igt/pm_rpm: Test reaquisition of runtime-pm after
> > module reload")
> > Signed-off-by: Chris Wilson
> > ---
> > tests/pm_rpm.c | 2 ++
> > 1 file changed, 2 insertions(+)
On Thu, Jul 26, 2018 at 07:44:06PM +0530, Mahesh Kumar wrote:
> This patch adds support to decode system memory bandwidth and other
> parameters for broxton platform, which will be used for arbitrated
> display memory bandwidth calculation in GEN9 based platforms and
> WM latency level-0 Work-aroun
On 15/08/18 13:59, Chris Wilson wrote:
Keep the drm_fd owned by pm_rpm as we need to relinquish all ownership
of the device in order to unload the module.
Signed-off-by: Chris Wilson
LGTM.
Reviewed-by: Antonio Argenziano
---
tests/pm_rpm.c | 5 -
1 file changed, 4 insertions(+), 1
Let us reuse the already defined has_csr check and not
redefine it.
Suggested-by: Imre Deak
Cc: Imre Deak
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/i915_pci.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i9
On 15/08/18 02:25, Chris Wilson wrote:
Fixes: d8e78990aa2b ("igt/pm_rpm: Test reaquisition of runtime-pm after module
reload")
Signed-off-by: Chris Wilson
---
tests/pm_rpm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tests/pm_rpm.c b/tests/pm_rpm.c
index 65489bcdb..a4f9f783e 100
On 10/08/18 04:01, Chris Wilson wrote:
More variants on stress waits to serve the dual purpose of investigating
different aspects of the latency (this time while also serving
execlists interrupts) while also checking that we never miss the wakeup.
Signed-off-by: Chris Wilson
---
tests/gem_s
== Series Details ==
Series: Add Plane Color Properties (rev4)
URL : https://patchwork.freedesktop.org/series/30875/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4685_full -> Patchwork_9972_full =
== Summary - SUCCESS ==
No regressions found.
== Known issues ==
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Paulo Zanoni
>Sent: Wednesday, August 1, 2018 10:35 AM
>To: intel-gfx@lists.freedesktop.org
>Cc: Zanoni, Paulo R ; Vivi, Rodrigo
>
>Subject: [Intel-gfx] [PATCH v3] drm/i915/icl: implement t
== Series Details ==
Series: drm/i915/execlists: Micro-optimise "idle" context switch
URL : https://patchwork.freedesktop.org/series/48392/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4685_full -> Patchwork_9969_full =
== Summary - FAILURE ==
Serious unknown changes co
Quoting Imre Deak (2018-08-17 15:58:37)
> After
> commit 2cd9a689e97b ("drm/i915: Refactor intel_display_set_init_power()
> logic")
> it makes more sense to check the power domain/well refcounts after
> enabling the power domains functionality. Before that it's guaranteed
> that most power wells (
== Series Details ==
Series: drm/i915: Verify power domains after enabling them (rev3)
URL : https://patchwork.freedesktop.org/series/48394/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4685 -> Patchwork_9973 =
== Summary - SUCCESS ==
No regressions found.
External U
== Series Details ==
Series: drm/i915: Verify power domains after enabling them (rev3)
URL : https://patchwork.freedesktop.org/series/48394/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c7bd0b63b579 drm/i915: Verify power domains after enabling them
-:7: WARNING:COMMIT_LOG_LON
After
commit 2cd9a689e97b ("drm/i915: Refactor intel_display_set_init_power() logic")
it makes more sense to check the power domain/well refcounts after
enabling the power domains functionality. Before that it's guaranteed
that most power wells (in the INIT domain) will have a reference held,
so no
So that this test can be run in drivers other than i915.
Remove devid and only check it if the driver is i915.
Signed-off-by: Haneen Mohammed
---
changes in v2:
- return false for has_nonsquare_cursors() when driver not i915.
tests/kms_cursor_crc.c | 31 +--
1 file c
Am August 16, 2018 6:03:50 PM UTC schrieb Manasi Navare
:
>On Wed, Aug 08, 2018 at 10:53:35AM +0200, Jan-Marek Glogowski wrote:
>> This re-applies the workaround for "some DP sinks, [which] are a
>> little nuts" from commit 1a36147bb939 ("drm/i915: Perform link
>> quality check unconditionally dur
Resend, as this was in my sent-mail folder, but it doesn't appear in the list
archive…
Am August 16, 2018 6:03:50 PM UTC schrieb Manasi Navare
:
>On Wed, Aug 08, 2018 at 10:53:35AM +0200, Jan-Marek Glogowski wrote:
>> This re-applies the workaround for "some DP sinks, [which] are a
>> little nut
== Series Details ==
Series: Add Plane Color Properties (rev4)
URL : https://patchwork.freedesktop.org/series/30875/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4685 -> Patchwork_9972 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.f
Hi Chris,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.18 next-20180817]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
== Series Details ==
Series: Add Plane Color Properties (rev4)
URL : https://patchwork.freedesktop.org/series/30875/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm: Add Enhanced Gamma LUT precision structure
+drivers/gpu/drm/drm_plane.c:437:10: warning: symbol
'drm_colo
== Series Details ==
Series: Add Plane Color Properties (rev4)
URL : https://patchwork.freedesktop.org/series/30875/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
1676eec85114 drm: Add Enhanced Gamma LUT precision structure
e9786d7168cd drm: Add Plane Degamma properties
-:59: C
Implement Plane Gamma feature for BDW and Gen9 platforms.
v2: Used newly added drm_color_lut_ext structure for enhanced
precision for Gamma LUT entries.
v3: Rebase
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_pci.c | 5 +++-
drivers/gpu/drm/i915/i915_reg.h | 25 +
Load plane color luts as part of atomic plane updates.
This will be done only if the plane color luts are changed.
v4: Rebase
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_atomic_plane.c | 4
drivers/gpu/drm/i915/intel_color.c| 8
drivers/gpu/drm/i915/intel_drv
Enable and initialize plane color features.
v2: Rebase and some cleanup
v3: Updated intel_plane_color_init to call
drm_plane_color_create_prop function, which will
in turn create plane color properties.
v4: Rebase
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_drv.h | 5 ++
Define helper function to enable Plane color features
to attach plane color properties to plane structure.
v2: Rebase
v3: Modiefied the function to use updated property names.
v4: Rebase
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_plane.c | 42 +
Add Plane Degamma as a blob property and plane degamma size as
a range property.
v2: Rebase
v3: Fixed Sean, Paul's review comments. Moved the property from
mode_config to drm_plane. Created a helper function to instantiate
these properties and removed from drm_mode_create_standard_properties
Adde
This patch series adds properties for plane color features. It adds
properties for degamma used to linearize data, CSC used for gamut
conversion, and gamma used to again non-linearize data as per panel
supported color space. These can be utilize by user space to convert
planes from one format to an
Existing LUT precision structure is having only 16 bit
precision. This is not enough for upcoming enhanced hardwares
and advance usecases like HDR processing. Hence added a new
structure with 32 bit precision values. Also added the code,
for extracting the same from values passed from userspace.
v
Add plane gamma as blob property and size as a
range property.
v2: Rebase
v3: Fixed Sean, Paul's review comments. Moved the property from
mode_config to drm_plane. Created a helper function to instantiate
these properties and removed from drm_mode_create_standard_properties
Added property documen
Add a blob property for plane CSC usage.
v2: Rebase
v3: Fixed Sean, Paul's review comments. Moved the property from
mode_config to drm_plane. Created a helper function to instantiate
these properties and removed from drm_mode_create_standard_properties
Added property documentation as suggested by
Quoting Patchwork (2018-08-17 14:44:57)
> == Series Details ==
>
> Series: drm/i915: Verify power domains after enabling them (rev2)
> URL : https://patchwork.freedesktop.org/series/48394/
> State : failure
>
> == Summary ==
>
> = CI Bug Log - changes from CI_DRM_4685 -> Patchwork_9971 =
>
>
On Fri, Aug 17, 2018 at 01:44:57PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Verify power domains after enabling them (rev2)
> URL : https://patchwork.freedesktop.org/series/48394/
> State : failure
>
> == Summary ==
>
> = CI Bug Log - changes from CI_DRM_4685 -> Pat
== Series Details ==
Series: drm/i915/audio: Hook up component bindings even if displays are disabled
URL : https://patchwork.freedesktop.org/series/48387/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4685_full -> Patchwork_9968_full =
== Summary - SUCCESS ==
No regress
== Series Details ==
Series: drm/i915: Verify power domains after enabling them (rev2)
URL : https://patchwork.freedesktop.org/series/48394/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4685 -> Patchwork_9971 =
== Summary - FAILURE ==
Serious unknown changes coming with
Hi Chris,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.18 next-20180817]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
== Series Details ==
Series: drm/i915: Verify power domains after enabling them (rev2)
URL : https://patchwork.freedesktop.org/series/48394/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3f95a53c8ade drm/i915: Verify power domains after enabling them
-:7: ERROR:GIT_COMMIT_ID: P
Quoting Imre Deak (2018-08-17 14:18:02)
> After
> commit 2cd9a689e97b ("Refactor intel_display_set_init_power() logic")
> it makes more sense to check the power domain/well refcounts after
> enabling the power domains functionality. Before that it's guaranteed
> that most power wells (in the INIT d
After
commit 2cd9a689e97b ("Refactor intel_display_set_init_power() logic")
it makes more sense to check the power domain/well refcounts after
enabling the power domains functionality. Before that it's guaranteed
that most power wells (in the INIT domain) will have a reference held,
so not an inter
== Series Details ==
Series: drm/i915: Verify power domains after enabling them
URL : https://patchwork.freedesktop.org/series/48394/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4685 -> Patchwork_9970 =
== Summary - SUCCESS ==
No regressions found.
External URL:
ht
Quoting Imre Deak (2018-08-17 13:53:06)
> On Fri, Aug 17, 2018 at 01:32:24PM +0100, Chris Wilson wrote:
> > Quoting Imre Deak (2018-08-17 13:26:13)
> > > After
> > > commit 2cd9a689e97b ("Refactor intel_display_set_init_power() logic")
> > > it makes more sense to check the power domain/well refcou
On Fri, Aug 17, 2018 at 01:32:24PM +0100, Chris Wilson wrote:
> Quoting Imre Deak (2018-08-17 13:26:13)
> > After
> > commit 2cd9a689e97b ("Refactor intel_display_set_init_power() logic")
> > it makes more sense to check the power domain/well refcounts after
> > enabling the power domains functiona
== Series Details ==
Series: drm/i915: Verify power domains after enabling them
URL : https://patchwork.freedesktop.org/series/48394/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
89a97df5f335 drm/i915: Verify power domains after enabling them
-:7: ERROR:GIT_COMMIT_ID: Please u
== Series Details ==
Series: drm/i915/execlists: Micro-optimise "idle" context switch
URL : https://patchwork.freedesktop.org/series/48392/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4685 -> Patchwork_9969 =
== Summary - SUCCESS ==
No regressions found.
External UR
On Fri, Aug 17, 2018 at 10:48:29AM +0100, Chris Wilson wrote:
> Quoting Imre Deak (2018-08-17 10:38:01)
> > On Fri, Aug 17, 2018 at 10:24:30AM +0100, Chris Wilson wrote:
> > > Quoting Imre Deak (2018-08-17 10:14:51)
> > > > On Thu, Aug 16, 2018 at 07:01:36PM +0100, Chris Wilson wrote:
> > > > > Loa
Quoting Imre Deak (2018-08-17 13:26:13)
> After
> commit 2cd9a689e97b ("Refactor intel_display_set_init_power() logic")
> it makes more sense to check the power domain/well refcounts after
> enabling the power domains functionality. Before that it's guaranteed
> that most power wells (in the INIT d
After
commit 2cd9a689e97b ("Refactor intel_display_set_init_power() logic")
it makes more sense to check the power domain/well refcounts after
enabling the power domains functionality. Before that it's guaranteed
that most power wells (in the INIT domain) will have a reference held,
so not an inter
On gen9, we see an effect where when we perform an element switch just
as the first context completes execution that switch takes twice as
long, as if it first reloads the completed context. That is we observe
the cost of
context1 -> idle -> context1 -> context2
as being twice the cost o
== Series Details ==
Series: drm/i915: Correct CSB probing for engine state dumper
URL : https://patchwork.freedesktop.org/series/48381/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4684_full -> Patchwork_9967_full =
== Summary - WARNING ==
Minor unknown changes coming
== Series Details ==
Series: drm/i915: Keep physical cursors pinned while in use
URL : https://patchwork.freedesktop.org/series/48379/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4684_full -> Patchwork_9966_full =
== Summary - WARNING ==
Minor unknown changes coming wi
Our unclaimed mmio access debugging is lazy, doing cheap checks
periodically and only if they fail do a full check around every mmio
access. When testing for runtime pm, enable the full mmio debugging from
the initial load.
Signed-off-by: Chris Wilson
Cc: Imre Deak
---
tests/pm_rpm.c | 7 +-
== Series Details ==
Series: drm/i915/audio: Hook up component bindings even if displays are disabled
URL : https://patchwork.freedesktop.org/series/48387/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4685 -> Patchwork_9968 =
== Summary - SUCCESS ==
No regressions found
If the display has been disabled by modparam, we still want to connect
together the HW bits and bobs with the associated drivers so that we can
continue to manage their runtime power gating.
Fixes: 108109444ff6 ("drm/i915: Check num_pipes before initializing audio
component")
Signed-off-by: Chris
On Fri, 17 Aug 2018 11:38:01 +0200,
Imre Deak wrote:
>
> On Fri, Aug 17, 2018 at 10:24:30AM +0100, Chris Wilson wrote:
> > Quoting Imre Deak (2018-08-17 10:14:51)
> > > On Thu, Aug 16, 2018 at 07:01:36PM +0100, Chris Wilson wrote:
> > > > Loading the sounds modules is asynchronous with the sysfs d
On Tue, 07 Aug 2018, Anusha Srivatsa wrote:
> From: "Srivatsa, Anusha"
>
> DP 1.4 has Forward Error Correction Support(FEC).
> Add helper function to check if the sink device
> supports FEC.
>
> v2: Separate the helper and the code that uses the helper into
> two separate patches. (Manasi)
>
> v3
Quoting Imre Deak (2018-08-17 10:38:01)
> On Fri, Aug 17, 2018 at 10:24:30AM +0100, Chris Wilson wrote:
> > Quoting Imre Deak (2018-08-17 10:14:51)
> > > On Thu, Aug 16, 2018 at 07:01:36PM +0100, Chris Wilson wrote:
> > > > Loading the sounds modules is asynchronous with the sysfs device
> > > > hi
== Series Details ==
Series: drm/i915: Correct CSB probing for engine state dumper
URL : https://patchwork.freedesktop.org/series/48381/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4684 -> Patchwork_9967 =
== Summary - SUCCESS ==
No regressions found.
External URL:
On Fri, Aug 17, 2018 at 10:24:30AM +0100, Chris Wilson wrote:
> Quoting Imre Deak (2018-08-17 10:14:51)
> > On Thu, Aug 16, 2018 at 07:01:36PM +0100, Chris Wilson wrote:
> > > Loading the sounds modules is asynchronous with the sysfs device
> > > hierarchy being instantiated sometime after modprobe
Quoting Imre Deak (2018-08-17 10:14:51)
> On Thu, Aug 16, 2018 at 07:01:36PM +0100, Chris Wilson wrote:
> > Loading the sounds modules is asynchronous with the sysfs device
> > hierarchy being instantiated sometime after modprobe returns. As such
> > while we are probing for the sound device, poll
On Thu, Aug 09, 2018 at 01:48:42PM +0100, Chris Wilson wrote:
> Quoting Daniel Vetter (2018-08-09 13:45:44)
> > dma_fence_default_wait is the default now, same for the trivial
> > enable_signaling implementation.
> >
> > Also remove the ->signaled callback, vgem can't peek ahead with a
> > fastpat
On Thu, Aug 16, 2018 at 07:01:36PM +0100, Chris Wilson wrote:
> Loading the sounds modules is asynchronous with the sysfs device
> hierarchy being instantiated sometime after modprobe returns. As such
> while we are probing for the sound device, poll a few times to
> accommodate the async discovery
On Fri, 27 Jul 2018, Lucas De Marchi wrote:
> The definition on i915_reg.h is going to change to depend on
> dev_priv->gpio_mmio_base being properly initialized. Define our own
> macros since init_generic_mmio_info() is called before than
> gpio_mmio_base being set.
>
> Cc: intel-gvt-...@lists.fre
Since we no longer maintain our read position in the CSB pointers
register, it always returns 0 and not where we last read up to. As a
result the CSB probing in the state dumper starts from 0, either missing
entries or showing stale one.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers
== Series Details ==
Series: drm/i915: Keep physical cursors pinned while in use
URL : https://patchwork.freedesktop.org/series/48379/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4684 -> Patchwork_9966 =
== Summary - SUCCESS ==
No regressions found.
External URL:
h
== Series Details ==
Series: drm/i915: Keep physical cursors pinned while in use
URL : https://patchwork.freedesktop.org/series/48379/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
df341afb28f5 drm/i915: Keep physical cursors pinned while in use
-:21: WARNING:COMMIT_LOG_LONG_LI
The optimisation inherent in commit 6a2c4232ece1 ("drm/i915: Make the
physical object coherent with GTT") relies on that once we allocated a
cursor we would have coherent, zero overhead access to the scanout plane
holding the cursor. That is we could then do the very frequent cursor
updates X enjoy
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