HI,
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
> Stephen Rothwell
> Sent: tiistai 8. toukokuuta 2018 4.41
> To: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for linux-next: build failure
> after
>
On Sat, May 05, 2018 at 11:55:49AM +0100, Chris Wilson wrote:
> When waiting for a single fence beneath a syncobj, forgo our open coding
> for waiting over multiple fences and call the driver specific
> dma_fence_wait_timeout(). This gives the opportunity for the driver to
> handle it more efficien
== Series Details ==
Series: Enable NV12 support (rev6)
URL : https://patchwork.freedesktop.org/series/41674/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4152_full -> Patchwork_8932_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_8932_full ne
>> I'm pretty sure Dmitry wants dynamic configurations.
Yes, I afraid we really need dynamic slice configurations for media.
From: Landwerlin, Lionel G
Sent: Friday, May 4, 2018 9:25 AM
To: Tvrtko Ursulin ;
intel-gfx@lists.freedesktop.org; Rogozhkin, Dmitry V
Subject: Re: [Intel-gfx] [PATCH 8/
== Series Details ==
Series: Enable NV12 support (rev6)
URL : https://patchwork.freedesktop.org/series/41674/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4152 -> Patchwork_8932 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesk
From: Chandra Konduru
This patch adds NV12 to list of supported formats for sprite plane.
v2: Rebased (me)
v3: Review comments by Ville addressed
- Removed skl_plane_formats_with_nv12 and added
NV12 case in existing skl_plane_formats
- Added the 10bpc RGB formats
v4: Addressed review comments
From: Chandra Konduru
This patch adds NV12 to list of supported formats for
primary plane
v2: Rebased (Chandra Konduru)
v3: Rebased (me)
v4: Review comments by Ville addressed
Removed the skl_primary_formats_with_nv12 and
added NV12 case in existing skl_primary_formats
v5: Rebased (me)
v6: M
Enabling NV12 support:
- Framebuffer creation
- Primary and Sprite plane support
Patch series depend on Enable display workaround 827 patch
mentioned below submitted by Maarten
Removed BXT support for NV12 due to WA826
Changes from prev version:
Made change to skl_check_nv12_surface as required by
> -Original Message-
> From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com]
> Sent: Monday, May 7, 2018 2:56 PM
> To: Srinivas, Vidya ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [PATCH v7 3/6] drm/i915: Add skl_check_nv12_surface for NV12
>
> Op 10-05-18 om 10:31 s
From: "Srinivas, Vidya"
Possible hang with NV12 plane surface formats.
WA: When the plane source pixel format is NV12,
the CHICKEN_PIPESL_* register bit 22 must be set to 1
and the render decompression must not be enabled
on any of the planes in that pipe.
v2: removed unnecessary POSTING_READ
v
From: Maarten Lankhorst
We skip src trunction/adjustments for
NV12 case and handle the sizes directly.
Without this, pipe fifo underruns are seen on APL/KBL.
v2: For NV12, making the src coordinates multiplier of 4
v3: Moving all the src coords handling code for NV12
to skl_check_nv12_surface
From: Maarten Lankhorst
The workaround was applied only to the primary plane, but is required
on all planes. Iterate over all planes in the crtc atomic check to see
if the workaround is enabled, and only perform the actual toggling in
the pre/post plane update functions.
Changes since v1:
- Trac
From: Chandra Konduru
This patch adds NV12 as supported format
to intel_framebuffer_init and performs various checks.
v2:
-Fix an issue in checks added (Chandra Konduru)
v3: rebased (me)
v4: Review comments by Ville addressed
Added platform check for NV12 in intel_framebuffer_init
Removed offs
== Series Details ==
Series: series starting with [1/2] drm/i915/execlists: Drop unused parameter to
lookup_priolist()
URL : https://patchwork.freedesktop.org/series/42836/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4152_full -> Patchwork_8930_full =
== Summary - SUCCES
Hi all,
On Tue, 08 May 2018 01:36:25 - Patchwork
wrote:
>
> == Series Details ==
>
> Series: linux-next: build failure after merge of the drm-intel tree
> URL : https://patchwork.freedesktop.org/series/42839/
> State : failure
Blah, blah :-)
Can someone please arrange for my linux-next
== Series Details ==
Series: linux-next: build failure after merge of the drm-intel tree
URL : https://patchwork.freedesktop.org/series/42839/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4152 -> Patchwork_8931 =
== Summary - FAILURE ==
Serious unknown changes coming wi
== Series Details ==
Series: linux-next: build failure after merge of the drm-intel tree
URL : https://patchwork.freedesktop.org/series/42839/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3c1454cc91d5 linux-next: build failure after merge of the drm-intel tree
-:25: ERROR:GIT_
Hi all,
After merging the drm-intel tree, today's linux-next build (x86_64
allmodconfig) failed like this:
drivers/gpu/drm/xen/xen_drm_front.c: In function 'xen_drv_probe':
drivers/gpu/drm/xen/xen_drm_front.c:740:10: error: 'struct bus_type' has no
member named 'force_dma'
dev->bus->force_dma
== Series Details ==
Series: drm/i915: configure the transcoder clocks before touching pipeconf on
HSW+ (rev2)
URL : https://patchwork.freedesktop.org/series/42436/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4151_full -> Patchwork_8929_full =
== Summary - FAILURE ==
== Series Details ==
Series: series starting with [1/2] drm/i915/execlists: Drop unused parameter to
lookup_priolist()
URL : https://patchwork.freedesktop.org/series/42836/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4152 -> Patchwork_8930 =
== Summary - SUCCESS ==
No
== Series Details ==
Series: series starting with [1/2] drm/i915/execlists: Drop unused parameter to
lookup_priolist()
URL : https://patchwork.freedesktop.org/series/42836/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
fbc6c33847ee drm/i915/execlists: Drop unused parameter to
When rescheduling a change of dependencies, they all need to be added to
the same priolist (at least the ones on the same engine!). Since we
likely want to move a batch of requests, keep the priolist around.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_lrc.c | 11 ---
1 fil
lookup_priolist() no longer attaches the request into the priolist, it
just returns the priolist for the given priority instead. Drop the
unused parameter.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_lrc.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a
== Series Details ==
Series: drm/i915: configure the transcoder clocks before touching pipeconf on
HSW+ (rev2)
URL : https://patchwork.freedesktop.org/series/42436/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4151 -> Patchwork_8929 =
== Summary - SUCCESS ==
No regress
On 4/23/2018 2:52 AM, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Incomplete requests (no notify, no context complete) have to be corrected
by looking at the engine timeline, and not the sorted-by-start-time view
as was previously used.
Per-engine timelines are generated on demand and cached fo
Quoting Mika Kuoppala (2018-05-07 17:52:18)
> We use a pattern of wmb() along with ggtt_invalidate.
> Move the wmb out from call sites into the ggtt_invalidate
> as it is part of invalidation.
>
> Cc: Chris Wilson
> Cc: Matthew Auld
> Signed-off-by: Mika Kuoppala
If we take this and the last w
On Sun, May 06, 2018 at 07:31:47PM +0100, Chris Wilson wrote:
> Unsafe module parameters are just that, unsafe. If the user is foolish
> enough to try them and the kernel breaks, they get to keep both pieces.
> Don't ask them to file a bug report if they broke it themselves.
>
> References: https:
Quoting Mika Kuoppala (2018-05-07 17:52:21)
> We could be using write combining map through which we insert
> our ptes. Make sure to flush the write combining buffer
> after the writes.
"Could?" We do flush the ppgtt before execution, and the ppgtt is only
used by execution.
-Chris
___
Quoting Mika Kuoppala (2018-05-07 17:52:20)
> gen6_alloc_va_range is only used to init the aliasing ppgtt, so
> we can be certain that it will be dirty every time. No need
> to track it.
Nah, we want it for full-ppgtt...
-Chris
___
Intel-gfx mailing list
Quoting Mika Kuoppala (2018-05-07 17:52:19)
> It is a common pattern to mark the tlbs dirty along with flushing
> the writes. Introduce gen6_ppgtt_invalidate for this.
It wasn't that common at all. We were careful not to do more wmb() than
required before; not so now.
-Chris
__
== Series Details ==
Series: series starting with [1/5] drm/i915/gtt: Move wmb inside ggtt_invalidate
URL : https://patchwork.freedesktop.org/series/42821/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4151_full -> Patchwork_8928_full =
== Summary - WARNING ==
Minor unkn
On Fri, Apr 27, 2018 at 04:14:36PM -0700, Paulo Zanoni wrote:
> This commit introduces the definitions for the ICL clocks and adds the
> basic functions to the shared DPLL framework. It adds code for the
> Enable and Disable sequences for some PLLs, but it does not have the
> code to compute the ac
== Series Details ==
Series: series starting with [v2,1/7] drm/i915: Flush submission tasklet after
bumping priority
URL : https://patchwork.freedesktop.org/series/42815/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4151_full -> Patchwork_8927_full =
== Summary - SUCCESS
== Series Details ==
Series: series starting with [1/5] drm/i915/gtt: Move wmb inside ggtt_invalidate
URL : https://patchwork.freedesktop.org/series/42821/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4151 -> Patchwork_8928 =
== Summary - SUCCESS ==
No regressions found
== Series Details ==
Series: series starting with [1/5] drm/i915/gtt: Move wmb inside ggtt_invalidate
URL : https://patchwork.freedesktop.org/series/42821/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/gtt: Move wmb inside ggtt_invalidate
Okay!
Commit: drm/i915/gt
== Series Details ==
Series: series starting with [1/5] drm/i915/gtt: Move wmb inside ggtt_invalidate
URL : https://patchwork.freedesktop.org/series/42821/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
09ef7cafacef drm/i915/gtt: Move wmb inside ggtt_invalidate
778f0e880a15 drm/
It is a common pattern to mark the tlbs dirty along with flushing
the writes. Introduce gen6_ppgtt_invalidate for this.
Cc: Chris Wilson
Cc: Matthew Auld
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 35 +++
1 file changed, 19 insertions
We use a pattern of wmb() along with ggtt_invalidate.
Move the wmb out from call sites into the ggtt_invalidate
as it is part of invalidation.
Cc: Chris Wilson
Cc: Matthew Auld
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 6 +++---
1 file changed, 3 insertions(+), 3 d
gen6_alloc_va_range is only used to init the aliasing ppgtt, so
we can be certain that it will be dirty every time. No need
to track it.
Cc: Chris Wilson
Cc: Matthew Auld
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 5 +
1 file changed, 1 insertion(+), 4 deletions
We could be using write combining map through which we insert
our ptes. Make sure to flush the write combining buffer
after the writes.
Cc: Chris Wilson
Cc: Matthew Auld
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 6 ++
1 file changed, 6 insertions(+)
diff --git
Not all architectures guarantee that uncached read will
flush the write combining buffer. So marking it explicitly
is recommended [1].
However we know the architecture we are operating on
and can avoid wmb as the UC store will flush the wcb [2].
Omit the wmb() on gen6_ppgtt_invalidate as redundan
== Series Details ==
Series: series starting with [v2,1/7] drm/i915: Flush submission tasklet after
bumping priority
URL : https://patchwork.freedesktop.org/series/42815/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4151 -> Patchwork_8927 =
== Summary - SUCCESS ==
No r
== Series Details ==
Series: series starting with [v2,1/7] drm/i915: Flush submission tasklet after
bumping priority
URL : https://patchwork.freedesktop.org/series/42815/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: Flush submission tasklet after bumping priorit
== Series Details ==
Series: series starting with [v2,1/7] drm/i915: Flush submission tasklet after
bumping priority
URL : https://patchwork.freedesktop.org/series/42815/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8cef3a53edbb drm/i915: Flush submission tasklet after bumpin
On Mon, May 07, 2018 at 05:09:21PM +0200, Daniel Vetter wrote:
> On Mon, May 07, 2018 at 02:33:25PM +0100, Chris Wilson wrote:
> > Quoting Feng Tang (2018-05-07 22:26:34)
> > > Hi Chris,
> > >
> > > Thanks for the prompt review!
> > >
> > > On Mon, May 07, 2018 at 11:40:45AM +0100, Chris Wilson w
== Series Details ==
Series: Enabling content-type setting for HDMI displays. (rev8)
URL : https://patchwork.freedesktop.org/series/41876/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4150_full -> Patchwork_8926_full =
== Summary - WARNING ==
Minor unknown changes comin
On Mon, May 07, 2018 at 02:33:25PM +0100, Chris Wilson wrote:
> Quoting Feng Tang (2018-05-07 22:26:34)
> > Hi Chris,
> >
> > Thanks for the prompt review!
> >
> > On Mon, May 07, 2018 at 11:40:45AM +0100, Chris Wilson wrote:
> > > Quoting Feng Tang (2018-05-07 11:36:09)
> > > > To fulfil the Del
On Tue, Apr 17, 2018 at 02:31:47PM +0300, Imre Deak wrote:
> Add documentation to gen9_set_dc_state() on what enabling a given DC
> state means and at what point HW/DMC actually enters/exits these states.
>
> Cc: Jani Nikula
> Cc: Daniel Vetter
> Signed-off-by: Imre Deak
Pushed to -dinq, thank
/0day-ci/linux/commits/Chris-Wilson/drm-i915-Speed-up-idle-detection-by-kicking-the-tasklets/20180507-184057
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-x0-05071422 (attached as .config)
compiler: gcc-5 (Debian 5.5.0-3) 5.4.1 20171010
reproduce:
# save
On Mon, May 07, 2018 at 04:16:40PM +0300, StanLis wrote:
> From: Stanislav Lisovskiy
>
> Added content_type property to drm_connector_state
> in order to properly handle external HDMI TV content-type setting.
>
> v2:
> * Moved helper function which attaches content type property
>to the drm
Prepare to allow the GuC submission to be run from underneath a
hardirq timer context (and not just the current softirq context) as is
required for fast preemption resets and context switches.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_guc_submission.c | 34 +++--
We rely on ksoftirqd to run in a timely fashion in order to drain the
execlists queue. Quite frequently, it does not. In some cases we may see
latencies of over 200ms triggering our idle timeouts and forcing us to
declare the driver wedged!
Thus we can speed up idle detection by bypassing ksoftirq
Bypass using the tasklet to submit the first request to HW, as the
tasklet may be deferred unto ksoftirqd and at a minimum will add in
excess of 10us (and maybe tens of milliseconds) to our execution
latency. This latency reduction is most notable when execution flows
between engines.
v2: Beware h
During request submission, we call the engine->schedule() function so
that we may reorder the active requests as required for inheriting the
new request's priority. This may schedule several tasklets to run on the
local CPU, but we will need to schedule the tasklets again for the new
request. Delay
Prepare to allow the execlists submission to be run from underneath a
hardirq timer context (and not just the current softirq context) as is
required for fast preemption resets and context switches.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_lrc.c | 42 ++-
Continuing the themem of bypassing ksoftirqd latency, also first try to
directly submit from the CS interrupt handler to clear the ELSP and
queue the next.
In the past, we have been hesitant to do this as the context switch
processing has been quite heavy, requiring forcewaked mmio. However, as
we
When called from process context tasklet_schedule() defers itself to
ksoftirqd. From experience this may cause unacceptable latencies of over
200ms in executing the submission tasklet, our goal is to reprioritise
the HW execution queue and trigger HW preemption immediately, so disable
bh over the c
== Series Details ==
Series: Enabling content-type setting for HDMI displays. (rev8)
URL : https://patchwork.freedesktop.org/series/41876/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4150 -> Patchwork_8926 =
== Summary - SUCCESS ==
No regressions found.
External URL
== Series Details ==
Series: Enabling content-type setting for HDMI displays. (rev8)
URL : https://patchwork.freedesktop.org/series/41876/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
fbbcc8d1f453 drm: content-type property for HDMI connector
-:129: CHECK:LINE_SPACING: Please
On Fri, May 04, 2018 at 11:19:45PM +0300, Ville Syrjälä wrote:
> On Thu, May 03, 2018 at 08:26:26AM +0200, Daniel Vetter wrote:
> > On Wed, May 02, 2018 at 12:20:20PM +0530, Nautiyal, Ankit K wrote:
> > > From: Ankit Nautiyal
> > >
> > > We parse the EDID and add all the modes in the connector's
Quoting Feng Tang (2018-05-07 22:26:34)
> Hi Chris,
>
> Thanks for the prompt review!
>
> On Mon, May 07, 2018 at 11:40:45AM +0100, Chris Wilson wrote:
> > Quoting Feng Tang (2018-05-07 11:36:09)
> > > To fulfil the Dell 4K monitor, the dpcd max retries has been bumped
> > > from 7 to 32, which m
Hi Chris,
Thanks for the prompt review!
On Mon, May 07, 2018 at 11:40:45AM +0100, Chris Wilson wrote:
> Quoting Feng Tang (2018-05-07 11:36:09)
> > To fulfil the Dell 4K monitor, the dpcd max retries has been bumped
> > from 7 to 32, which may hurt the boot/init time for some platforms,
> > as th
From: Stanislav Lisovskiy
Added encoding of drm content_type property from drm_connector_state
within AVI infoframe in order to properly handle external HDMI TV
content-type setting.
This requires also manipulationg ITC bit, as stated in
HDMI spec.
v2:
* Moved helper function which attaches co
From: Stanislav Lisovskiy
Added content_type property to drm_connector_state
in order to properly handle external HDMI TV content-type setting.
v2:
* Moved helper function which attaches content type property
to the drm core, as was suggested.
Removed redundant connector state initializat
From: Stanislav Lisovskiy
Added content type setting property to drm_connector(part 1)
and enabled transmitting it with HDMI AVI infoframes
for i915(part 2).
Stanislav Lisovskiy (2):
drm: content-type property for HDMI connector
i915: content-type property for HDMI connector
Documentation/
On 5/7/2018 5:58 PM, Ville Syrjälä wrote:
On Mon, May 07, 2018 at 10:34:53AM +0530, Nautiyal, Ankit K wrote:
On 5/5/2018 1:49 AM, Ville Syrjälä wrote:
On Thu, May 03, 2018 at 08:26:26AM +0200, Daniel Vetter wrote:
On Wed, May 02, 2018 at 12:20:20PM +0530, Nautiyal, Ankit K wrote:
From: Ank
On Mon, May 07, 2018 at 10:34:53AM +0530, Nautiyal, Ankit K wrote:
>
>
> On 5/5/2018 1:49 AM, Ville Syrjälä wrote:
> > On Thu, May 03, 2018 at 08:26:26AM +0200, Daniel Vetter wrote:
> >> On Wed, May 02, 2018 at 12:20:20PM +0530, Nautiyal, Ankit K wrote:
> >>> From: Ankit Nautiyal
> >>>
> >>> We
Quoting Mika Kuoppala (2018-05-07 13:09:20)
> Chris Wilson writes:
>
> > Around request submission, we protect the call to schedule with a
> > premption disable loop to prevent set-wedge chaning function pointers
>
> s/premption/preemption
> s/chaning/changing
>
> Also RCU read critical section
Chris Wilson writes:
> Around request submission, we protect the call to schedule with a
> premption disable loop to prevent set-wedge chaning function pointers
s/premption/preemption
s/chaning/changing
Also RCU read critical sections can be preempted if CONFIG_PREEMPT_RCU
so it looks like we s
Quoting Mika Kuoppala (2018-05-07 12:15:58)
> Chris Wilson writes:
>
> > When called from process context tasklet_schedule() defers itself to
> > ksoftirqd. From experience this may cause unacceptable latencies of over
> > 200ms in executing the submission tasklet, our goal is to reprioritise
> >
Chris Wilson writes:
> When called from process context tasklet_schedule() defers itself to
> ksoftirqd. From experience this may cause unacceptable latencies of over
> 200ms in executing the submission tasklet, our goal is to reprioritise
> the HW execution queue and trigger preemption immediate
== Series Details ==
Series: drm/dp: add module parameter for the dpcd access max retries
URL : https://patchwork.freedesktop.org/series/42803/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4150 -> Patchwork_8925 =
== Summary - FAILURE ==
Serious unknown changes coming w
Quoting Feng Tang (2018-05-07 11:36:09)
> To fulfil the Dell 4K monitor, the dpcd max retries has been bumped
> from 7 to 32, which may hurt the boot/init time for some platforms,
> as the 32 retries may take hundreds of ms.
If we need that many retries, so be it. No modparam, the driver just has
To fulfil the Dell 4K monitor, the dpcd max retries has been bumped
from 7 to 32, which may hurt the boot/init time for some platforms,
as the 32 retries may take hundreds of ms.
This patch makes no functional change, but make the max retries
adjustable, so that concerned users/platforms can have
== Series Details ==
Series: series starting with [1/7] drm/i915: Flush submission tasklet after
bumping priority (rev2)
URL : https://patchwork.freedesktop.org/series/42800/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4150 -> Patchwork_8924 =
== Summary - FAILURE ==
== Series Details ==
Series: series starting with [1/7] drm/i915: Flush submission tasklet after
bumping priority (rev2)
URL : https://patchwork.freedesktop.org/series/42800/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: Flush submission tasklet after bumping pri
== Series Details ==
Series: series starting with [1/7] drm/i915: Flush submission tasklet after
bumping priority (rev2)
URL : https://patchwork.freedesktop.org/series/42800/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a337a1138169 drm/i915: Flush submission tasklet after bu
== Series Details ==
Series: Enable NV12 support (rev5)
URL : https://patchwork.freedesktop.org/series/41674/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4150_full -> Patchwork_8922_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_8922_full ne
== Series Details ==
Series: series starting with [1/7] drm/i915: Flush submission tasklet after
bumping priority
URL : https://patchwork.freedesktop.org/series/42800/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4150 -> Patchwork_8923 =
== Summary - FAILURE ==
Serious
Op 04-05-18 om 16:10 schreef Daniel Vetter:
> Many drivers have a trivial implementation for ->enable_signaling.
> Let's make it optional by assuming that signalling is already
> available when the callback isn't present.
>
> v2: Don't do the trick to set the ENABLE_SIGNAL_BIT
> unconditionally, it
We rely on ksoftirqd to run in a timely fashion in order to drain the
execlists queue. Quite frequently, it does not. In some cases we may see
latencies of over 200ms triggering our idle timeouts and forcing us to
declare the driver wedged!
Thus we can speed up idle detection by bypassing ksoftirq
== Series Details ==
Series: series starting with [1/7] drm/i915: Flush submission tasklet after
bumping priority
URL : https://patchwork.freedesktop.org/series/42800/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: Flush submission tasklet after bumping priority
O
== Series Details ==
Series: series starting with [1/7] drm/i915: Flush submission tasklet after
bumping priority
URL : https://patchwork.freedesktop.org/series/42800/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
003f117f2171 drm/i915: Flush submission tasklet after bumping p
Op 10-05-18 om 10:31 schreef Vidya Srinivas:
> From: Maarten Lankhorst
>
> We skip src trunction/adjustments for
> NV12 case and handle the sizes directly.
> Without this, pipe fifo underruns are seen on APL/KBL.
>
> v2: For NV12, making the src coordinates multiplier of 4
>
> v3: Moving all the s
Around request submission, we protect the call to schedule with a
premption disable loop to prevent set-wedge chaning function pointers
underneath us. This also prevents the tasklet running on the local CPU,
a trick we use immediately afterwards to forcibly execute the tasklet
after submission. We
Prepare to allow the execlists submission to be run from underneath a
hardirq timer context (and not just the current softirq context) as is
required for fast preemption resets and context switches.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_lrc.c | 25 +++--
Continuing the themem of bypassing ksoftirqd latency, also first try to
directly submit from the CS interrupt handler to clear the ELSP and
queue the next.
In the past, we have been hesitant to do this as the context switch
processing has been quite heavy, requiring forcewaked mmio. However, as
we
We rely on ksoftirqd to run in a timely fashion in order to drain the
execlists queue. Quite frequently, it does not. In some cases we may see
latencies of over 200ms triggering our idle timeouts and forcing us to
declare the driver wedged!
Thus we can speed up idle detection by bypassing ksoftirq
Bypass using the tasklet to submit the first request to HW, as the
tasklet may be deferred unto ksoftirqd and at a minimum will add in
excess of 10us (and maybe tens of milliseconds) to our execution
latency. This latency reduction is most notable when execution flows
between engines.
Suggested-by
When called from process context tasklet_schedule() defers itself to
ksoftirqd. From experience this may cause unacceptable latencies of over
200ms in executing the submission tasklet, our goal is to reprioritise
the HW execution queue and trigger preemption immediately, so convert
the rcu protecti
Prepare to allow the GuC submission to be run from underneath a
hardirq timer context (and not just the current softirq context) as is
required for fast preemption resets and context switches.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_guc_submission.c | 30 ++---
== Series Details ==
Series: Enable NV12 support (rev5)
URL : https://patchwork.freedesktop.org/series/41674/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4150 -> Patchwork_8922 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork.freedesk
Quoting Mika Kuoppala (2018-05-07 09:54:27)
> Chris Wilson writes:
>
> > Quoting Mika Kuoppala (2018-05-07 09:34:24)
> >> Chris Wilson writes:
> >>
> >> > We rely on ksoftirqd to run in a timely fashion in order to drain the
> >> > execlists queue. Quite frequently, it does not. In some cases w
Chris Wilson writes:
> Quoting Mika Kuoppala (2018-05-07 09:34:24)
>> Chris Wilson writes:
>>
>> > We rely on ksoftirqd to run in a timely fashion in order to drain the
>> > execlists queue. Quite frequently, it does not. In some cases we may see
>> > latencies of over 200ms triggering our idle
Ingo, do you prefer to merge through our tree with your ack?
Quoting Paulo Zanoni (2018-05-04 23:32:51)
> ICL changes the registers and addresses to 64 bits.
>
> I also briefly looked at implementing an u64 version of the PCI config
> read functions, but I concluded this wouldn't be trivial, so i
== Series Details ==
Series: series starting with [1/3] drm/i915: Flush submission tasklet after
bumping priority (rev2)
URL : https://patchwork.freedesktop.org/series/42783/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4150_full -> Patchwork_8920_full =
== Summary - FAIL
> -Original Message-
> From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com]
> Sent: Monday, May 7, 2018 2:08 PM
> To: Srinivas, Vidya ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH v6 6/6] drm/i915: Add NV12 as supported
> format for sprite plane
>
Op 07-05-18 om 10:34 schreef Srinivas, Vidya:
>
>> -Original Message-
>> From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com]
>> Sent: Monday, May 7, 2018 1:59 PM
>> To: Srinivas, Vidya ; intel-
>> g...@lists.freedesktop.org
>> Subject: Re: [Intel-gfx] [PATCH v6 6/6] drm/i915:
Quoting Mika Kuoppala (2018-05-07 09:34:24)
> Chris Wilson writes:
>
> > We rely on ksoftirqd to run in a timely fashion in order to drain the
> > execlists queue. Quite frequently, it does not. In some cases we may see
> > latencies of over 200ms triggering our idle timeouts and forcing us to
>
Chris Wilson writes:
> We rely on ksoftirqd to run in a timely fashion in order to drain the
> execlists queue. Quite frequently, it does not. In some cases we may see
> latencies of over 200ms triggering our idle timeouts and forcing us to
> declare the driver wedged!
>
> Thus we can speed up id
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