Re: [Intel-gfx] [PATCH v3 4/6] drm/i915: add rcs topology to error state

2018-01-12 Thread Lionel Landwerlin
On 12/01/18 18:22, Michal Wajdeczko wrote: On Fri, 12 Jan 2018 17:00:34 +0100, Lionel Landwerlin wrote: This might be useful information for developers looking at an error state. v2: Place topology towards the end of the error state (Chris) Signed-off-by: Lionel Landwerlin ---  drivers/gpu

Re: [Intel-gfx] [PATCH 3/3] drm/i915/psr: Avoid initializing PSR if there is no sink support.

2018-01-12 Thread Rodrigo Vivi
On Fri, Jan 12, 2018 at 11:33:08PM +, Rodrigo Vivi wrote: > On Wed, Jan 03, 2018 at 09:38:24PM +, Dhinakaran Pandiyan wrote: > > DPCD read for the eDP is complete by the time intel_psr_init() is > > called, which means we can avoid initializing PSR structures and state > > if there is no si

Re: [Intel-gfx] [PATCH 3/3] drm/i915/psr: Avoid initializing PSR if there is no sink support.

2018-01-12 Thread Rodrigo Vivi
On Wed, Jan 03, 2018 at 09:38:24PM +, Dhinakaran Pandiyan wrote: > DPCD read for the eDP is complete by the time intel_psr_init() is > called, which means we can avoid initializing PSR structures and state > if there is no sink support. > > Cc: Rodrigo Vivi > Cc: Ville Syrjälä > Signed-off-b

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/5] drm/vblank: Fix return type for drm_vblank_count()

2018-01-12 Thread Patchwork
== Series Details == Series: series starting with [1/5] drm/vblank: Fix return type for drm_vblank_count() URL : https://patchwork.freedesktop.org/series/36435/ State : failure == Summary == Test gem_caching: Subgroup writes: pass -> INCOMPLETE (shard-snb) Test k

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/vblank: Fix return type for drm_vblank_count()

2018-01-12 Thread Patchwork
== Series Details == Series: series starting with [1/5] drm/vblank: Fix return type for drm_vblank_count() URL : https://patchwork.freedesktop.org/series/36435/ State : success == Summary == Series 36435v1 series starting with [1/5] drm/vblank: Fix return type for drm_vblank_count() https://

[Intel-gfx] [PATCH 2/5] drm/vblank: Fix data type width for drm_crtc_arm_vblank_event()

2018-01-12 Thread Dhinakaran Pandiyan
Now that drm_vblank_count() returns all bits of the vblank count, update drm_crtc_arm_vblank_event() so that it queues the correct sequence. Otherwise, this leads to prolonged waits for a vblank sequence when the current count is >=2^32. Cc: Keith Packard Cc: Michel Dänzer Cc: Daniel Vetter Sig

[Intel-gfx] [PATCH 5/5] drm/i915: Estimate and update missed vblanks.

2018-01-12 Thread Dhinakaran Pandiyan
The frame counter may have got reset between disabling and enabling vblank interrupts due to DMC putting the hardware to DC5/6 state if PSR was active. The frame counter also could have stalled if PSR is active in cases where there is no DMC. The frame counter resetting as a user visible impact of

[Intel-gfx] [PATCH 1/5] drm/vblank: Fix return type for drm_vblank_count()

2018-01-12 Thread Dhinakaran Pandiyan
drm_vblank_count() has a u32 type returning what is a 64-bit vblank count. The effect of this is when drm_wait_vblank_ioctl() tries to widen the user space requested vblank sequence using this clipped 32-bit count(when the value is >= 2^32) as reference, the requested sequence remains a 32-bit valu

[Intel-gfx] [PATCH 4/5] drm/vblank: Restoring vblank counts after device PM events.

2018-01-12 Thread Dhinakaran Pandiyan
The HW frame counter can get reset if device enters a low power state after vblank interrupts were disabled. This messes up any following vblank count update as a negative diff (huge unsigned diff) is calculated from the HW frame counter change. We cannot ignore negative diffs altogther as there co

[Intel-gfx] [PATCH 3/5] drm/vblank: Do not update vblank count if interrupts are already disabled.

2018-01-12 Thread Dhinakaran Pandiyan
Updating vblank counts requires register reads and these reads may not return meaningful values if the device was in a low power state after vblank interrupts were last disabled. So, update the count only if vblank interrupts are enabled. Secondly, this means the registers should be read before dis

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915: Convert intel_hpd_irq_event() into an encoder hotplug hook

2018-01-12 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915: Convert intel_hpd_irq_event() into an encoder hotplug hook URL : https://patchwork.freedesktop.org/series/36431/ State : failure == Summary == Series 36431v1 series starting with [1/3] drm/i915: Convert intel_hpd_irq_event() i

[Intel-gfx] [PATCH 3/3] drm/i915: Move SST DP link retraining into the ->post_hotplug() hook

2018-01-12 Thread Ville Syrjala
From: Ville Syrjälä Doing link retraining from the short pulse handler is problematic since that might introduce deadlocks with MST sideband processing. Currently we don't retrain MST links from this code, but we want to change that. So better to move the entire thing to the hotplug work. We can

[Intel-gfx] [PATCH 1/3] drm/i915: Convert intel_hpd_irq_event() into an encoder hotplug hook

2018-01-12 Thread Ville Syrjala
From: Ville Syrjälä Allow encoders to customize their hotplug processing by moving the intel_hpd_irq_event() code into an encoder hotplug vfunc. Currently only SDVO needs this to re-enable hotplug signalling in the SDVO chip. We'll use this same hook for DP/HDMI link management later. Signed-off

[Intel-gfx] [PATCH 2/3] drm/i915: Reinitialize sink scrambling/TMDS clock ratio on HPD

2018-01-12 Thread Ville Syrjala
From: Ville Syrjälä The LG 4k TV I have doesn't deassert HPD when I turn the TV off, but when I turn it back on it will pulse the HPD line. By that time it has forgotten everything we told it about scrambling and the clock ratio. Hence if we want to get a picture out if it again we have to tell i

Re: [Intel-gfx] [PATCH v2] drm/i915: Use the engine name directly in the error_state file

2018-01-12 Thread Michel Thierry
On 1/9/2018 5:21 PM, Michel Thierry wrote: Instead of using local string names that we will have to keep maintaining, use the engine->name directly. v2: Better invalid engine_id handling, capture_bo will not be able know the engine_id and end up with -1 (Michal). Hi, Fi.CI.IGT didn't catch an

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/pmu: fix sizeof on attr, should be *attr

2018-01-12 Thread Patchwork
== Series Details == Series: drm/i915/pmu: fix sizeof on attr, should be *attr URL : https://patchwork.freedesktop.org/series/36423/ State : failure == Summary == Test gem_tiled_swapping: Subgroup non-threaded: incomplete -> PASS (shard-hsw) fdo#104218 +1 Test gem

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/pmu: fix noderef.cocci warnings

2018-01-12 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/pmu: fix noderef.cocci warnings URL : https://patchwork.freedesktop.org/series/36421/ State : success == Summary == Test perf: Subgroup polling: pass -> FAIL (shard-hsw) fdo#102252 Test kms_fro

Re: [Intel-gfx] [PATCH v3 4/6] drm/i915: add rcs topology to error state

2018-01-12 Thread Michal Wajdeczko
On Fri, 12 Jan 2018 17:00:34 +0100, Lionel Landwerlin wrote: This might be useful information for developers looking at an error state. v2: Place topology towards the end of the error state (Chris) Signed-off-by: Lionel Landwerlin --- drivers/gpu/drm/i915/i915_gpu_error.c | 40 +

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: expose RCS topology to userspace

2018-01-12 Thread Patchwork
== Series Details == Series: drm/i915: expose RCS topology to userspace URL : https://patchwork.freedesktop.org/series/36415/ State : warning == Summary == Test gem_tiled_swapping: Subgroup non-threaded: incomplete -> DMESG-WARN (shard-hsw) fdo#104218 +1 Test kms_frontb

Re: [Intel-gfx] [PATCH][next] drm/i915/pmu: fix sizeof on attr, should be *attr

2018-01-12 Thread Colin Ian King
On 12/01/18 17:48, Tvrtko Ursulin wrote: > > Hi, > > On 12/01/2018 17:36, Colin King wrote: >> From: Colin Ian King >> >> I believe the sizeof(attr) should be in fact sizeof(*attr), fortunately >> the current code works because sizeof(struct attribute **) is the same >> as sizeof(struct attribut

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: fix sizeof on attr, should be *attr

2018-01-12 Thread Patchwork
== Series Details == Series: drm/i915/pmu: fix sizeof on attr, should be *attr URL : https://patchwork.freedesktop.org/series/36423/ State : success == Summary == Series 36423v1 drm/i915/pmu: fix sizeof on attr, should be *attr https://patchwork.freedesktop.org/api/1.0/series/36423/revisions/1

Re: [Intel-gfx] [PATCH][next] drm/i915/pmu: fix sizeof on attr, should be *attr

2018-01-12 Thread Tvrtko Ursulin
Hi, On 12/01/2018 17:36, Colin King wrote: From: Colin Ian King I believe the sizeof(attr) should be in fact sizeof(*attr), fortunately the current code works because sizeof(struct attribute **) is the same as sizeof(struct attribute *) for x86. Thanks, kbuild also reported it and I just pu

Re: [Intel-gfx] [PATCH v2 1/6] drm/i915: store all subslice masks

2018-01-12 Thread Tvrtko Ursulin
On 12/01/2018 13:53, Lionel Landwerlin wrote: On 12/01/18 12:01, Tvrtko Ursulin wrote: On 12/01/2018 10:58, Lionel Landwerlin wrote: On 12/01/18 10:15, Tvrtko Ursulin wrote: [snip] +static inline int sseu_eu_idx(const struct sseu_dev_info *sseu, +  int slice, int subslic

[Intel-gfx] [PATCH][next] drm/i915/pmu: fix sizeof on attr, should be *attr

2018-01-12 Thread Colin King
From: Colin Ian King I believe the sizeof(attr) should be in fact sizeof(*attr), fortunately the current code works because sizeof(struct attribute **) is the same as sizeof(struct attribute *) for x86. Detected by CoverityScan, CID#1463854 ("Sizeof not portable") Fixes: 109ec558370f ("drm/i915

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/pmu: fix noderef.cocci warnings

2018-01-12 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/pmu: fix noderef.cocci warnings URL : https://patchwork.freedesktop.org/series/36421/ State : success == Summary == Series 36421v1 series starting with [1/2] drm/i915/pmu: fix noderef.cocci warnings https://patchwork.freedesktop

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] kms_plane: Remove redundant modeset after CRC capture

2018-01-12 Thread Patchwork
== Series Details == Series: series starting with [1/4] kms_plane: Remove redundant modeset after CRC capture URL : https://patchwork.freedesktop.org/series/36409/ State : success == Summary == Test gem_wait: Subgroup write-busy-bsd: skip -> PASS (shard-snb

[Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/2] drm/i915: Add display WA #1175 for planes ending close to right screen edge

2018-01-12 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Add display WA #1175 for planes ending close to right screen edge URL : https://patchwork.freedesktop.org/series/36408/ State : warning == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-dra

Re: [Intel-gfx] [PATCH 2/2] drm/i915/pmu: Use kcalloc instead of kzalloc

2018-01-12 Thread Ville Syrjälä
On Fri, Jan 12, 2018 at 05:03:40PM +, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin > > kcalloc is preffered for allocating arrays. > > Signed-off-by: Tvrtko Ursulin > Suggested-by: Ville Syrjälä > Cc: Ville Syrjälä Reviewed-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/i915_pmu.c | 6

[Intel-gfx] [PATCH 2/2] drm/i915/pmu: Use kcalloc instead of kzalloc

2018-01-12 Thread Tvrtko Ursulin
From: Tvrtko Ursulin kcalloc is preffered for allocating arrays. Signed-off-by: Tvrtko Ursulin Suggested-by: Ville Syrjälä Cc: Ville Syrjälä --- drivers/gpu/drm/i915/i915_pmu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers

[Intel-gfx] [PATCH 1/2] drm/i915/pmu: fix noderef.cocci warnings

2018-01-12 Thread Tvrtko Ursulin
From: Fengguang Wu drivers/gpu/drm/i915/i915_pmu.c:795:34-40: ERROR: application of sizeof to pointer sizeof when applied to a pointer typed expression gives the size of the pointer Generated by: scripts/coccinelle/misc/noderef.cocci Fixes: 109ec558370f ("drm/i915/pmu: Only enumerate availa

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: expose RCS topology to userspace

2018-01-12 Thread Patchwork
== Series Details == Series: drm/i915: expose RCS topology to userspace URL : https://patchwork.freedesktop.org/series/36415/ State : success == Summary == Series 36415v1 drm/i915: expose RCS topology to userspace https://patchwork.freedesktop.org/api/1.0/series/36415/revisions/1/mbox/ Test d

Re: [Intel-gfx] 282dbf9b "drm/i915: Pass intel_plane and intel_crtc to plane hooks" breaks i945GM in 4.13 and above

2018-01-12 Thread Ville Syrjälä
On Fri, Jan 12, 2018 at 11:50:06AM +0200, Jani Nikula wrote: > On Thu, 11 Jan 2018, Karl-Johan Karlsson > wrote: > > Hello, > > > > I have an old Lenovo Thinkpad X60 laptop with a Core 2 Duo T7200 CPU and > > i945GM integrated graphics whose graphics broke when I tried to update the > > kernel

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/1] tools/intel_guc_logger: Send GuC log level in new i915 expected format

2018-01-12 Thread Patchwork
== Series Details == Series: series starting with [v2,1/1] tools/intel_guc_logger: Send GuC log level in new i915 expected format URL : https://patchwork.freedesktop.org/series/36404/ State : failure == Summary == Test kms_flip: Subgroup vblank-vs-modeset-suspend: pass

[Intel-gfx] [PATCH v3 6/6] drm/i915: expose rcs topology through query uAPI

2018-01-12 Thread Lionel Landwerlin
With the introduction of asymmetric slices in CNL, we cannot rely on the previous SUBSLICE_MASK getparam to tell userspace what subslices are available. Here we introduce a more detailed way of querying the Gen's GPU topology that doesn't aggregate numbers. This is essential for monitoring parts o

[Intel-gfx] [PATCH v3 3/6] drm/i915/debugfs: add rcs topology entry

2018-01-12 Thread Lionel Landwerlin
While the end goal is to make this information available to userspace through a new ioctl, there is no reason we can't display it in a human readable fashion through debugfs. slice0: 3 subslice(s) (0x7): subslice0: 8 EUs (0xff) subslice1: 8 EUs (0xff) subslice2: 8 EUs (0xff

[Intel-gfx] [PATCH v3 2/6] drm/i915/debugfs: reuse max slice/subslices already stored in sseu

2018-01-12 Thread Lionel Landwerlin
Now that we have that information in topology fields, let's just reused it. v2: Style tweaks (Tvrtko) Signed-off-by: Lionel Landwerlin Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_debugfs.c | 27 +++ 1 file changed, 11 insertions(+), 16 deletions(-) diff -

[Intel-gfx] [PATCH v3 5/6] drm/i915: add query uAPI

2018-01-12 Thread Lionel Landwerlin
There are a number of information that are readable from hardware registers and that we would like to make accessible to userspace. One particular example is the topology of the execution units (how are execution units grouped in subslices and slices and also which ones have been fused off for die

[Intel-gfx] [PATCH v3 4/6] drm/i915: add rcs topology to error state

2018-01-12 Thread Lionel Landwerlin
This might be useful information for developers looking at an error state. v2: Place topology towards the end of the error state (Chris) Signed-off-by: Lionel Landwerlin --- drivers/gpu/drm/i915/i915_gpu_error.c | 40 +++ 1 file changed, 40 insertions(+) diff --

[Intel-gfx] [PATCH v3 1/6] drm/i915: store all subslice masks

2018-01-12 Thread Lionel Landwerlin
Up to now, subslice mask was assumed to be uniform across slices. But starting with Cannonlake, slices can be asymmetric (for example slice0 has different number of subslices as slice1+). This change stores all subslices masks for all slices rather than having a single mask that applies to all slic

[Intel-gfx] [PATCH v3 0/6] drm/i915: expose RCS topology to userspace

2018-01-12 Thread Lionel Landwerlin
Hi all, Another update, mostly style. Cheers, Lionel Landwerlin (6): drm/i915: store all subslice masks drm/i915/debugfs: reuse max slice/subslices already stored in sseu drm/i915/debugfs: add rcs topology entry drm/i915: add rcs topology to error state drm/i915: add query uAPI drm/i

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] kms_plane: Remove redundant modeset after CRC capture

2018-01-12 Thread Patchwork
== Series Details == Series: series starting with [1/4] kms_plane: Remove redundant modeset after CRC capture URL : https://patchwork.freedesktop.org/series/36409/ State : success == Summary == IGT patchset tested on top of latest successful build b64c093fe5a2b65201ebf8305491ea923151d6e7 tool

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Add display WA #1175 for planes ending close to right screen edge

2018-01-12 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Add display WA #1175 for planes ending close to right screen edge URL : https://patchwork.freedesktop.org/series/36408/ State : success == Summary == Series 36408v1 series starting with [1/2] drm/i915: Add display WA #1175 for

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Add display WA #1175 for planes ending close to right screen edge

2018-01-12 Thread Chris Wilson
Quoting Imre Deak (2018-01-12 14:54:36) > As described in the WA on GLK and CNL planes on the right edge of the > screen that have less than 4 pixels visible from the beginning of the > plane to the edge of the screen can cause FIFO underflow and display > corruption. > > On GLK/CNL I could trigge

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Add display WA #1175 for planes ending close to right screen edge

2018-01-12 Thread Chris Wilson
Quoting Imre Deak (2018-01-12 14:54:36) > As described in the WA on GLK and CNL planes on the right edge of the > screen that have less than 4 pixels visible from the beginning of the > plane to the edge of the screen can cause FIFO underflow and display > corruption. > > On GLK/CNL I could trigge

[Intel-gfx] [PATCH i-g-t 3/4] kms_plane: Split helpers creating reference FB and capturing CRC

2018-01-12 Thread Imre Deak
Split creating a reference FB and capturing the CRC for it into separate functions, so in a follow-up patch we can reuse the CRC capture function for a reference FB created in a different way. Signed-off-by: Imre Deak --- tests/kms_plane.c | 50 --

[Intel-gfx] [PATCH i-g-t 4/4] kms_plane: Add clipping subtests

2018-01-12 Thread Imre Deak
Add plane clipping subtests displaying a single clipped plane, with the following test cases: a) plane covering the whole screen, so that clipping is done at all 4 screen edges b) plane at either of the 4 corners of the screen clipped, so that a 4x4 pixel part of the plane is visible c) plane

[Intel-gfx] [PATCH i-g-t 1/4] kms_plane: Remove redundant modeset after CRC capture

2018-01-12 Thread Imre Deak
The null modeset after capturing the CRC is redundant; detaching the FB from the plane is enough for the next modeset to work properly. This speed things up especially on slow panels. Signed-off-by: Imre Deak --- tests/kms_plane.c | 1 - 1 file changed, 1 deletion(-) diff --git a/tests/kms_plan

[Intel-gfx] [PATCH i-g-t 2/4] lib: Export helpers to get rotation/tiling strings

2018-01-12 Thread Imre Deak
This is needed for the next patch for some debug prints. Signed-off-by: Imre Deak --- lib/igt_fb.c | 23 +++ lib/igt_fb.h | 3 +++ lib/igt_kms.c | 11 +-- lib/igt_kms.h | 1 + 4 files changed, 36 insertions(+), 2 deletions(-) diff --git a/lib/igt_fb.c b/lib/igt_f

[Intel-gfx] [PATCH 1/2] drm/i915: Add display WA #1175 for planes ending close to right screen edge

2018-01-12 Thread Imre Deak
As described in the WA on GLK and CNL planes on the right edge of the screen that have less than 4 pixels visible from the beginning of the plane to the edge of the screen can cause FIFO underflow and display corruption. On GLK/CNL I could trigger the problem only if the plane was at the same time

[Intel-gfx] [PATCH 2/2] drm/i915: Add WA for planes ending close to left screen edge

2018-01-12 Thread Imre Deak
While running the kms_plane clipping test I noticed a similar problem to the one described in Display WA #1175. In this case, similarly for planes other than the cursor, with 1 or 3 pixels visible from the left edge of the screen to the end of the plane and an odd plane X offset used for clipping c

Re: [Intel-gfx] [PATCH] drm/i915/pmu: fix noderef.cocci warnings

2018-01-12 Thread Ville Syrjälä
On Fri, Jan 12, 2018 at 09:31:16PM +0800, kbuild test robot wrote: > From: Fengguang Wu > > drivers/gpu/drm/i915/i915_pmu.c:795:34-40: ERROR: application of sizeof to > pointer > > sizeof when applied to a pointer typed expression gives the size of > the pointer > > Generated by: scripts/coc

Re: [Intel-gfx] [PATCH] drm/i915/pmu: fix noderef.cocci warnings

2018-01-12 Thread Tvrtko Ursulin
On 12/01/2018 13:31, kbuild test robot wrote: From: Fengguang Wu drivers/gpu/drm/i915/i915_pmu.c:795:34-40: ERROR: application of sizeof to pointer sizeof when applied to a pointer typed expression gives the size of the pointer Generated by: scripts/coccinelle/misc/noderef.cocci Fixes:

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/1] tools/intel_guc_logger: Send GuC log level in new i915 expected format

2018-01-12 Thread Patchwork
== Series Details == Series: series starting with [v2,1/1] tools/intel_guc_logger: Send GuC log level in new i915 expected format URL : https://patchwork.freedesktop.org/series/36404/ State : success == Summary == IGT patchset tested on top of latest successful build b64c093fe5a2b65201ebf8305

Re: [Intel-gfx] [PATCH v3] drm/i915/pmu: Reconstruct active state on starting busy-stats

2018-01-12 Thread Tvrtko Ursulin
On 12/01/2018 13:24, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-01-12 13:19:30) On 12/01/2018 13:03, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-01-12 11:43:11) On 12/01/2018 10:35, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-01-12 10:30:26) On 12/01/2018 09:51, Chris Wi

Re: [Intel-gfx] [PATCH v2 6/6] drm/i915: expose rcs topology through query uAPI

2018-01-12 Thread Lionel Landwerlin
On 12/01/18 12:27, Tvrtko Ursulin wrote: On 11/01/2018 19:53, Lionel Landwerlin wrote: With the introduction of asymmetric slices in CNL, we cannot rely on the previous SUBSLICE_MASK getparam to tell userspace what subslices are available. Here we introduce a more detailed way of querying the G

[Intel-gfx] [PATCH i-g-t v2 1/1] tools/intel_guc_logger: Send GuC log level in new i915 expected format

2018-01-12 Thread Sagar Arun Kamble
i915 expects GuC log level to be specified as: 0: disabled 1: enabled (verbosity level 0 = min) 2: enabled (verbosity level 1) 3: enabled (verbosity level 2) 4: enabled (verbosity level 3 = max) Remove the earlier internal layout based logging control from g

[Intel-gfx] ✓ Fi.CI.IGT: success for kms plane scaling tests.

2018-01-12 Thread Patchwork
== Series Details == Series: kms plane scaling tests. URL : https://patchwork.freedesktop.org/series/36388/ State : success == Summary == Test gem_softpin: Subgroup noreloc-s3: pass -> SKIP (shard-snb) fdo#103375 Test kms_flip: Subgroup blt-wf_vblank

Re: [Intel-gfx] [PATCH v2 1/6] drm/i915: store all subslice masks

2018-01-12 Thread Lionel Landwerlin
On 12/01/18 12:01, Tvrtko Ursulin wrote: On 12/01/2018 10:58, Lionel Landwerlin wrote: On 12/01/18 10:15, Tvrtko Ursulin wrote: [snip] +static inline int sseu_eu_idx(const struct sseu_dev_info *sseu, +  int slice, int subslice, int eu_group) What is eu_group for? Will it

Re: [Intel-gfx] [PATCH i-g-t v2 1/9] tests/kms_plane: Run test for all supported pixel formats, v2.

2018-01-12 Thread Mika Kahola
On Fri, 2018-01-12 at 11:21 +0100, Maarten Lankhorst wrote: > From: Mahesh Kumar > > This patch adds a subtest related to pixel format testing. The test > tries to create framebuffer with all supported pixel formats on every > plane, > and tries to draw them using cairo and commits the same on di

[Intel-gfx] ✗ Fi.CI.BAT: failure for ICL basic enabling + GEM (rev24)

2018-01-12 Thread Patchwork
== Series Details == Series: ICL basic enabling + GEM (rev24) URL : https://patchwork.freedesktop.org/series/36230/ State : failure == Summary == Applying: drm/i915/icl: Add initial Icelake definitions. Applying: drm/i915/icl: Add the ICL PCI IDs Applying: drm/i915/icl: add icelake_init_clock_

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: expose RCS topology to userspace

2018-01-12 Thread Patchwork
== Series Details == Series: drm/i915: expose RCS topology to userspace URL : https://patchwork.freedesktop.org/series/36353/ State : success == Summary == Series 36353v1 drm/i915: expose RCS topology to userspace https://patchwork.freedesktop.org/api/1.0/series/36353/revisions/1/mbox/ Test d

Re: [Intel-gfx] [PATCH i-g-t 1/1] tools/intel_guc_logger: Send GuC log level in new i915 expected format

2018-01-12 Thread Sagar Arun Kamble
On 1/12/2018 6:51 PM, Michal Wajdeczko wrote: On Fri, 12 Jan 2018 07:52:04 +0100, Sagar Arun Kamble wrote: i915 expects GuC log level to be specified as: 0: disabled 1: enabled (verbosity level 0 = min) 2: enabled (verbosity level 1) 3: enabled (verbosity level 2) 4: ena

Re: [Intel-gfx] [PATCH i-g-t 1/1] tools/intel_guc_logger: Send GuC log level in new i915 expected format

2018-01-12 Thread Michal Wajdeczko
On Fri, 12 Jan 2018 07:52:04 +0100, Sagar Arun Kamble wrote: i915 expects GuC log level to be specified as: 0: disabled 1: enabled (verbosity level 0 = min) 2: enabled (verbosity level 1) 3: enabled (verbosity level 2) 4: enabled (verbosity level 3 = ma

Re: [Intel-gfx] [PATCH v3] drm/i915/pmu: Reconstruct active state on starting busy-stats

2018-01-12 Thread Tvrtko Ursulin
On 12/01/2018 10:35, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-01-12 10:30:26) On 12/01/2018 09:51, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-01-12 09:40:40) So submit side doesn't work in either case, unless I am missing something. Would need the pair of port manipulation and

Re: [Intel-gfx] [PATCH v2 1/6] drm/i915: store all subslice masks

2018-01-12 Thread Tvrtko Ursulin
On 12/01/2018 10:58, Lionel Landwerlin wrote: On 12/01/18 10:15, Tvrtko Ursulin wrote: [snip] --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -80,12 +80,17 @@ void intel_device_info_dump_flags(const struct intel_device_info *info,     stati

Re: [Intel-gfx] [PATCH v2 1/6] drm/i915: store all subslice masks

2018-01-12 Thread Lionel Landwerlin
On 12/01/18 10:15, Tvrtko Ursulin wrote: On 11/01/2018 19:53, Lionel Landwerlin wrote: Up to now, subslice mask was assumed to be uniform across slices. But starting with Cannonlake, slices can be asymmetric (for example slice0 has different number of subslices as slice1+). This change stores a

Re: [Intel-gfx] [PATCH v3] drm/i915/pmu: Reconstruct active state on starting busy-stats

2018-01-12 Thread Tvrtko Ursulin
On 11/01/2018 07:30, Chris Wilson wrote: We have a hole in our busy-stat accounting if the pmu is enabled during a long running batch, the pmu will not start accumulating busy-time until the next context switch. This then fails tests that are only sampling a single batch. v2: Count each active

Re: [Intel-gfx] [PATCH v2 6/6] drm/i915: expose rcs topology through query uAPI

2018-01-12 Thread Tvrtko Ursulin
On 11/01/2018 19:53, Lionel Landwerlin wrote: With the introduction of asymmetric slices in CNL, we cannot rely on the previous SUBSLICE_MASK getparam to tell userspace what subslices are available. Here we introduce a more detailed way of querying the Gen's GPU topology that doesn't aggregate n

Re: [Intel-gfx] [PATCH v3] drm/i915/pmu: Reconstruct active state on starting busy-stats

2018-01-12 Thread Tvrtko Ursulin
On 12/01/2018 13:03, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-01-12 11:43:11) On 12/01/2018 10:35, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-01-12 10:30:26) On 12/01/2018 09:51, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-01-12 09:40:40) So submit side doesn't work in

[Intel-gfx] [PATCH] drm/i915/pmu: fix noderef.cocci warnings

2018-01-12 Thread kbuild test robot
From: Fengguang Wu drivers/gpu/drm/i915/i915_pmu.c:795:34-40: ERROR: application of sizeof to pointer sizeof when applied to a pointer typed expression gives the size of the pointer Generated by: scripts/coccinelle/misc/noderef.cocci Fixes: 109ec558370f ("drm/i915/pmu: Only enumerate availa

Re: [Intel-gfx] [PATCH i-g-t 2/6] Makefile.meson: use $(error ...) for errors

2018-01-12 Thread Petri Latvala
On Tue, Oct 24, 2017 at 12:52:52PM +0300, Jani Nikula wrote: > This is the usual way of flagging fatal errors in Makefiles, and gives > you the error exit code too. > > Signed-off-by: Jani Nikula Regardless of where this change is done (meson.sh output or Makefile.meson, see reply to patch 1),

Re: [Intel-gfx] [PATCH v3] drm/i915/pmu: Reconstruct active state on starting busy-stats

2018-01-12 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-01-12 08:16:19) > > On 11/01/2018 07:30, Chris Wilson wrote: > > We have a hole in our busy-stat accounting if the pmu is enabled during > > a long running batch, the pmu will not start accumulating busy-time > > until the next context switch. This then fails tests tha

Re: [Intel-gfx] [PATCH v3] drm/i915/pmu: Reconstruct active state on starting busy-stats

2018-01-12 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-01-12 13:19:30) > > On 12/01/2018 13:03, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2018-01-12 11:43:11) > >> > >> On 12/01/2018 10:35, Chris Wilson wrote: > >>> Quoting Tvrtko Ursulin (2018-01-12 10:30:26) > > > On 12/01/2018 09:51, Chris Wilson wr

Re: [Intel-gfx] [PATCH i-g-t 6/6] Makefile.meson: add distclean target to remove Makefile and build dir

2018-01-12 Thread Petri Latvala
On Tue, Oct 24, 2017 at 12:52:56PM +0300, Jani Nikula wrote: > Useful for forcing a clean meson build from scratch. > > Signed-off-by: Jani Nikula > --- > Makefile.meson | 5 - > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/Makefile.meson b/Makefile.meson > index c7a87f37

Re: [Intel-gfx] [PATCH 1/7] drm/i915: Disable preemption and sleeping while using the punit sideband

2018-01-12 Thread Mika Kuoppala
Hans de Goede writes: > Hi, > > On 11-01-18 22:42, Hans de Goede wrote: >> Hi, >> >> On 11-01-18 22:17, Ville Syrjälä wrote: >>> On Thu, Jan 11, 2018 at 08:53:42PM +, Chris Wilson wrote: Quoting Ville Syrjälä (2018-01-11 20:10:45) > On Wed, Jan 10, 2018 at 12:55:05PM +, Chris Wi

Re: [Intel-gfx] [PATCH v2 5/6] drm/i915: add query uAPI

2018-01-12 Thread Tvrtko Ursulin
On 11/01/2018 19:53, Lionel Landwerlin wrote: There are a number of information that are readable from hardware registers and that we would like to make accessible to userspace. One particular example is the topology of the execution units (how are execution units grouped in subslices and slices

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/1] tools/intel_guc_logger: Send GuC log level in new i915 expected format

2018-01-12 Thread Patchwork
== Series Details == Series: series starting with [1/1] tools/intel_guc_logger: Send GuC log level in new i915 expected format URL : https://patchwork.freedesktop.org/series/36384/ State : success == Summary == Test kms_atomic_transition: Subgroup plane-all-modeset-transition-fencing:

Re: [Intel-gfx] [PATCH v2 1/6] drm/i915: store all subslice masks

2018-01-12 Thread Tvrtko Ursulin
On 11/01/2018 19:53, Lionel Landwerlin wrote: Up to now, subslice mask was assumed to be uniform across slices. But starting with Cannonlake, slices can be asymmetric (for example slice0 has different number of subslices as slice1+). This change stores all subslices masks for all slices rather t

Re: [Intel-gfx] [PATCH v2 3/6] drm/i915/debugfs: add rcs topology entry

2018-01-12 Thread Lionel Landwerlin
On 12/01/18 10:21, Tvrtko Ursulin wrote: On 11/01/2018 19:53, Lionel Landwerlin wrote: While the end goal is to make this information available to userspace through a new ioctl, there is no reason we can't display it in a human readable fashion through debugfs. slice0: 3 subslice(s) (0x7):    

Re: [Intel-gfx] [PATCH 6/6] drm/i915: expose rcs topology through query uAPI

2018-01-12 Thread Tvrtko Ursulin
On 11/01/2018 18:38, Lionel Landwerlin wrote: On 11/01/18 12:45, Tvrtko Ursulin wrote: [snip] +    __u32 n_slices; + +    __u8 data[]; Is a zero size array a GCC extension or something? I somehow seem to remember someone was complaining about this. [0] is a GNU C extension [] is a f

[Intel-gfx] ✓ Fi.CI.BAT: success for kms plane scaling tests.

2018-01-12 Thread Patchwork
== Series Details == Series: kms plane scaling tests. URL : https://patchwork.freedesktop.org/series/36388/ State : success == Summary == IGT patchset tested on top of latest successful build b64c093fe5a2b65201ebf8305491ea923151d6e7 tools: Update .gitignore with latest DRM-Tip kernel build CI

Re: [Intel-gfx] [PATCH v3] drm/i915/pmu: Reconstruct active state on starting busy-stats

2018-01-12 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-01-12 09:40:40) > So submit side doesn't work in either case, unless I am missing > something. Would need the pair of port manipulation and context_in to be > atomic. Sure, there is a small window with the result that we either never turn off the stats, or turn them

Re: [Intel-gfx] [PATCH v3] drm/i915/pmu: Reconstruct active state on starting busy-stats

2018-01-12 Thread Tvrtko Ursulin
On 12/01/2018 09:51, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-01-12 09:40:40) So submit side doesn't work in either case, unless I am missing something. Would need the pair of port manipulation and context_in to be atomic. Sure, there is a small window with the result that we either

Re: [Intel-gfx] 282dbf9b "drm/i915: Pass intel_plane and intel_crtc to plane hooks" breaks i945GM in 4.13 and above

2018-01-12 Thread Jani Nikula
On Thu, 11 Jan 2018, Karl-Johan Karlsson wrote: > Hello, > > I have an old Lenovo Thinkpad X60 laptop with a Core 2 Duo T7200 CPU and > i945GM integrated graphics whose graphics broke when I tried to update the > kernel to get the Meltdown fixes. > > GRUB2 shows a graphical boot menu, and Linux

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: expose RCS topology to userspace

2018-01-12 Thread Patchwork
== Series Details == Series: drm/i915: expose RCS topology to userspace URL : https://patchwork.freedesktop.org/series/36353/ State : warning == Summary == Test gem_tiled_swapping: Subgroup non-threaded: incomplete -> PASS (shard-hsw) fdo#104218 +1 Test kms_cursor

Re: [Intel-gfx] [PATCH v3] drm/i915/pmu: Reconstruct active state on starting busy-stats

2018-01-12 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-01-12 11:43:11) > > On 12/01/2018 10:35, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2018-01-12 10:30:26) > >> > >> > >> On 12/01/2018 09:51, Chris Wilson wrote: > >>> Quoting Tvrtko Ursulin (2018-01-12 09:40:40) > So submit side doesn't work in either case, u

Re: [Intel-gfx] [PATCH v3] drm/i915/pmu: Reconstruct active state on starting busy-stats

2018-01-12 Thread Tvrtko Ursulin
On 12/01/2018 09:09, Chris Wilson wrote: Quoting Tvrtko Ursulin (2018-01-12 08:16:19) On 11/01/2018 07:30, Chris Wilson wrote: We have a hole in our busy-stat accounting if the pmu is enabled during a long running batch, the pmu will not start accumulating busy-time until the next context swi

Re: [Intel-gfx] [PATCH i-g-t 1/6] meson: split out simple makefile integration into a makefile

2018-01-12 Thread Petri Latvala
On Tue, Oct 24, 2017 at 12:52:51PM +0300, Jani Nikula wrote: > A separate makefile is easier to read and maintain than a here > document. The meson.sh shell script becomes trivial too. > > Signed-off-by: Jani Nikula > --- > Makefile.meson | 33 + > meson.sh

Re: [Intel-gfx] [PATCH v2 1/6] drm/i915: store all subslice masks

2018-01-12 Thread Tvrtko Ursulin
On 12/01/2018 10:58, Lionel Landwerlin wrote: On 12/01/18 10:15, Tvrtko Ursulin wrote: [snip] +static inline int sseu_eu_idx(const struct sseu_dev_info *sseu, +  int slice, int subslice, int eu_group) What is eu_group for? Will it be used at some point? In case we ever

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/1] tools/intel_guc_logger: Send GuC log level in new i915 expected format

2018-01-12 Thread Patchwork
== Series Details == Series: series starting with [1/1] tools/intel_guc_logger: Send GuC log level in new i915 expected format URL : https://patchwork.freedesktop.org/series/36384/ State : success == Summary == IGT patchset tested on top of latest successful build d37369c7146a2ceb332592297d31

Re: [Intel-gfx] [PATCH v2 1/6] drm/i915: store all subslice masks

2018-01-12 Thread Lionel Landwerlin
On 12/01/18 11:05, Tvrtko Ursulin wrote: On 12/01/2018 10:58, Lionel Landwerlin wrote: On 12/01/18 10:15, Tvrtko Ursulin wrote: [snip] --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -80,12 +80,17 @@ void intel_device_info_dump_flags(const

Re: [Intel-gfx] [PATCH v3] drm/i915/pmu: Reconstruct active state on starting busy-stats

2018-01-12 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-01-12 10:30:26) > > > On 12/01/2018 09:51, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2018-01-12 09:40:40) > >> So submit side doesn't work in either case, unless I am missing > >> something. Would need the pair of port manipulation and context_in to be > >> atom

[Intel-gfx] [PATCH i-g-t v2 9/9] tests/kms_plane_scaling: test for multi pipe with scaling

2018-01-12 Thread Maarten Lankhorst
From: Jyoti Yadav Add a subtest to display primary and overlay planes on two connected pipes and runs scaling test on both pipes Changes since v1: - Commit first before trying any scaling. (Maarten) - Use the same logic as kms_cursor_legacy to find a pipe and output. (Maarten) - Rework test to w

[Intel-gfx] [PATCH i-g-t v2 4/9] tests/kms_plane_scaling: Convert from simple test to full test

2018-01-12 Thread Maarten Lankhorst
Convert the test to run subtests per pipe, before we start adding more subtests. Signed-off-by: Maarten Lankhorst --- tests/kms_plane_scaling.c | 46 +- 1 file changed, 21 insertions(+), 25 deletions(-) diff --git a/tests/kms_plane_scaling.c b/tests/k

[Intel-gfx] [PATCH i-g-t v2 6/9] tests/kms_plane_scaling: test scaling with tiling rotation and pixel formats, v2.

2018-01-12 Thread Maarten Lankhorst
From: Jyoti Yadav This patch adds subtest for testing scaling in combination with rotation and pixel formats. Changes since v1: - Rework test to work with the other changes to kms_plane_scaling. (Maarten) - Remove hardcodes for MIN/MAX_SRC_WIDTH, and use the value directly. (Maarten) Signed-off

[Intel-gfx] [PATCH i-g-t v2 2/9] tests/kms_plane_scaling: Move the actual test to its own function.

2018-01-12 Thread Maarten Lankhorst
We will add more subtests in the future, it's more clear if we split out the actual test to its own function first. Signed-off-by: Maarten Lankhorst --- tests/kms_plane_scaling.c | 226 -- 1 file changed, 117 insertions(+), 109 deletions(-) diff --git

[Intel-gfx] [PATCH i-g-t v2 7/9] tests/kms_plane_scaling: test scaler with clipping clamping, v2.

2018-01-12 Thread Maarten Lankhorst
From: Jyoti Yadav This patch adds subtest to test scaler clipping and clamping scenario. Changes since v1: - Modify test to work with the changes to kms_plane_scaling. (Maarten) Signed-off-by: Jyoti Yadav Signed-off-by: Mahesh Kumar Signed-off-by: Vidya Srinivas Signed-off-by: Maarten Lankho

[Intel-gfx] [PATCH i-g-t v2 5/9] tests/kms_plane_scaling: Clean up tests to work better with igt_kms.

2018-01-12 Thread Maarten Lankhorst
The test only runs on gen9+, so we can safely replace all calls with COMMIT_ATOMIC. Also perform some cleanups by making fb an array, and cleaning up in prepare_crtc. This way failed subtests won't cause failures in other subtests. Signed-off-by: Maarten Lankhorst --- tests/kms_plane_scaling.c

[Intel-gfx] [PATCH i-g-t v2 8/9] lib/igt_kms: Add more braces around macros

2018-01-12 Thread Maarten Lankhorst
The next patch wants to call for_each_pipe_with_valid_output with *pipe and *output, this fails miserably without these braces. Signed-off-by: Maarten Lankhorst --- lib/igt_kms.h | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/lib/igt_kms.h b/lib/igt_kms.h in

[Intel-gfx] [PATCH i-g-t v2 3/9] tests/kms_plane_scaling: Fix basic scaling test, v2.

2018-01-12 Thread Maarten Lankhorst
From: Mahesh Kumar PIPEC doesnt have 3rd plane in GEN9. So, we skip the 3rd plane related scaling test where 2nd OVERLAY plane is not available. Restricting downscaling to (9/10)x original size of the image to avoid "Max pixel rate limitation" of the hardware. Later patches in this series will

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