Hi Praveen,
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.11-rc2 next-20170310]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Praveen-Paneri/drm-i915-Enable-F
On Fri, Mar 17, 2017 at 10:41:42PM +, Matthew Auld wrote:
> On 17 March 2017 at 19:46, Chris Wilson wrote:
> > Use pagecache_write to avoid shmemfs clearing the pages prior to us
> > immediately overwriting them with our data.
> >
> > Signed-off-by: Chris Wilson
> Interesting...
> Reviewed-by
== Series Details ==
Series: series starting with [CI,1/4] drm/i915:
i915_gem_object_create_from_data() doesn't require struct_mutex
URL : https://patchwork.freedesktop.org/series/21478/
State : success
== Summary ==
Series 21478v1 Series without cover letter
https://patchwork.freedesktop.org
i915_gem_object_create_from_data() always returns an error pointer on
failure, there is no need to check against NULL.
Signed-off-by: Chris Wilson
Link:
http://patchwork.freedesktop.org/patch/msgid/20170317205317.7885-1-ch...@chris-wilson.co.uk
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i91
---
drivers/gpu/drm/i915/i915_params.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/i915/i915_params.c
index b6a7e363d076..9dcc8a0dd3c0 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_p
Use pagecache_write to avoid shmemfs clearing the pages prior to us
immediately overwriting them with our data.
Signed-off-by: Chris Wilson
Link:
http://patchwork.freedesktop.org/patch/msgid/20170317194648.12468-2-ch...@chris-wilson.co.uk
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/i915
Both object creation and backing storage page allocation do not require
struct_mutex, so do not require the caller to take it.
Signed-off-by: Chris Wilson
Link:
http://patchwork.freedesktop.org/patch/msgid/20170317194648.12468-1-ch...@chris-wilson.co.uk
Reviewed-by: Matthew Auld
---
drivers/gp
On 17 March 2017 at 20:53, Chris Wilson wrote:
> i915_gem_object_create_from_data() always returns and error pointer on
an error
> failure, there is no need to check against NULL.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
___
Intel-gfx
On 17 March 2017 at 19:46, Chris Wilson wrote:
> Use pagecache_write to avoid shmemfs clearing the pages prior to us
> immediately overwriting them with our data.
>
> Signed-off-by: Chris Wilson
Interesting...
Reviewed-by: Matthew Auld
___
Intel-gfx ma
On 17 March 2017 at 19:46, Chris Wilson wrote:
> Both object creation and backing storage page allocation do not require
> struct_mutex, so do not require the caller to take it.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Matthew Auld
___
Intel-gfx ma
On Fri, Mar 17, 2017 at 11:18:08PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> We'll maybe want just one posting read at the end? This does seem to
> potentially shave a few usec off from the update.
They are all superfluous until proven otherwise. The only cases where
On Fri, Mar 17, 2017 at 11:18:04PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> The effective difference between i9xx_update_primary_plane()
> and ironlake_update_primary_plane() is only the HSW/BDW
> DSPOFFSET special case. So bring that over into
> i9xx_update_primary_p
On Fri, Mar 17, 2017 at 11:18:03PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Extract the primary plane surfae offset/x/y calculations for
> pre-SKL platforms into a common function, and call it during the
> atomic check phase to reduce the amount of stuff we have to do
On Fri, Mar 17, 2017 at 11:18:02PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Computing the plane control register value is branchy so moving it out
> from the plane commit hook seems prudent. Let's pre-compute it during
> the atomic check phase and store the result in
On Fri, Mar 17, 2017 at 11:18:01PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Pull the code to calculate the cursor control register value into
> separate functions. Allows us to pre-compute them in the future.
Want to comment on the benefit of passing struct intel_crt
On Fri, Mar 17, 2017 at 11:18:00PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Pull the code to calculate the ILK-SNB sprite control register value
> into a separate function. Allows us to pre-compute it in the future.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Chri
On Fri, Mar 17, 2017 at 11:17:55PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Pull the code to calculate the SKL plane control register value into
> a separate function. Allows us to pre-compute it in the future.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Chris Wil
On Fri, Mar 17, 2017 at 11:17:59PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Pull the code to calculate the IVB-BDW sprite control register value
> into a separate function. Allows us to pre-compute it in the future.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Chri
On Fri, Mar 17, 2017 at 11:17:58PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Pull the code to calculate the VLV/CHV sprite control register value
> into a separate function. Allows us to pre-compute it in the future.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Chri
On Fri, Mar 17, 2017 at 11:17:57PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Pull the code to calculate the pre-SKL primary plane control register
> value into a separate function. Allows us to pre-compute it in the
> future.
>
> We can also share the code between the
On Fri, Mar 17, 2017 at 11:17:56PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> On SKL the planes are uniform so the "sprites" can use the
> primary plane code perfectly fine. The only difference we
> have is the color key handling, but since we never enable that
> for th
== Series Details ==
Series: drm/i915: Moar plane update optimizations
URL : https://patchwork.freedesktop.org/series/21475/
State : success
== Summary ==
Series 21475v1 drm/i915: Moar plane update optimizations
https://patchwork.freedesktop.org/api/1.0/series/21475/revisions/1/mbox/
Test kms
On Fri, Mar 17, 2017 at 11:18:07PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> I'm thinking we'll want to actually spliut the uncore.lock into
> two locks (display vs. gt).
Yes, a single lock for display seems reasonable, esp. given the proof of
principle here.
Hmm, I
On Fri, Mar 17, 2017 at 11:18:06PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> We currently hold a vblank referenced while trying to evade the
> vblank, but we drop it as soon as we've done that. After all the
> planes have been committed we are quite likely to grab a ne
From: Ville Syrjälä
Pull the code to calculate the cursor control register value into
separate functions. Allows us to pre-compute them in the future.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 119 +--
1 file changed, 72 insertions(
From: Ville Syrjälä
Computing the plane control register value is branchy so moving it out
from the plane commit hook seems prudent. Let's pre-compute it during
the atomic check phase and store the result in the plane state.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c
From: Ville Syrjälä
We'll maybe want just one posting read at the end? This does seem to
potentially shave a few usec off from the update.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 8
drivers/gpu/drm/i915/intel_sprite.c | 8
2 files changed, 16
From: Ville Syrjälä
We currently hold a vblank referenced while trying to evade the
vblank, but we drop it as soon as we've done that. After all the
planes have been committed we are quite likely to grab a new vblank
reference for delivering the flip event. This causes the vblank
interrupt to do
From: Ville Syrjälä
The effective difference between i9xx_update_primary_plane()
and ironlake_update_primary_plane() is only the HSW/BDW
DSPOFFSET special case. So bring that over into
i9xx_update_primary_plane() and eliminate the duplicated code.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/d
From: Ville Syrjälä
I'm thinking we'll want to actually spliut the uncore.lock into
two locks (display vs. gt). But this is just a proof of concept and
it is indeed quote effective, especially with lockdep and whatnot
enabled.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_irq.c
From: Ville Syrjälä
All the pre-SKL sprite planes compute the x/y/tile offsets in a
similar way. There are a couple of minor differences but the primary
planes have those as well. Thus i9xx_check_plane_surface()
already does what we need, so let's use it.
Signed-off-by: Ville Syrjälä
---
drive
From: Ville Syrjälä
Pull the code to calculate the ILK-SNB sprite control register value
into a separate function. Allows us to pre-compute it in the future.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_sprite.c | 72 +
1 file changed, 41 inse
From: Ville Syrjälä
Extract the primary plane surfae offset/x/y calculations for
pre-SKL platforms into a common function, and call it during the
atomic check phase to reduce the amount of stuff we have to do
during the commit phase. SKL is already doing this.
Signed-off-by: Ville Syrjälä
---
From: Ville Syrjälä
Pull the code to calculate the VLV/CHV sprite control register value
into a separate function. Allows us to pre-compute it in the future.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_sprite.c | 71 +++--
1 file changed, 37 inse
From: Ville Syrjälä
Pull the code to calculate the pre-SKL primary plane control register
value into a separate function. Allows us to pre-compute it in the
future.
We can also share the code between the i9xx and ilk codepaths as the
differences are minimal. Actually there are no differences bet
From: Ville Syrjälä
On SKL the planes are uniform so the "sprites" can use the
primary plane code perfectly fine. The only difference we
have is the color key handling, but since we never enable that
for the primary plane the same code works just fine.
Signed-off-by: Ville Syrjälä
---
drivers/
From: Ville Syrjälä
Pull the code to calculate the IVB-BDW sprite control register value
into a separate function. Allows us to pre-compute it in the future.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_sprite.c | 80 -
1 file changed, 44 inse
From: Ville Syrjälä
The plane updates are still taking far too long, at least with
heavy kernel debug knobs turned on. Using kms_atomic_transitions
I'm currently seeing numbers as high as 170 usec on my VLV.
To combat lockdep the most beneficial thing is taking the
uncore.lock around the entire
From: Ville Syrjälä
Pull the code to calculate the SKL plane control register value into
a separate function. Allows us to pre-compute it in the future.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 38
1 file changed, 26 insertion
i915_gem_object_create_from_data() always returns and error pointer on
failure, there is no need to check against NULL.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_uc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/driver
On Fri, Mar 17, 2017 at 08:20:27PM +, Chris Wilson wrote:
> Order the update to vblank->enabled after the timestamp is primed so
> that a concurrent unlocked reader will only see the vblank->enabled with
> the current timestamp.
>
> v2: vblank->enable is guarded by dev->vbl_lock not
> dev->vbl
== Series Details ==
Series: series starting with [v2,1/4] drm: Mark up accesses of vblank->enabled
outside of its spinlock
URL : https://patchwork.freedesktop.org/series/21472/
State : success
== Summary ==
Series 21472v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/
Em Ter, 2017-03-14 às 11:09 +0200, Jani Nikula escreveu:
> On Mon, 13 Mar 2017, Manasi Navare wrote:
> >
> > On Mon, Mar 13, 2017 at 11:55:31AM +0200, Jani Nikula wrote:
> > >
> > > On Sat, 11 Mar 2017, Manasi Navare
> > > wrote:
> > > >
> > > > On Fri, Mar 10, 2017 at 03:27:58PM +0200, Jani N
Move the repeated (a - b) <= (1 << 23) to its own function.
Signed-off-by: Chris Wilson
Cc: Ville Syrjälä
Cc: Daniel Vetter
---
drivers/gpu/drm/drm_irq.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c
ind
Bypass all the spinlocks and return the last timestamp and counter from
the last vblank if the driver delcares that it is accurate (and stable
across on/off), and the vblank is currently enabled.
This is dependent upon the both the hardware and driver to provide the
proper barriers to facilitate r
Since we cannot enable the vblank if !dev->irq_enabled, we assert that
checking for both !vblank->enabled and !dev->irq_enabled is tautological
and only need the former. The only time it may differ is when racing
with drm_irq_uninstall(), but that will then disable the vblank and
wakeup the waiters
Order the update to vblank->enabled after the timestamp is primed so
that a concurrent unlocked reader will only see the vblank->enabled with
the current timestamp.
v2: vblank->enable is guarded by dev->vbl_lock not
dev->vblank_time_lock, update the READ_ONCE accordingly.
Do not add a READ_ONCE(v
On Thu, Mar 16, 2017 at 11:58:06PM +0530, Sagar Arun Kamble wrote:
> With GuC based SLPC, frequency control will be moved to GuC and Host will
> continue to control RC6 and Ring frequency setup. SLPC can be enabled in
> the GuC setup path and can happen in parallel in GuC with other i915 setup.
> H
== Series Details ==
Series: series starting with [1/2] drm/i915: i915_gem_object_create_from_data()
doesn't require struct_mutex
URL : https://patchwork.freedesktop.org/series/21470/
State : success
== Summary ==
Series 21470v1 Series without cover letter
https://patchwork.freedesktop.org/ap
On Fri, Mar 17, 2017 at 07:54:30PM +, Chris Wilson wrote:
> On Fri, Mar 03, 2017 at 05:19:26PM +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > The VLV/CHV watermark calculation is really interested in the hardware
> > plane type rather than the plane type (which is
On Fri, Mar 17, 2017 at 11:49:32AM +0200, Ville Syrjälä wrote:
> On Thu, Mar 16, 2017 at 11:47:49PM +, Chris Wilson wrote:
> > Bypass all the spinlocks and return the last timestamp and counter from
> > the last vblank if the driver delcares that it is accurate (and stable
> > across on/off), a
On Fri, Mar 03, 2017 at 05:19:26PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> The VLV/CHV watermark calculation is really interested in the hardware
> plane type rather than the plane type (which is more of a software
> concept). Let's check plane->id rather plane->type
On Fri, Mar 03, 2017 at 05:19:27PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> VLV/CHV don't have double buffered watermarks so they need to consider
> the cursor visibility as a special case just like ILK-BDW. Let's use
> the helper we have for that.
>
> Signed-off-by:
On Fri, Mar 03, 2017 at 05:19:26PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> The VLV/CHV watermark calculation is really interested in the hardware
> plane type rather than the plane type (which is more of a software
> concept). Let's check plane->id rather plane->type
On Fri, Mar 03, 2017 at 05:19:25PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> All platforms that lack double buffered watermarks will need to
> handle the legacy cursor updates in the same way. So let's extract the
> logic to determine the plane visibility into a small
Both object creation and backing storage page allocation do not require
struct_mutex, so do not require the caller to take it.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem.c | 4 +---
drivers/gpu/drm/i915/intel_uc.c | 2 --
2 files changed, 1 insertion(+), 5 deletions(-)
diff -
Use pagecache_write to avoid shmemfs clearing the pages prior to us
immediately overwriting them with our data.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem.c | 45 ++---
1 file changed, 29 insertions(+), 16 deletions(-)
diff --git a/drivers/
On Fri, Mar 17, 2017 at 1:24 AM, Paulo Zanoni wrote:
> Em Qui, 2017-03-16 às 17:38 +0530, Praveen Paneri escreveu:
>> When FBC is enabled for linear, legacy Y-tiled and Yf-tiled
>> surfaces on gen9, the cfb stride must be programmed by SW as
>>
>> cfb_stride = ceiling[(at least plane width in pixe
Now that we have support for Y-tiled buffers, add another
iteration of tests for Y-tiled buffers.
Signed-off-by: Praveen Paneri
---
tests/kms_fbc_crc.c | 71 +
1 file changed, 39 insertions(+), 32 deletions(-)
diff --git a/tests/kms_fbc_crc.c
From: Paulo Zanoni
This is the program that's supposed to test lib/igt_draw. We just
added Y tiling support for the library, so add the tests now.
Signed-off-by: Paulo Zanoni
Signed-off-by: Praveen Paneri
---
tests/kms_draw_crc.c | 58 ++--
1 fi
From: Akash Goel
Signed-off-by: Akash Goel
Signed-off-by: Praveen Paneri
---
lib/igt_draw.c | 35 +++
1 file changed, 35 insertions(+)
diff --git a/lib/igt_draw.c b/lib/igt_draw.c
index fcf8fba..17011d8 100644
--- a/lib/igt_draw.c
+++ b/lib/igt_draw.c
@@ -31,6
This series adds Y-tiled buffer creation support into IGT libraries and
goes on to use this capability to add support into FBC tests to use
Y-tiled buffers.
Akash Goel (1):
lib/igt_draw: Add Y-tiling support for IGT_DRAW_BLT method
Paulo Zanoni (1):
tests/kms_draw_crc: add support for Y tilin
This function can be used by igt_draw to get accurate
tile dimensions for all tile formats.
Signed-off-by: Praveen Paneri
---
lib/igt_fb.c | 2 +-
lib/igt_fb.h | 3 ++-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index d2b7e9e..6ecc36b 100644
--- a/
Allow tests to create Y-tiled bufferes using a separate
argument to the test without increasing the number of
subtests.
Signed-off-by: Praveen Paneri
---
tests/kms_frontbuffer_tracking.c | 46 +++-
1 file changed, 27 insertions(+), 19 deletions(-)
diff --git
igt_get_fb_tile_size function takes modifer as an argument
This helper function will let users to convert tiling to
modifier and use igt_get_fb_tile_size()
Signed-off-by: Praveen Paneri
---
lib/igt_fb.c | 27 +++
lib/igt_fb.h | 1 +
2 files changed, 28 insertions(+)
dif
This patch adds Y-tiling support for igt_draw_rect function.
v2:
Use helper function to get tile sizes (Ville)
Signed-off-by: Praveen Paneri
---
lib/igt_draw.c | 132 +
1 file changed, 87 insertions(+), 45 deletions(-)
diff --git a/lib/ig
== Series Details ==
Series: drm/i915: Reinstate reservation_object zapping for batch_pool objects
URL : https://patchwork.freedesktop.org/series/21464/
State : success
== Summary ==
Series 21464v1 drm/i915: Reinstate reservation_object zapping for batch_pool
objects
https://patchwork.freedes
I removed the zapping of the reservation_object->fence array of shared
fences prematurely. We don't yet have the code to zap that array when
retiring the object, and so currently it remains possible to continually
grow the shared array trapping requests when reusing the batch_pool
object across man
On Mon, Mar 13, 2017 at 03:04:21PM +0200, Jani Nikula wrote:
> On Mon, 13 Mar 2017, Chris Wilson wrote:
> > To improve our historical record and to simplify userspace that wants to
> > include i915_pciids.h as its canonical breakdown of PCI IDs and their
> > respective generations, include the gen
On Fri, Mar 17, 2017 at 05:02:24PM +0800, Zhenyu Wang wrote:
> On 2017.03.17 10:58:26 +0200, Jani Nikula wrote:
> > On Fri, 17 Mar 2017, Zhenyu Wang wrote:
> > > Hi,
> > >
> > > This is gvt fixes for 4.11-rc4. Last minute rebase was to move
> > > from 70647f9163aa ("Merge tag 'gvt-fixes-2017-03-08
On Fri, Mar 17, 2017 at 12:42:51PM +0200, Jani Nikula wrote:
> Noticing that 64a54c5e1a5d ("dim: Add add-link command") added a
> condition that is always true (if [ -n $foo ]), despite my review of the
> patch, I refreshed some of my old patches to fix issues that can be
> caught by shellcheck.
>
Op 16-03-17 om 21:15 schreef Daniel Vetter:
> On Thu, Mar 16, 2017 at 5:09 PM, Maarten Lankhorst
> wrote:
>> Op 16-03-17 om 16:52 schreef Daniel Vetter:
>>> The vblank code really wants to look at crtc->state without having to
>>> take a ww_mutex. One option might be to take one of the vblank lock
Hi all,
We are pleased to announce another update of Intel GVT-g for Xen.
Intel GVT-g is a full GPU virtualization solution with mediated pass-through,
starting from 4th generation Intel Core(TM) processors with Intel Graphics
processors. A virtual GPU instance is maintained for each VM, with p
Hi all,
Intel GVT-g for KVM (a.k.a. KVMGT) is a full GPU virtualization solution with
mediated pass-through, starting from 5th generation Intel Core(TM) processors
with Intel Graphics processors. A virtual GPU instance is maintained for each
VM, with part of performance critical resources dire
Ander Conselvan de Oliveira
writes:
> Geminilake also supports pooled EUs. Enable it.
>
> It is unclear if the recommendation to disable it for 2x6 configurations
> from commit e015dd69b2cf ("drm/i915/bxt: Add WaEnablePooledEuFor2x6")
> should also apply to GLK, but it is applied anyway to be on
Ander Conselvan de Oliveira
writes:
> Geminilake also supports pooled EUs. Enable it.
>
> It is unclear if the recommendation to disable it for 2x6 configurations
> from commit e015dd69b2cf ("drm/i915/bxt: Add WaEnablePooledEuFor2x6")
> should also apply to GLK, but it is applied anyway to be on
== Series Details ==
Series: drm/915/glk: Enable pooled EUs for Geminilake (rev2)
URL : https://patchwork.freedesktop.org/series/20212/
State : success
== Summary ==
Series 20212v2 drm/915/glk: Enable pooled EUs for Geminilake
https://patchwork.freedesktop.org/api/1.0/series/20212/revisions/2/
Geminilake also supports pooled EUs. Enable it.
It is unclear if the recommendation to disable it for 2x6 configurations
from commit e015dd69b2cf ("drm/i915/bxt: Add WaEnablePooledEuFor2x6")
should also apply to GLK, but it is applied anyway to be on the safe
side. That restriction can be lifted l
> -Original Message-
> From: Nikula, Jani
> Sent: Thursday, March 16, 2017 7:00 PM
> To: Ander Conselvan De Oliveira ; Chauhan,
> Madhav ; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/glk: CDCLK calculation changes for
> glk
>
> On Thu, 16 Mar 2017, Ander Con
Test list with wider coverage and longer full runtime.
Signed-off-by: Petri Latvala
CC: Tomi Sarvela
---
This is a preliminary testlist for extended testing. Tomi has been
running it semi-manually in CI already.
I think I have incorporated all the changes Tomi has been making for
his runs. Tom
Test at check and distcheck that testlist files only contain tests
that are still present.
Signed-off-by: Petri Latvala
---
configure.ac | 1 +
tests/Makefile.am | 2 ++
tests/intel-ci/.gitignore | 1 +
tests/intel-ci/Makefile.am| 42 ++
This series introduces a build-time checker for testlists, the test
list for extended testing, and as an added bonus, introduces the
ability to comment test lists.
Petri Latvala (4):
intel-ci: Add comments on test order to fast-feedback.testlist
tests/Makefile.am: Only ignore generated gitigno
When generating the .gitignore file, use /.gitignore instead of
.gitignore to not have it apply to subdirectories.
Signed-off-by: Petri Latvala
---
tests/Makefile.am | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/Makefile.am b/tests/Makefile.am
index 8930c24..2080b3f 1
Document the test ordering choices in fast-feedback.testlist.
For comments in testlists, piglit commit
commit 0c535186d624071098c10003fdafe8f475ed9ae7
Author: Petri Latvala
Date: Wed Feb 1 12:57:45 2017 +0200
framework/programs/run.py: Allow comments in test-list files.
is required.
On Fri, Mar 17, 2017 at 01:17:17PM +0200, Joonas Lahtinen wrote:
> On to, 2017-03-16 at 13:20 +, Chris Wilson wrote:
> > The only time we need to emit a flush inside request emission is after
> > an execbuffer, for which we can use the full __i915_add_request(). All
> > other instances want the
Chris Wilson writes:
> Before rc6 is initialised (after driver load or resume), the value inside
> VLV_COUNTER_CONTROL is undefined so we cannot make an assertion that is
> in HIGH_RANGE mode.
>
> Fixes: 6b7f6aa75e38 ("drm/i915: Use coarse grained residency counter with
> byt")
> Testcase: igt/d
Before rc6 is initialised (after driver load or resume), the value inside
VLV_COUNTER_CONTROL is undefined so we cannot make an assertion that is
in HIGH_RANGE mode.
Fixes: 6b7f6aa75e38 ("drm/i915: Use coarse grained residency counter with byt")
Testcase: igt/drv_suspend/debugfs-reader
Signed-off-
== Series Details ==
Series: drm/i915: Remove superfluous i915_add_request_no_flush() helper
URL : https://patchwork.freedesktop.org/series/21442/
State : success
== Summary ==
Series 21442v1 drm/i915: Remove superfluous i915_add_request_no_flush() helper
https://patchwork.freedesktop.org/api/
== Series Details ==
Series: drm/i915: Skip execlists_dequeue() early if the list is empty (rev2)
URL : https://patchwork.freedesktop.org/series/21382/
State : success
== Summary ==
Series 21382v2 drm/i915: Skip execlists_dequeue() early if the list is empty
https://patchwork.freedesktop.org/a
Do an early read of the execlists' queue before we take the spinlock and
start checking. This is safe as the first writer to the execlists queue
will cause the tasklet to be run again after a memory barrier.
v2: Keep guc in sync with execlists queue changes
v3: Explain the mb between the tasklet r
On Fri, Mar 17, 2017 at 11:27:22AM +, Chris Wilson wrote:
> Do an early read of the execlists' queue before we take the spinlock and
> start checking. This is safe as the first writer to the execlists queue
> will cause the tasklet to be run again after a memory barrier.
>
> v2: Keep guc in sy
The only time we need to emit a flush inside request emission is after
an execbuffer, for which we can use the full __i915_add_request(). All
other instances want the simpler i915_add_request() without flushing, so
remove the useless helper.
Signed-off-by: Chris Wilson
Reviewed-by: Joonas Lahtine
== Series Details ==
Series: series starting with [01/15] drm/i915: Copy user requested buffers into
the error state (rev2)
URL : https://patchwork.freedesktop.org/series/21377/
State : success
== Summary ==
Series 21377v2 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/
Do an early read of the execlists' queue before we take the spinlock and
start checking. This is safe as the first writer to the execlists queue
will cause the tasklet to be run again after a memory barrier.
v2: Keep guc in sync with execlists queue changes
Signed-off-by: Chris Wilson
Cc: Tvrtko
On Fri, Mar 17, 2017 at 10:19:51AM +, Chris Wilson wrote:
> On Fri, Mar 17, 2017 at 11:47:51AM +0200, Ville Syrjälä wrote:
> > On Thu, Mar 16, 2017 at 11:47:48PM +, Chris Wilson wrote:
> > > @@ -360,7 +358,7 @@ static void vblank_disable_fn(unsigned long arg)
> > > unsigned long irqflags;
On to, 2017-03-16 at 13:20 +, Chris Wilson wrote:
> The only time we need to emit a flush inside request emission is after
> an execbuffer, for which we can use the full __i915_add_request(). All
> other instances want the simpler i915_add_request() without flushing, so
> remove the useless hel
On to, 2017-03-16 at 13:20 +, Chris Wilson wrote:
> Currently, the last object in the execlist is the always the batch.
> However, when building the batch buffer we often know the batch object
> first and if we can use the first slot in the execlist we can emit
> relocation instructions relativ
On to, 2017-03-16 at 13:20 +, Chris Wilson wrote:
> If the user requires patching of their batch or auxiliary buffers, we
> currently make the alterations on the cpu. If they are active on the GPU
> at the time, we wait under the struct_mutex for them to finish executing
> before we rewrite the
If the user requires patching of their batch or auxiliary buffers, we
currently make the alterations on the cpu. If they are active on the GPU
at the time, we wait under the struct_mutex for them to finish executing
before we rewrite the contents. This happens if shared relocation trees
are used be
== Series Details ==
Series: fs/pstore: Perform erase from a worker
URL : https://patchwork.freedesktop.org/series/21438/
State : success
== Summary ==
Series 21438v1 fs/pstore: Perform erase from a worker
https://patchwork.freedesktop.org/api/1.0/series/21438/revisions/1/mbox/
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