Ander Conselvan de Oliveira <ander.conselvan.de.olive...@intel.com> writes:
> Geminilake also supports pooled EUs. Enable it. > > It is unclear if the recommendation to disable it for 2x6 configurations > from commit e015dd69b2cf ("drm/i915/bxt: Add WaEnablePooledEuFor2x6") > should also apply to GLK, but it is applied anyway to be on the safe > side. That restriction can be lifted later if determined not to impact > performance. > > The extra restriction should not impact user space either. The only user > space that uses this feature is Beignet, and it only does so for 3x6 > devices. See See Beignet's commit 6901899ec90a ("Runtime: set the sub > slice according to kernel pooled EU configure."). > > v2: Improve commit message. (Mika, Roy) > > Cc: Arun Siluvery <arun.siluv...@intel.com> > Cc: Mika Kuoppala <mika.kuopp...@intel.com> > Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> > Cc: Yang Rong <rong.r.y...@intel.com> > Signed-off-by: Ander Conselvan de Oliveira > <ander.conselvan.de.olive...@intel.com> Pushed, thanks for patch and review. -Mika _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx