Hi,
It seems I missed one condition while setting enable bit for WM's,
because of which It's not enabling WM level-0 & you are observing flickers.
I'll upload updated patch.
On Monday 12 September 2016 06:41 PM, Maarten Lankhorst wrote:
Hey,
Op 09-09-16 om 10:01 schreef Kumar, Mahesh:
From
Reviewed-by: Rodrigo Vivi
On Mon, Sep 12, 2016 at 6:04 PM, Manasi Navare
wrote:
> This adds support for KBL in the new function added in commit ID:
> commit that returns a
> shared pll in case of DDI platforms.
>
> Signed-off-by: Manasi Navare
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 2 +-
>
== Series Details ==
Series: drm/i915: Add support for Kabylake to function obtaining shared PLL
URL : https://patchwork.freedesktop.org/series/12370/
State : failure
== Summary ==
Series 12370v1 drm/i915: Add support for Kabylake to function obtaining shared
PLL
https://patchwork.freedesktop
== Series Details ==
Series: Prep. for DP audio MST support (rev9)
URL : https://patchwork.freedesktop.org/series/11129/
State : success
== Summary ==
Series 11129v9 Prep. for DP audio MST support
https://patchwork.freedesktop.org/api/1.0/series/11129/revisions/9/mbox/
fi-bdw-5557u total
On Thu, 2016-09-08 at 13:02 -0700, Manasi Navare wrote:
> While configuring the pipe during modeset, it should use
> max clock and max lane count and reduce the bpp until
> the requested mode rate is less than or equal to
> available link BW.
> This is required to pass DP Compliance.
>
> v2:
> * R
This adds support for KBL in the new function added in commit ID:
commit that returns a
shared pll in case of DDI platforms.
Signed-off-by: Manasi Navare
---
drivers/gpu/drm/i915/intel_ddi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/d
Storing the port enum in intel_encoder makes it convenient to know the
port attached to an encoder. Moving the port information up from
intel_digital_port to intel_encoder avoids unecessary intel_digital_port
access and handles MST encoders cleanly without requiring conditional
checks for them (tha
On Fri, Sep 9, 2016 at 4:29 PM, Manasi Navare wrote:
> To support USB type C alternate DP mode, the display driver needs to
> know the number of lanes required by the DP panel as well as number
> of lanes that can be supported by the type-C cable. Sometimes, the
> type-C cable may limit the bandwi
On Fri, Sep 9, 2016 at 4:29 PM, Manasi Navare wrote:
> These static helper functions are required to be used within upfront
> link training related functions so they need to be placed at the top
> of the file.
>
> Signed-off-by: Manasi Navare
> ---
> drivers/gpu/drm/i915/intel_dp.c | 182
>
From: Robert Foss
Add subtest test_sync_merge that tests merging fences and the validity of the
resulting merged fence.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 67 +
1 file changed, 67 insertions(+)
From: Robert Foss
This subtest verifies merging a fence with itself does not fail.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/tests/sw_sync.c b/tests/sw_sync.c
index 00ac44b..db03f
From: Robert Foss
This subtest verifies that waiting on fences works properly.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/tests/sw_sync.c b/tests/sw_sync.c
index 851430e
From: Robert Foss
This subtest verifies that waiting, timing out on a wait and that counting
fences in various states works.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 66 +
1 file changed, 66 insertions
From: Robert Foss
This subtest verifies the access ordering of multiple consumer threads.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 103
1 file changed, 103 insertions(+)
diff --git a/tests/sw_sync.c
From: Robert Foss
This subtest runs a single consumer thread and multiple producer thread that
are synchronized using multiple timelines.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 139
1 file changed,
From: Robert Foss
This subtest verifies that creating many timelines and merging random fences
from each timeline with eachother results in merged fences that are fully
functional.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 73
From: Robert Foss
This subtest verifies that merging two fences works in the simples possible
case.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/tests/sw_sync.c b/tests/sw_sync.c
index 1
From: Robert Foss
Add subtest alloc_fence that verifies that it's possible to allocate a fence
on a timeline.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 16
1 file changed, 16 insertions(+)
diff --git a/tests/sw_sync.c b/tests/sw_sync.c
inde
From: Robert Foss
This test verifies that stressing the kernel by creating multiple
consumer/producer threads that wait on a single timeline to be incremented
by another conumer/producer thread does not fail.
And that the order amongst the threads is maintained.
Signed-off-by: Robert Foss
Revie
From: Robert Foss
This subtests tests that creating fences on negative timelines fail.
Signed-off-by: Robert Foss
Reviewed-by: Eric Engestrom
---
tests/sw_sync.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/tests/sw_sync.c b/tests/sw_sync.c
index a8c8ca4..102647d 100644
--- a/te
From: Robert Foss
Base functions to help testing the Sync File Framework (explicit fencing
mechanism ported from Android).
These functions allow you to create, use and destroy timelines and fences.
Signed-off-by: Robert Foss
Signed-off-by: Gustavo Padovan
Reviewed-by: Eric Engestrom
---
lib/
From: Robert Foss
This is a resubmission of v2.
This series implements the sw_sync test and the lib/sw_sync helper functions
for said test.
Gustavo Padovans sw_sync series was just de-staged in
gregkh-staging/staging-next [1], and this test is targeted at verifying the
functionality implemen
From: Robert Foss
Add initial tests for sw_sync.
Signed-off-by: Robert Foss
Signed-off-by: Gustavo Padovan
Reviewed-by: Eric Engestrom
---
tests/Makefile.sources | 1 +
tests/sw_sync.c| 51 ++
2 files changed, 52 insertions(+)
create
On Tue, 2016-09-06 at 15:07 +0300, Ville Syrjälä wrote:
> On Wed, Aug 24, 2016 at 12:22:57AM -0700, Dhinakaran Pandiyan wrote:
> > Storing the port enum in intel_encoder makes it convenient to know the
> > port attached to an encoder. Moving the port information up from
> > intel_digital_port to in
Em Seg, 2016-09-12 às 21:25 +0100, Chris Wilson escreveu:
> On Mon, Sep 12, 2016 at 05:02:56PM -0300, Paulo Zanoni wrote:
> >
> > Ever since I started working on FBC I was already aware that FBC
> > can
> > really amplify the FIFO underrun symptoms. On systems where FIFO
> > underruns were harmles
== Series Details ==
Series: (Final) tidying up of GuC code
URL : https://patchwork.freedesktop.org/series/12357/
State : success
== Summary ==
Series 12357v1 (Final) tidying up of GuC code
https://patchwork.freedesktop.org/api/1.0/series/12357/revisions/1/mbox/
Test kms_cursor_legacy:
On Mon, 2016-09-12 at 21:04 +0100, Chris Wilson wrote:
> On Mon, Sep 12, 2016 at 05:47:57PM +0300, Imre Deak wrote:
> > Even in an otherwise quiescent system there may be user/kernel
> > threads
> > independent of the test that add enough latency to make timing
> > sensitive
> > subtests fail. Boos
== Series Details ==
Series: drm/i915/fbc: disable FBC on FIFO underruns (rev3)
URL : https://patchwork.freedesktop.org/series/8575/
State : success
== Summary ==
Series 8575v3 drm/i915/fbc: disable FBC on FIFO underruns
https://patchwork.freedesktop.org/api/1.0/series/8575/revisions/3/mbox/
On Mon, Sep 12, 2016 at 05:02:56PM -0300, Paulo Zanoni wrote:
> Ever since I started working on FBC I was already aware that FBC can
> really amplify the FIFO underrun symptoms. On systems where FIFO
> underruns were harmless error messages, enabling FBC would cause the
> underruns to give black sc
Renaming to more consistent scheme, delete unused definitions
Signed-off-by: Dave Gordon
---
drivers/gpu/drm/i915/i915_guc_reg.h | 3 ---
drivers/gpu/drm/i915/intel_guc_loader.c | 27 ---
2 files changed, 16 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/dr
No functional changes; just renaming a bit, tweaking a datatype,
prettifying layout, and adding comments, in particular in the
GuC setup code that touches this data.
Signed-off-by: Dave Gordon
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_irq.c | 4 ++--
Renaming to more consistent scheme, and updating comments, mostly
about i915_guc_wq_reserve(), aka i915_guc_wq_check_space().
Signed-off-by: Dave Gordon
---
drivers/gpu/drm/i915/i915_guc_submission.c | 63 +++---
drivers/gpu/drm/i915/intel_guc.h | 2 +-
drivers
Mostly renaming the GuC functions to use a more consistent naming
scheme, along with updating comments to clarify some of the code.
Dave Gordon (3):
drm/i915: clarify PMINTRMSK/pm_intr_keep usage
drm/i915/guc: general tidying up (loader)
drm/i915/guc: general tidying up (submission)
driver
On Mon, Sep 12, 2016 at 05:47:57PM +0300, Imre Deak wrote:
> Even in an otherwise quiescent system there may be user/kernel threads
> independent of the test that add enough latency to make timing sensitive
> subtests fail. Boost the priority of such subtests to avoid these
> failures.
>
> This go
Ever since I started working on FBC I was already aware that FBC can
really amplify the FIFO underrun symptoms. On systems where FIFO
underruns were harmless error messages, enabling FBC would cause the
underruns to give black screens.
We recently tried to enable FBC on Haswell and got reports of
== Series Details ==
Series: drm/i915: use INTEL_GEN(dev_priv) wherever possible
URL : https://patchwork.freedesktop.org/series/12355/
State : success
== Summary ==
Series 12355v1 drm/i915: use INTEL_GEN(dev_priv) wherever possible
https://patchwork.freedesktop.org/api/1.0/series/12355/revisio
On Mon, Sep 12, 2016 at 04:48:51PM +0100, Tvrtko Ursulin wrote:
> > * able to defer doing this until we know the object would be
> > * swapped, but there is no way to do that yet.
> > */
> >-i915_vma_move_to_active(from->engine[RCS].state, req, 0);
Wherever we find "INTEL_INFO(dev)->gen", and have a suitable
"dev_priv" in scope, replace it with "INTEL_GEN(dev_priv)",
which is the preferred wasy to access this device property.
This is mostly achieved automatically by the following Coccinelle
script, with a little manual postprocessing of a fe
More Coccinellery ...
Wherever we find "INTEL_INFO(dev)->gen", and have a suitable
"dev_priv" in scope, replace it with "INTEL_GEN(dev_priv)",
which is the preferred wasy to access this device property.
This patch covers all the files that contained only relatively
few instances, and where no man
More Coccinellery, as described in part 1 of this series
Wherever we find "INTEL_INFO(dev)->gen", and have a suitable
"dev_priv" in scope, replace it with "INTEL_GEN(dev_priv)",
which is the preferred wasy to access this device property.
Occasionally this change also lets us remove a local variabl
More Coccinellery, as described in part 1 of this series
Wherever we find "INTEL_INFO(dev)->gen", and have a suitable
"dev_priv" in scope, replace it with "INTEL_GEN(dev_priv)",
which is the preferred wasy to access this device property.
This patch covers the files that required a little manual f
Hi
Em Sex, 2016-09-09 às 14:11 +0100, Chris Wilson escreveu:
> In the next patch we want to handle reset directly by a locked waiter
> in
> order to avoid issues with returning before the reset is handled. To
> handle the reset, we must first know whether we hold the
> struct_mutex.
> If we do not
Hi,
On 09/09/16 20:48, Dave Gordon wrote:
This just hides the existing obj->dirty flag inside a trivial inline
setter, to discourage non-GEM code from looking too closely. The
flag is renamed to emphasise that it is private to the GEM memory-
management code and ensure that no legacy code conti
On 12/09/16 10:44, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
This removes the usage of intel_ring_emit in favour of
directly writing to the ring buffer.
intel_ring_emit was preventing the compiler for optimising
fetch and increment of the current ring buffer pointer and
therefore generating v
Even in an otherwise quiescent system there may be user/kernel threads
independent of the test that add enough latency to make timing sensitive
subtests fail. Boost the priority of such subtests to avoid these
failures.
This got rid of sporadic failures in basic-cursor-vs-flip-legacy and
basic-cur
== Series Details ==
Series: drm/i915: Queue page flip work with high priority
URL : https://patchwork.freedesktop.org/series/12336/
State : success
== Summary ==
Series 12336v1 drm/i915: Queue page flip work with high priority
https://patchwork.freedesktop.org/api/1.0/series/12336/revisions/1
On Thu, Sep 8, 2016 at 6:30 AM, Maarten Lankhorst
wrote:
> Property lifetimes are equal to the device lifetime, so the separate
> drm_property_find is not needed. The pointer can be retrieved from
> the properties member, which saves us some locking and a extra lookup.
> The lifetime for propertie
On 07/09/16 15:45, Chris Wilson wrote:
Currently the presumption is that the request construction and its
submission to the GuC are all under the same holding of struct_mutex. We
wish to relax this to separate the request construction and the later
submission to the GuC. This requires us to rese
While user space has control over the scheduling priority of its page
flipping thread, the corresponding work the driver schedules for MMIO
flips always runs with normal scheduling priority. This would hinder an
application that wants more stringent guarantees over flip timing (to
avoid missing a f
Even in an otherwise quiescent system there may be user/kernel threads
independent of the test that add enough latency to make timing sensitive
subtests fail. Boost the priority of such subtests to avoid these
failures.
This got rid of sporadic failures in basic-cursor-vs-flip-legacy and
basic-cur
On 9/12/2016 1:53 PM, Patchwork wrote:
== Series Details ==
Series: Support for sustained capturing of GuC firmware logs (rev10)
URL : https://patchwork.freedesktop.org/series/7910/
State : failure
== Summary ==
Series 7910v10 Support for sustained capturing of GuC firmware logs
http://pat
Hey,
Op 09-09-16 om 10:01 schreef Kumar, Mahesh:
> From: Mahesh Kumar
>
> This patch implements new DDB allocation algorithm as per HW team
> suggestion. This algo takecare of scenario where we allocate less DDB
> for the planes with lower relative pixel rate, but they require more DDB
> to work.
From: Ville Syrjälä
Decode the PSR block (9) from VBT. Looks like the same block ID may have
been used for something else in the past, so a version check is also
needed.
The wakeup times part is still up in the air due to the spec not knowing
what it's saying, but let's do something that makes a
Op 12-09-16 om 13:02 schreef Maarten Lankhorst:
> Op 09-09-16 om 10:01 schreef Kumar, Mahesh:
>> From: Mahesh Kumar
>>
>> This patch implemnets Workarounds related to display arbitrated memory
>> bandwidth. These WA are applicabe for all gen-9 based platforms.
>>
>> Changes since v1:
>> - Rebase
Op 09-09-16 om 10:01 schreef Kumar, Mahesh:
> From: Mahesh Kumar
>
> This patch implemnets Workarounds related to display arbitrated memory
> bandwidth. These WA are applicabe for all gen-9 based platforms.
>
> Changes since v1:
> - Rebase on top of Paulo's patch series
>
> Signed-off-by: Mahesh
Op 09-09-16 om 10:01 schreef Kumar, Mahesh:
> From: Mahesh Kumar
>
> This patch implements new DDB allocation algorithm as per HW team
> suggestion. This algo takecare of scenario where we allocate less DDB
> for the planes with lower relative pixel rate, but they require more DDB
> to work.
> It
This patch exposes atomic commit flags to crtc_commit_atomic()
so that users of the macro may control the flags.
Cc: Daniel Vetter
Cc: Marius Vlad
Cc: Micah Fedke
Cc: Daniel Stone
Signed-off-by: Liu Ying
---
tests/kms_atomic.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions
== Series Details ==
Series: drm/i915: Emit to ringbuffer directly (rev3)
URL : https://patchwork.freedesktop.org/series/12186/
State : success
== Summary ==
Series 12186v3 drm/i915: Emit to ringbuffer directly
https://patchwork.freedesktop.org/api/1.0/series/12186/revisions/3/mbox/
Test kms_
== Series Details ==
Series: drm/i915: Ignore OpRegion panel type on Ivy Bridge + Mobile
URL : https://patchwork.freedesktop.org/series/12322/
State : warning
== Summary ==
Series 12322v1 drm/i915: Ignore OpRegion panel type on Ivy Bridge + Mobile
https://patchwork.freedesktop.org/api/1.0/seri
On Sat, 10 Sep 2016, Ville Syrjälä wrote:
> On Fri, Sep 09, 2016 at 07:51:15PM +, Zanoni, Paulo R wrote:
>> Em Sex, 2016-09-09 às 11:06 +0300, Jani Nikula escreveu:
>> > On Thu, 08 Sep 2016, Lyude Paul wrote:
>> > >
>> > > On Thu, 2016-09-08 at 11:59 +0300, Jani Nikula wrote:
>> > > >
>> >
From: Tvrtko Ursulin
This removes the usage of intel_ring_emit in favour of
directly writing to the ring buffer.
intel_ring_emit was preventing the compiler for optimising
fetch and increment of the current ring buffer pointer and
therefore generating very verbose code for every write.
It had n
On 7 July 2016 at 20:19, James Bottomley
wrote:
> On Thu, 2016-07-07 at 09:55 -0700, James Bottomley wrote:
>> On Thu, 2016-07-07 at 19:14 +0300, Ville Syrjälä wrote:
>> > On Tue, Jun 21, 2016 at 06:44:34PM +0300, Ville Syrjälä wrote:
>> > > On Tue, Jun 21, 2016 at 09:53:15AM -0400, James Bottomle
On Terra Mobile Ultrabook 1450 II (Core i5-3337U, i915 devid = 0x166),
the screen is tiled in many 480×320 screens (like a mosaic) since v4.7.
This laptop is simply unusable.
I have bisected the cause to commit a05628195a0d ("drm/i915: Get
panel_type from OpRegion panel details").
Like for Skylak
Op 09-09-16 om 10:00 schreef Kumar, Mahesh:
> From: Mahesh Kumar
>
> This patch make changes to use linetime latency instead of allocated
> DDB size during plane watermark calculation in switch case, This is
> required to implement new DDB allocation algorithm.
>
> In New Algorithm DDB is allocate
Allowing modeset may prevent the test case from failing in case the atomic
check phase finds the userspace doesn't allow modeset for the commit and
returns -EINVAL. A real case is to run the test case on imx-drm which
requires a full modeset when we change an active plane's configuration,
e.g., pi
On pe, 2016-09-09 at 21:02 +0100, Matthew Auld wrote:
> drm already provides fallback versions of readq and writeq.
>
> Signed-off-by: Matthew Auld
Reviewed-by: Joonas Lahtinen
Thanks for the patch, merging it in.
Regards, Joonas
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 5 -
> 1 fi
== Series Details ==
Series: Support for sustained capturing of GuC firmware logs (rev10)
URL : https://patchwork.freedesktop.org/series/7910/
State : failure
== Summary ==
Series 7910v10 Support for sustained capturing of GuC firmware logs
http://patchwork.freedesktop.org/api/1.0/series/7910/
== Series Details ==
Series: series starting with [CI,01/21] drm/i915: Add a sw fence for collecting
up dma fences
URL : https://patchwork.freedesktop.org/series/12241/
State : success
== Summary ==
Series 12241v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/122
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