Hey, Op 09-09-16 om 10:01 schreef Kumar, Mahesh: > From: Mahesh Kumar <mahesh1.ku...@intel.com> > > This patch implements new DDB allocation algorithm as per HW team > suggestion. This algo takecare of scenario where we allocate less DDB > for the planes with lower relative pixel rate, but they require more DDB > to work. > It also takes care of enabling same watermark level for each > plane, for efficient power saving. > > Changes since v1: > - Rebase on top of Paulo's patch series This breaks the kms_atomic_transition testcase. I'm getting a lot of CPU pipe (A,B,C) FIFO underrun error messages, and my DP-MST display won't turn on at all.
~Maarten _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
