Commit 791a32be6eb2 ("drm/i915: Drop intel_update_sprite_watermarks")
removes the use of this variable, but forgot to remove it.
Cc: Matt Roper
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 6 +-
drivers/gpu/drm/i915/intel_drv.h | 1 -
2 files changed, 1 in
This can be derived from the atomic state in pre_plane_update,
which makes it more clear when it's supposed to be called.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 28
drivers/gpu/drm/i915/intel_drv.h | 1 -
2 files changed, 20
By handling this after the atomic helper waits for vblanks there will
be one less wait for vblank in the atomic path.
Also get rid of the double wait_for_vblank on broadwell, looks like
it's a bug doing the vblank wait twice.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_atomi
On skylake some of the registers are only writable when the correct
power wells are enabled. Because of this watermarks have to be updated
before the crtc turns off, or you get unclaimed register read and write
warnings.
This patch needs to be modified slightly to apply to -fixes.
Bugzilla: https
Those platforms have the same bug as haswell, and the same fix applies to them.
Signed-off-by: Maarten Lankhorst
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91579
---
drivers/gpu/drm/i915/i915_irq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i9
This fixes a warning when the crtc is turned off. In that case fb
will be NULL, and crtc_clock will be 0. Because the crtc is no longer
active this is not a bug, and shouldn't trigger the WARN_ON.
Also remove handling a null crtc_state, with all transitional helpers
gone this can no longer happen.
This is already handled in pre_disable_primary, disabling it twice is useless.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 16 +---
drivers/gpu/drm/i915/intel_drv.h | 1 -
2 files changed, 1 insertion(+), 16 deletions(-)
diff --git a/drivers/gpu/
fb_bits is useful to have in the crtc_state for cs flips later on,
so keep it alive there. The other stuff can be calculated in
post_plane_update, and aren't useful elsewhere.
Currently there's a loop in post_plane_update, this should disappear
with the changes to atomic wm's. At that point only u
After fixing up some earlier patches it turns out I had to rework
the rest and improved the individual patches. There were some changes
in upstream, which meant I had to redo most of them.
The order of patches is slightly changed, the update watermark comes before
killing off wait_vblank because i
Parallel modesets are still not allowed, but this will allow updating
a different crtc during a modeset if the clock is not changed.
Additionally when all pipes are DPMS off the cdclk will be lowered
to the minimum allowed.
Changes since v1:
- Add dev_priv->active_crtcs for tracking which crtcs a
As the comment indicates this can only fail gracefully when
called from compute_config. Fortunately this is now what's happening,
so the fixme can be removed and the DRM_ERROR downgraded.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 10 +++---
1 file changed, 3
This removes another couple of hacks from intel_crtc->atomic, and
creates proper atomic state for it.
Changes since v1:
- Rebase on top of wm changes.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_atomic.c | 2 ++
drivers/gpu/drm/i915/intel_display.c | 41 +--
Don't use plane->state directly, use the pointer from commit_plane.
Changes since v1:
- Fix uses of plane->state->rotation and color key to use the passed state too.
- Only pass crtc_state and plane_state to update_plane.
Changes since v2:
- Rebased.
Signed-off-by: Maarten Lankhorst
---
drivers
This leaves intel_crtc->atomic empty, so zap it as well.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 84 ++--
drivers/gpu/drm/i915/intel_drv.h | 16 ---
2 files changed, 33 insertions(+), 67 deletions(-)
diff --git a/driver
Now that pixel clock is set to 0 when there are no active pipes it's
easy to set the bypass frequency for this case.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/intel_display.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_displ
On 11/02/2015 05:25 PM, Shobhit Kumar wrote:
The cdclock sanitization patch reviewed and merged at -
http://patchwork.freedesktop.org/patch/msgid/1445344992-14658-1-git-send-email-shobhit.ku...@intel.com
made the assumptions that DPLL should not be enabled when pre-os does not
enable display an
It seems that there are some gaps in the patch and first patch.
Like there is no this line in the first patch.
if (req->ring->seqno_barrier)
I have tried to apply this patch. And here is the cpu utilization and perf data
on BDW
CPU util | w/o patch | w/ patch
On 11/02/2015 11:48 PM, Thulasimani, Sivakumar wrote:
On 11/2/2015 11:17 PM, Kumar, Shobhit wrote:
On 11/02/2015 10:07 PM, Thulasimani, Sivakumar wrote:
On 11/2/2015 6:49 PM, Kumar, Shobhit wrote:
On 11/02/2015 06:40 PM, Jani Nikula wrote:
On Mon, 02 Nov 2015, Shobhit Kumar wrote:
SWF18
Although we can do a good job of reading out hardware state, the
graphics firmware may have programmed the watermarks in a creative way
that doesn't match how i915 would have chosen to program them. We
shouldn't trust the firmware's watermark programming, but should rather
re-calculate how we thin
Patches #3 and #4 here are the final two patches from the atomic watermark
series that was posted here:
http://lists.freedesktop.org/archives/intel-gfx/2015-September/076634.html
We had to pull those out when Jani reported a BDW boot regression (divide by
zero during watermark calculation). A
In addition to calculating final watermarks, let's also pre-calculate a
set of intermediate watermark values at atomic check time. These
intermediate watermarks are a combination of the watermarks for the old
state and the new state; they should satisfy the requirements of both
states which means
Our low-level watermark calculation functions don't get called when the
CRTC is disabled or the relevant plane is invisible, so they should
never see a zero htotal or zero bpp. However add some checks to ensure
this is true so that we don't wind up dividing by zero if we make a
mistake elsewhere i
When watermark calculation was moved up to the atomic check phase, the
code was updated to calculate based on in-flight atomic state rather
than already-committed state. However the hsw_compute_linetime_wm()
didn't get updated and continued to pull values out of the
currently-committed CRTC state.
In this subtest, as a first step, MAX_FENCES+1 number of framebuffers are
created backed up by objects that have multiple GGTT views (normal and
rotated). Next, we have the i915 driver instantiate a normal view followed
by a rotated view. We continue doing the above MAX_FENCES + 1 times.
Cc: Tvrtk
Just booted drm-next on a Skylake laptop that happened to be on my
desk for a few days.
I wasn't impressed. I'm very disappointed. Doesn't anyone have any
pride in the code they write anymore.
Initially the previous sentence had a lot of curse words and was Linus
like in it's stature, but I've be
On Mon, Nov 02, 2015 at 03:28:22PM +, Chris Wilson wrote:
> That should keep the worker alive for a further 10 jiffies, hopefully
> long enough for the next wait to occur. The cost is that it keeps the
> interrupt asserted (and to avoid that requires a little rearrangment and
> probably a dedic
So far, the i915 driver and some other drivers set it to the drm_device,
which doesn't allow one to know which DP a given aux channel is related
to. Changing this to be the drm_connector provides proper nesting, still
allowing one to get the drm_device from it. Some drivers already set it
to the dr
This module is heavily based on i2c-dev. Once loaded, it provides one
dev node per DP AUX channel, named drm_dp_auxN, where N is an integer.
It's possible to know which connector owns this aux channel by looking
at the respective sysfs /sys/class/drm_aux_dev/drm_dp_auxN/connector, if
the connector
This series implement support to a drm_dp_aux chardev that allows reading and
writing an arbitrary amount of bytes to arbitrary dpcd register addresses using
regular read, write and lseek operations.
Rafael Antognolli (2):
drm/dp: Add a drm_aux-dev module for reading/writing dpcd registers.
dr
From: Jim Bish
Signed-off-by: Jim Bish
---
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 0587bb2..15dd6fd 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b
On 11/2/2015 11:17 PM, Kumar, Shobhit wrote:
On 11/02/2015 10:07 PM, Thulasimani, Sivakumar wrote:
On 11/2/2015 6:49 PM, Kumar, Shobhit wrote:
On 11/02/2015 06:40 PM, Jani Nikula wrote:
On Mon, 02 Nov 2015, Shobhit Kumar wrote:
SWF18 is set if the display has been intialized by the pre-o
On 11/02/2015 10:07 PM, Thulasimani, Sivakumar wrote:
On 11/2/2015 6:49 PM, Kumar, Shobhit wrote:
On 11/02/2015 06:40 PM, Jani Nikula wrote:
On Mon, 02 Nov 2015, Shobhit Kumar wrote:
SWF18 is set if the display has been intialized by the pre-os. It
also gives what configuration is enabled o
Use the comparison macros to make debug output clearer.
v2: fix incorrect comparison
Signed-off-by: Thomas Wood
---
tests/kms_force_connector.c | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/tests/kms_force_connector.c b/tests/kms_force_connector.c
index 2
Signed-off-by: Thomas Wood
---
tests/kms_force_connector.c | 44 +++-
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git a/tests/kms_force_connector.c b/tests/kms_force_connector.c
index 1e5ec6f..2cb149a 100644
--- a/tests/kms_force_connector.c
+++
Signed-off-by: Thomas Wood
---
lib/igt_kms.c | 16
1 file changed, 16 insertions(+)
diff --git a/lib/igt_kms.c b/lib/igt_kms.c
index 51d735d..878e1fb 100644
--- a/lib/igt_kms.c
+++ b/lib/igt_kms.c
@@ -962,6 +962,15 @@ static int get_drm_plane_type(int drm_fd, uint32_t
plane_id)
Signed-off-by: Thomas Wood
---
tests/kms_force_connector.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/tests/kms_force_connector.c b/tests/kms_force_connector.c
index 7485ca8..f48b187 100644
--- a/tests/kms_force_connector.c
+++ b/tests/kms_force_connector.c
@@ -36,7 +3
Signed-off-by: Thomas Wood
---
tests/kms_force_connector.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/kms_force_connector.c b/tests/kms_force_connector.c
index f48b187..1e5ec6f 100644
--- a/tests/kms_force_connector.c
+++ b/tests/kms_force_connector.c
@@ -56,6 +56,7 @@ igt_main
On 2 November 2015 at 11:48, Thomas Wood wrote:
> Signed-off-by: Thomas Wood
> ---
> tests/kms_force_connector.c | 17 +
> 1 file changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/tests/kms_force_connector.c b/tests/kms_force_connector.c
> index 7485ca8..4ba1e0b 100644
>
On 11/2/2015 3:20 PM, Vandana Kannan wrote:
For render compression, userspace passes aux stride and offset values as an
additional entry in the fb structure. This should not be treated as garbage
and discarded as data belonging to no plane.
This patch introduces a check related to AUX plane to
On 11/2/2015 6:49 PM, Kumar, Shobhit wrote:
On 11/02/2015 06:40 PM, Jani Nikula wrote:
On Mon, 02 Nov 2015, Shobhit Kumar wrote:
SWF18 is set if the display has been intialized by the pre-os. It
also gives what configuration is enabled on which pipe. The DPLL and
CDCLK verification checks ca
On Mon, Nov 02, 2015 at 01:41:03PM +0100, Maarten Lankhorst wrote:
> Hey,
>
> Op 30-10-15 om 22:06 schreef ville.syrj...@linux.intel.com:
> > From: Ville Syrjälä
> >
> > This reverts commit b26a6b35581c84124bd78b68cc02d171fbd572c9.
> >
> > commit b26a6b35581c ("drm/i915: Make prepare_plane_fb ful
On Mon, Nov 02, 2015 at 02:57:47PM +, Gong, Zhipeng wrote:
> > -Original Message-
> > From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> > Sent: Monday, November 02, 2015 10:16 PM
> > To: Gong, Zhipeng
> > Cc: intel-gfx@lists.freedesktop.org; Rogozhkin, Dmitry V
> > Subject: Re: [PA
On Mon, Nov 02, 2015 at 04:14:08PM +0100, Robert Fekete wrote:
> Adds clarification of the rotation property bits. I.e. rotation is
> counter clockwise and that reflects are applied before any rotation.
>
> v2: Refer to the define names instead of the property values.
>
> Signed-off-b
Adds clarification of the rotation property bits. I.e. rotation is
counter clockwise and that reflects are applied before any rotation.
v2: Refer to the define names instead of the property values.
Signed-off-by: Robert Fekete
---
include/drm/drm_crtc.h | 6 +-
1 file changed, 5
On mån, 2015-11-02 at 16:50 +0200, Ville Syrjälä wrote:
> On Mon, Nov 02, 2015 at 03:24:15PM +0100, Robert Fekete wrote:
> > Adds clarification of the rotation property bits. I.e. rotation is
> > Counter clockwise and that reflects are applied before any rotation.
> >
> > Signed-off-by: Ro
On Mon, Nov 02, 2015 at 01:21:23PM +, Conselvan De Oliveira, Ander wrote:
> On Fri, 2015-10-30 at 18:47 +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > My Lenovo STM STDP3100 miniDP->VGA dongle doesn't seem to like it when
> > we try to start link training with non
On Mon, Nov 02, 2015 at 03:24:15PM +0100, Robert Fekete wrote:
> Adds clarification of the rotation property bits. I.e. rotation is
> Counter clockwise and that reflects are applied before any rotation.
>
> Signed-off-by: Robert Fekete
> ---
> include/drm/drm_crtc.h | 6 +-
> 1 file
Adds clarification of the rotation property bits. I.e. rotation is
Counter clockwise and that reflects are applied before any rotation.
Signed-off-by: Robert Fekete
---
include/drm/drm_crtc.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/include/drm/drm_crtc.h
On Mon, Nov 02, 2015 at 02:00:47PM +, Gong, Zhipeng wrote:
> Attach the perf data for BDW async1 and async5 with or without patch.
Hmm, I can see it is the i915_spin_request() consuming the time, but I
was hoping to get the callgraph so I could see where the call to
i915_wait_request was orig
On Mon, Nov 02, 2015 at 02:53:00PM +0100, Maarten Lankhorst wrote:
> Op 02-11-15 om 14:46 schreef Chris Wilson:
> > On Mon, Nov 02, 2015 at 02:13:48PM +0100, Maarten Lankhorst wrote:
> >> Op 29-10-15 om 01:30 schreef Matt Roper:
> >>> On Wed, Sep 23, 2015 at 01:27:12PM +0200, Maarten Lankhorst wrot
Op 02-11-15 om 14:06 schreef Chris Wilson:
> On Mon, Nov 02, 2015 at 01:57:59PM +0100, Maarten Lankhorst wrote:
>> struct_mutex is being locked for every plane in intel_prepare_plane_fb and
>> intel_cleanup_plane_fb. This can be optimized by acquiring struct_mutex first
>> before calling the atomic
Op 02-11-15 om 14:46 schreef Chris Wilson:
> On Mon, Nov 02, 2015 at 02:13:48PM +0100, Maarten Lankhorst wrote:
>> Op 29-10-15 om 01:30 schreef Matt Roper:
>>> On Wed, Sep 23, 2015 at 01:27:12PM +0200, Maarten Lankhorst wrote:
diff --git a/drivers/gpu/drm/i915/intel_overlay.c
b/drivers/g
On Mon, Nov 02, 2015 at 02:13:48PM +0100, Maarten Lankhorst wrote:
> Op 29-10-15 om 01:30 schreef Matt Roper:
> > On Wed, Sep 23, 2015 at 01:27:12PM +0200, Maarten Lankhorst wrote:
> >> diff --git a/drivers/gpu/drm/i915/intel_overlay.c
> >> b/drivers/gpu/drm/i915/intel_overlay.c
> >> index 4445426
On 27 October 2015 at 10:37, Tvrtko Ursulin
wrote:
>
> On 23/10/15 12:35, Daniel Vetter wrote:
>>
>> On Fri, Oct 23, 2015 at 09:51:06AM +0100, Tvrtko Ursulin wrote:
>>>
>>>
>>> Hi,
>>>
>>> On 23/10/15 02:34, Vivek Kasireddy wrote:
The main goal of this subtest is to trigger the following
On Fri, 2015-10-30 at 18:47 +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> My Lenovo STM STDP3100 miniDP->VGA dongle doesn't seem to like it when
> we try to start link training with non-zero vswing/preemphasis. So when
> the initial link training DPCD write fails, retry it
On 11/02/2015 06:40 PM, Jani Nikula wrote:
On Mon, 02 Nov 2015, Shobhit Kumar wrote:
SWF18 is set if the display has been intialized by the pre-os. It
also gives what configuration is enabled on which pipe. The DPLL and
CDCLK verification checks can fail as the pre-os does initialize the
DPLL f
Op 29-10-15 om 01:30 schreef Matt Roper:
> On Wed, Sep 23, 2015 at 01:27:12PM +0200, Maarten Lankhorst wrote:
>> Make pinning and waiting a separate step, and wait for object idle
>> without struct_mutex held.
>>
>> Signed-off-by: Maarten Lankhorst
>> ---
>> drivers/gpu/drm/i915/i915_drv.h
Hi Shubhangi,
[auto build test WARNING on drm-intel/for-linux-next -- if it's inappropriate
base, please suggest rules for selecting the more suitable base]
url:
https://github.com/0day-ci/linux/commits/Shubhangi-Shrivastava/Fixing-sink-count-related-detection-over/20151102-205435
c
On Mon, 02 Nov 2015, Shobhit Kumar wrote:
> SWF18 is set if the display has been intialized by the pre-os. It
> also gives what configuration is enabled on which pipe. The DPLL and
> CDCLK verification checks can fail as the pre-os does initialize the
> DPLL for Audio codec initialization. So fisr
Hi Shubhangi,
[auto build test WARNING on drm-intel/for-linux-next -- if it's inappropriate
base, please suggest rules for selecting the more suitable base]
url:
https://github.com/0day-ci/linux/commits/Shubhangi-Shrivastava/Fixing-sink-count-related-detection-over/20151102-205435
c
On Mon, Nov 02, 2015 at 01:57:59PM +0100, Maarten Lankhorst wrote:
> struct_mutex is being locked for every plane in intel_prepare_plane_fb and
> intel_cleanup_plane_fb. This can be optimized by acquiring struct_mutex first
> before calling the atomic helpers. This way the lock only needs to be acq
struct_mutex is being locked for every plane in intel_prepare_plane_fb and
intel_cleanup_plane_fb. This can be optimized by acquiring struct_mutex first
before calling the atomic helpers. This way the lock only needs to be acquired
twice in ->atomic_commit(). Once for pinning new framebuffers at th
This patch checks for changes in sink count between short pulse
hpds and forces full detect when there is a change.
This will allow both detection of hotplug and unplug of panels
through dongles that give only short pulse for such events.
v2: changed variable type from u8 to bool (Jani)
retur
Sink count can change between short pulse hpd hence this patch
adds a member variable to intel_dp so we can track any changes
between short pulse interrupts.
Signed-off-by: Sivakumar Thulasimani
Signed-off-by: Shubhangi Shrivastava
---
drivers/gpu/drm/i915/intel_dp.c | 7 +++
drivers/gpu/d
This patch moves probing for panel, DPCD read etc to another
function intel_dp_long_pulse, while intel_dp_detect returns
the status as connected or disconnected depending on
whether the edid is available or not.
This change will be required by further patches in the series
to avoid performing multi
Current DP detection has DPCD operations split across
intel_dp_hpd_pulse and intel_dp_detect which contains
duplicates as well. Also intel_dp_detect is called
during modes enumeration as well which will result
in multiple dpcd operations. So this patch tries
to solve both these by bringing all DPCD
The link retraining part when EQ is not correct is
retained to intel_dp_check_link_status whereas other
operations are handled as part of intel_dp_short_pulse.
This change is required to avoid performing all DPCD
related operations on performing link retraining.
Signed-off-by: Sivakumar Thulasiman
This patch reads sink_count dpcd always and removes its
read operation based on values in downstream port dpcd.
SINK_COUNT dpcd is not dependent on DOWNSTREAM_PORT_PRESENT dpcd.
SINK_COUNT denotes if a display is attached, while
DOWNSTREAM_PORT_PRESET indicates how many ports are available
in the
This patch set cleans up DP detection logic to bring all DPCD
operations at one place and to create a clear demarcation
between handling of long and short pulses. This simplifies
fixing of sink count related detection for DP panels.
Patches:
1. First two patches clean up intel_dp_detect and form a
Hey,
Op 30-10-15 om 22:06 schreef ville.syrj...@linux.intel.com:
> From: Ville Syrjälä
>
> This reverts commit b26a6b35581c84124bd78b68cc02d171fbd572c9.
>
> commit b26a6b35581c ("drm/i915: Make prepare_plane_fb fully interruptible.")
> breaks GPU reset on gen3/4 machines. Go back to to non-interr
This avoids compiler warnings about invalid enum values.
Signed-off-by: Thomas Wood
---
lib/igt_kms.h | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/lib/igt_kms.h b/lib/igt_kms.h
index 09c08aa..965c47c 100644
--- a/lib/igt_kms.h
+++ b/lib/igt_kms.h
@@ -40,6 +40,7 @@
/
Signed-off-by: Thomas Wood
---
benchmarks/gem_exec_reloc.c | 2 --
overlay/gem-interrupts.c| 7 +--
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/benchmarks/gem_exec_reloc.c b/benchmarks/gem_exec_reloc.c
index 5be482a..2ef6df5 100644
--- a/benchmarks/gem_exec_reloc.c
+++
Signed-off-by: Thomas Wood
---
debugger/eudb.c | 2 +-
lib/igt_core.c | 2 +-
tests/gem_madvise.c | 2 +-
tests/pm_rpm.c | 2 +-
tests/testdisplay.c | 2 +-
tools/intel_display_poller.c | 2 +-
tools/intel_gpu_frequency.c | 2 +-
7 files
Signed-off-by: Thomas Wood
---
tests/kms_frontbuffer_tracking.c | 1 -
tests/pm_lpsp.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
index 15707b9..13b91ad 100644
--- a/tests/kms_frontbuffer_tracking.c
+++
Signed-off-by: Thomas Wood
---
tests/gem_render_linear_blits.c | 2 --
tests/gem_render_tiled_blits.c | 2 --
tests/kms_3d.c | 2 --
tests/kms_force_connector.c | 2 --
4 files changed, 8 deletions(-)
diff --git a/tests/gem_render_linear_blits.c b/tests/gem_render_linear_bl
Initialization was included in commit a976d7e (tests/kms_fbc_crc: refactor
context
handling code), but won't be executed since it is declared before the first
label within a switch statement.
kms_fbc_crc.c:178:2: warning: ‘context’ may be used uninitialized in this
function [-Wmaybe-uninitialize
Make subtest results easier to identify by making them bold when the output
is a terminal.
Signed-off-by: Thomas Wood
---
lib/igt_core.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/lib/igt_core.c b/lib/igt_core.c
index 59127ca..7123455 100644
--- a/lib/igt_cor
Signed-off-by: Thomas Wood
---
tests/kms_force_connector.c | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/tests/kms_force_connector.c b/tests/kms_force_connector.c
index 7485ca8..4ba1e0b 100644
--- a/tests/kms_force_connector.c
+++ b/tests/kms_force_connecto
SWF18 is set if the display has been intialized by the pre-os. It
also gives what configuration is enabled on which pipe. The DPLL and
CDCLK verification checks can fail as the pre-os does initialize the
DPLL for Audio codec initialization. So fisrt check if SWF18 is set and
then follow through wit
The cdclock sanitization patch reviewed and merged at -
http://patchwork.freedesktop.org/patch/msgid/1445344992-14658-1-git-send-email-shobhit.ku...@intel.com
made the assumptions that DPLL should not be enabled when pre-os does not
enable display and if it does then verify that the cdclock is co
On Mon, 02 Nov 2015, "Gore, Tim" wrote:
>> -Original Message-
>> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
>> Vetter
>> Sent: Friday, October 30, 2015 4:11 PM
>> To: Gore, Tim
>> Cc: intel-gfx@lists.freedesktop.org
>> Subject: Re: [Intel-gfx] [PATCH] drm/i915:
On Mon, Nov 02, 2015 at 11:26:29AM +, Gong, Zhipeng wrote:
> > -Original Message-
> > From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> > Sent: Monday, November 02, 2015 5:59 PM
> > To: Gong, Zhipeng
> > Cc: intel-gfx@lists.freedesktop.org; Rogozhkin, Dmitry V
> > Subject: Re: [PAT
> -Original Message-
> From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> Sent: Monday, November 02, 2015 5:59 PM
> To: Gong, Zhipeng
> Cc: intel-gfx@lists.freedesktop.org; Rogozhkin, Dmitry V
> Subject: Re: [PATCH] RFC drm/i915: Slaughter the thundering
> i915_wait_request herd
>
> On
Op 27-10-15 om 16:58 schreef Robert Fekete:
> Extends i915_display_info so that for each active crtc also print
> all planes associated with the pipe. This patch shows information
> about each plane wrt format, size, position, rotation, and scaling.
> This is very useful when debugging user space c
Yeah, very likely. I wonder, how easy is to negotiate issue with inter-ring
synchronization on BDW in the expectation of KMD Scheduler from John Harrison?
-Original Message-
From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
Sent: Monday, November 2, 2015 12:53 PM
To: Gong, Zhipeng
Cc:
Hi Vandana,
[auto build test WARNING on drm/drm-next -- if it's inappropriate base, please
suggest rules for selecting the more suitable base]
url:
https://github.com/0day-ci/linux/commits/Vandana-Kannan/drm-Add-aux-plane-verification-in-addFB2/20151102-172316
reproduce: make htmldocs
Tim Gore
Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Friday, October 30, 2015 4:11 PM
> To: Gore, Tim
> Cc: intel-gfx@lists.freedesktop.org
On Mon, Nov 02, 2015 at 05:39:54AM +, Gong, Zhipeng wrote:
> Chris-
>
> The patch cannot be applied on the latest drm-intel-nightly directly.
> I modified it a little bit to make it applied.
> The patch can help much in HSW, but a little bit in BDW.
> The test is to transcode 26 streams, whic
On Mon, Nov 02, 2015 at 05:39:54AM +, Gong, Zhipeng wrote:
> Chris-
>
> The patch cannot be applied on the latest drm-intel-nightly directly.
> I modified it a little bit to make it applied.
> The patch can help much in HSW, but a little bit in BDW.
> The test is to transcode 26 streams, whic
On 31/10/15 01:45, Vivek Kasireddy wrote:
Hi Tvrtko,
On Fri, 30 Oct 2015 10:22:08 +
Tvrtko Ursulin wrote:
On 30/10/15 01:44, Vivek Kasireddy wrote:
The main goal of this subtest is to trigger the following warning in
the function i915_gem_object_get_fence():
if (WARN_ON(!obj->m
Gen9 has had demonstrated cases where forcing a not ready gpu
into reset has caused system hang [1].
Gen8 has never to this date demonstrated such behaviour.
In our CI tests there have been two cases of bsw ending in a state
where it claims it is not ready for reset, based on reset request,
after
For render compression, userspace passes aux stride and offset values as an
additional entry in the fb structure. This should not be treated as garbage
and discarded as data belonging to no plane.
This patch introduces a check related to AUX plane to support the
scenario of render compression.
Sug
On Sat, 31 Oct 2015, Ioan-Adrian Ratiu wrote:
> One branch of the if clause uses pr_info, the other pr_err; change
> the 'false' branch to also use pr_info. This minor oversight has gone
> unfixed since the initial vga_switcheroo implementation in 6a9ee8af.
>
> Signed-off-by: Ioan-Adrian Ratiu
P
Op 29-10-15 om 18:58 schreef Zanoni, Paulo R:
> Em Qui, 2015-10-29 às 13:59 +0100, Maarten Lankhorst escreveu:
>> Op 27-10-15 om 17:50 schreef Paulo Zanoni:
>>> These things can't change without a full modeset.
>> False! Fastset can update parameters too. Although I don't think it
>> currently prev
Hey,
Op 30-10-15 om 22:06 schreef ville.syrj...@linux.intel.com:
> From: Ville Syrjälä
>
> This reverts commit b26a6b35581c84124bd78b68cc02d171fbd572c9.
>
> commit b26a6b35581c ("drm/i915: Make prepare_plane_fb fully interruptible.")
> breaks GPU reset on gen3/4 machines. Go back to to non-interr
> From: Mika Kuoppala [mailto:mika.kuopp...@linux.intel.com]
> Chris Wilson writes:
> > So you are saying that's there no bugzilla for this... :-p
>
> Bugzilla fairy might surprise us after a good weekend rest.
https://bugs.freedesktop.org/show_bug.cgi?id=92774
Regards,
Tomi
On Fri, 30 Oct 2015, Clint Taylor wrote:
> On 10/30/2015 05:50 AM, Jani Nikula wrote:
>> Reported-by: Keith Webb
>> Suggested-by: Keith Webb
>> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=106671
>> Signed-off-by: Jani Nikula
>> ---
>> drivers/gpu/drm/i915/intel_display.c | 3 +++
>>
On Fri, 30 Oct 2015, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> My Lenovo STM STDP3100 miniDP->VGA dongle doesn't seem to like it when
> we try to start link training with non-zero vswing/preemphasis. So when
> the initial link training DPCD write fails, retry it with zero valu
Hi everyone.
I've been some hardlock problems when switching from the HDMI connection of
my monitor (connected to another PC) and the displayport (connected to the
problematic PC), several times a week at least.
In an effort to narrow down the problem I've been tried looking at drm
modeset debug
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