Hi Dave,
One more round of drm-misc, again mostly atomic. Big thing is the
userspace blob code from Daniel Stone, with support for the mode_id blob
now added to the atomic ioctl. Finally we can do atomic modesets!
Note that the atomic ioctl is still behind the module knob since the
weston patches
On Wed, 27 May 2015, Paulo Zanoni wrote:
> 2015-05-07 14:38 GMT-03:00 Damien Lespiau :
>> Right now, when finishing the cycle with odd dividers without finding a
>> suitable candidate, we end up in an infinite loop. Make sure to break in
>> that case.
>
> Cc stable?
No, fixes for platforms that r
On Wed, May 27, 2015 at 02:06:27PM +0200, Daniel Vetter wrote:
> On Tue, May 26, 2015 at 08:22:39PM +0300, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Expecting CHV power wells to be just an extended versions of the VLV
> > power wells, a bunch of commented out power well
On Wed, 27 May 2015, jim.br...@linux.intel.com wrote:
> From: Jim Bride
>
> According to the HSW b-spec we need to try clock divisors of 63
> and 72, each 3 or more times, when attempting DP AUX channel
> communication on a server chipset. This actually wasn't happening
> due to a short-circuit t
On Wed, May 20, 2015 at 03:38:13PM +0200, Maarten Lankhorst wrote:
> The primary plane can still be configured when crtc is off,
> furthermore this is also a noop now that affected planes are
> added on modesets.
>
> Signed-off-by: Maarten Lankhorst
This was added in patch #2. Can we squash thi
2015-05-27 18:39 GMT-03:00 Paulo Zanoni :
> 2015-05-07 14:38 GMT-03:00 Damien Lespiau :
>> Currently, if an odd divider improves the deviation (minimizes it), we
>> take that divider. The recommendation is to prefer even dividers.
>
> The doc says "It is preferred to get as close to the DCO central
2015-05-27 18:28 GMT-03:00 Paulo Zanoni :
> 2015-05-07 14:38 GMT-03:00 Damien Lespiau :
>> The HW validation team came back from further testing with a slightly
>> changed constraint on the deviation between the DCO frequency and the
>> central frequency. Instead of +-4%, it's now +1%/-6%.
>>
>> Un
Do we have an idea when this patch series will be reviewed? Customers
are awaiting for this to be merged to the drm-intel fd.o repository.
Cheers
On 05/22/2015 01:22 AM, Mika Kahola wrote:
> This patch series rebases Ville's original cdclk patch series
> excluding the ones that are already
2015-05-07 14:38 GMT-03:00 Damien Lespiau :
> Currently, if an odd divider improves the deviation (minimizes it), we
> take that divider. The recommendation is to prefer even dividers.
The doc says "It is preferred to get as close to the DCO central
frequency as possible, but using an even divider
2015-05-07 14:38 GMT-03:00 Damien Lespiau :
> The HW validation team came back from further testing with a slightly
> changed constraint on the deviation between the DCO frequency and the
> central frequency. Instead of +-4%, it's now +1%/-6%.
>
> Unfortunately, the previous algorithm didn't quite
On Wed, May 27, 2015 at 10:52:34AM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> These are the display call sites so should use the proper helper.
>
> Also requires intel_plane_obj_offset to assume normal view when
> plane pointer is not available.
Eugh. If only the plane stored the o
On Wed, May 27, 2015 at 1:14 PM, Paulo Zanoni wrote:
> 2015-05-27 17:06 GMT-03:00 Rodrigo Vivi :
>> On Wed, May 27, 2015 at 12:42 PM, Paulo Zanoni wrote:
>>> 2015-05-27 16:35 GMT-03:00 Rodrigo Vivi :
I didn't face this since I was letting IPS disabled on my tests here
and the platforms
2015-05-27 17:06 GMT-03:00 Rodrigo Vivi :
> On Wed, May 27, 2015 at 12:42 PM, Paulo Zanoni wrote:
>> 2015-05-27 16:35 GMT-03:00 Rodrigo Vivi :
>>> I didn't face this since I was letting IPS disabled on my tests here
>>> and the platforms that I'm mostly concerned about sink CRC not working
>>> wel
On Wed, May 27, 2015 at 12:42 PM, Paulo Zanoni wrote:
> 2015-05-27 16:35 GMT-03:00 Rodrigo Vivi :
>> I didn't face this since I was letting IPS disabled on my tests here
>> and the platforms that I'm mostly concerned about sink CRC not working
>> well are the ones that doesn't have IPS.
>>
>> I'm
2015-05-07 14:38 GMT-03:00 Damien Lespiau :
> The orignal code started by storing the actual central frequency (in Hz,
> using a uint64_t) in a uint32_t which codes for the register value. That
> can't be right.
>
> Signed-off-by: Damien Lespiau
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 2 --
>
2015-05-07 14:38 GMT-03:00 Damien Lespiau :
> Those functions were the only one in existence when they were
> introduced. We now now they are only valid for HSW/BDW.
s/now now/now know/
Reviewed-by: Paulo Zanoni
>
> Signed-off-by: Damien Lespiau
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 25 +
2015-05-27 16:35 GMT-03:00 Rodrigo Vivi :
> I didn't face this since I was letting IPS disabled on my tests here
> and the platforms that I'm mostly concerned about sink CRC not working
> well are the ones that doesn't have IPS.
>
> I'm not sure this is the right way to solve this issue. Maybe we w
I didn't face this since I was letting IPS disabled on my tests here
and the platforms that I'm mostly concerned about sink CRC not working
well are the ones that doesn't have IPS.
I'm not sure this is the right way to solve this issue. Maybe we want
to know the sink CRC when IPS is on.
I believe
2015-05-07 14:38 GMT-03:00 Damien Lespiau :
> abs_diff() properly protects its parameters, so no need for the outer ()
> here.
Patches 3, 4, 5, 6, 7 and 8:
Reviewed-by: Paulo Zanoni
>
> Signed-off-by: Damien Lespiau
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 2 +-
> 1 file changed, 1 insertion
2015-05-07 14:38 GMT-03:00 Damien Lespiau :
> We now have a special macro for those cases.
I'm not sure if this patch is an improvement. Before it, we always
knew which "switch" statement was bad since we used to print either
"PDiv" or "KDiv". After the patch, it will not be possible to know
from
On 22/05/2015 18:05, Mika Kuoppala wrote:
During review of dynamic page tables series, I was able
to hit a lite restore bug with execlists. I assume that
due to incorrect pd, the batch run out of legit address space
and into the scratch page area. The ACTHD was increasing
due to scratch being all
2015-05-07 14:38 GMT-03:00 Damien Lespiau :
> Right now, when finishing the cycle with odd dividers without finding a
> suitable candidate, we end up in an infinite loop. Make sure to break in
> that case.
Cc stable?
Reviewed-by: Paulo Zanoni
>
> Signed-off-by: Damien Lespiau
> ---
> drivers/
From: Jim Bride
According to the HSW b-spec we need to try clock divisors of 63
and 72, each 3 or more times, when attempting DP AUX channel
communication on a server chipset. This actually wasn't happening
due to a short-circuit that only checked the DP_AUX_CH_CTL_DONE bit
in status rather than
* Peter Zijlstra wrote:
> > As it is currently the kernel doesn't need to know anything about the
> > semantics of individual counters being selected, so it's currently
> > convenient
> > that we can aim to maintain all the counter meta data we have in userspace
> > according to the changing
Unit test to check a segfaulting subtest is handled correctly.
v2: Added script to check subtest results
v3: Removed script. Updated test to use fork to monitor return status.
Signed-off-by: Derek Morton
---
lib/tests/Makefile.sources | 1 +
lib/tests/igt_segfault.c | 139 ++
On Thu, May 21, 2015 at 12:17:48AM +0100, Robert Bragg wrote:
> >
> > So for me the 'natural' way to represent this in perf would be through
> > event groups. Create a perf event for every single event -- yes this is
> > 53 events.
>
> So when I was first looking at this work I had considered the
This patch utilizes piglit's new --no-retry option. That option
prevents incomplete tests from being retried when resuming a
test run. This is necessary because retrying tests that cause
a crash or reboot prevents a test run from being resumed.
This patch also adds -s to the piglit command line. T
tree: git://anongit.freedesktop.org/drm-intel topic/drm-misc
head: 5ceecb2fa720c01a97e6fa2353c2b8f1e8d69f1f
commit: 955f3c334f0fb2b843efad5cc6d3b7e141e9d666 [17/19] drm/atomic: Add
MODE_ID property
reproduce: make htmldocs
All warnings:
Warning(drivers/gpu/drm/i915/i915_irq.c:484): No des
Abandoning this patch because the piglit patch on which it depends was not
accepted. I will submit a new patch that uses the approved piglit change.
From: Mason, Michael W
Sent: Monday, May 18, 2015 2:59 PM
To: intel-gfx@lists.freedesktop.org
Cc: Mason, Mic
tree: git://anongit.freedesktop.org/drm-intel topic/drm-misc
head: 5ceecb2fa720c01a97e6fa2353c2b8f1e8d69f1f
commit: 99cf4a29fa24461bbfe22125967188a18383eb5c [16/19] drm/atomic: Add
current-mode blob to CRTC state
reproduce: make htmldocs
All warnings:
Warning(drivers/gpu/drm/i915/i915_irq
On Tue, May 26, 2015 at 04:48:40AM +, Jindal, Sonika wrote:
> Thanks for sending this.. I realized that I had a patch for this which I
> never sent :)
>
> Reviewed-by: Sonika Jindal
Pushed, thanks for the patch and review. Probably a good time to start
thinking about applying for an fdo acc
>-Original Message-
>From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
>Sent: Wednesday, May 27, 2015 1:20 PM
>To: Morton, Derek J
>Cc: intel-gfx@lists.freedesktop.org; Wood, Thomas
>Subject: Re: [Intel-gfx] [PATCH i-g-t v2] lib/tests/igt_segfault.c Add unit
>
On Wed, May 27, 2015 at 03:03:43PM +0300, Jani Nikula wrote:
> Add platform specific functions to decipher the register contents
> instead of just returning the shift value. Use macros instead of magic
> numbers to look at the register bits.
>
> As a side effect, if an unsupported port is passed,
On Wed, May 27, 2015 at 02:41:29PM +0200, Daniel Vetter wrote:
> On Wed, May 27, 2015 at 03:03:43PM +0300, Jani Nikula wrote:
> > Add platform specific functions to decipher the register contents
> > instead of just returning the shift value. Use macros instead of magic
> > numbers to look at the r
On 05/26/2015 02:37 PM, Jani Nikula wrote:
> On Sat, 23 May 2015, Antti Koskipaa wrote:
>> This is a basic sanity test of the backlight sysfs interface.
>>
>> Issue: VIZ-3377
>> Signed-off-by: Antti Koskipaa
>> ---
>> tests/.gitignore | 1 +
>> tests/Makefile.sources | 1 +
>> tests/pm
On Tue, May 26, 2015 at 02:20:00PM -0700, Bob Paauwe wrote:
> On Thu, 21 May 2015 10:37:07 +0200
> Daniel Vetter wrote:
>
> > On Wed, May 20, 2015 at 10:07:58AM -0700, Bob Paauwe wrote:
> > > On Fri, 15 May 2015 12:39:20 +0300
> > > Ville Syrjälä wrote:
> > >
> > > > On Tue, Feb 24, 2015 at 09:
On Wed, May 27, 2015 at 10:34:26AM +0100, Derek Morton wrote:
> Unit test to check a segfaulting subtest is handled correctly.
>
> v2: Added script to check subtest results
>
> Signed-off-by: Derek Morton
> ---
> lib/tests/Makefile.sources | 3 ++
> lib/tests/igt_segfault.c| 57 ++
On Wed, May 27, 2015 at 11:03:09AM +0300, Jani Nikula wrote:
> On Tue, 26 May 2015, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > chv_enable_pll() doesn't need to hold sb_lock for the entire duration of
> > the function. Drop the lock as soon as possible.
> >
> > valleyview_
On Tue, May 26, 2015 at 08:27:23PM +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> The primary plane frobbing was removed from the sprite code in
> commit ecce87ea3ab55ad0dc64460e6422c357d158a55e
> Author: Maarten Lankhorst
> Date: Tue Apr 21 17:12:50 2015 +0300
>
>
On Tue, May 26, 2015 at 08:22:39PM +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Expecting CHV power wells to be just an extended versions of the VLV
> power wells, a bunch of commented out power wells were added in
> anticipation when Punit folks would implement it all. T
The hotplug callbacks for DP and DDI effectively did nothing. Remove
them.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_ddi.c | 15 ---
drivers/gpu/drm/i915/intel_dp.c | 7 ---
2 files changed, 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/driver
Not needed or used.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dsi.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 51966426addf..3a93cdac757a 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/dr
There are plenty of hotplug related fields in struct drm_i915_private
scattered all around. Group them under one hotplug struct. Clean up
naming while at it. No functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_dma.c | 8 ++--
drivers/gpu/drm/i915/i915_drv.c | 12 ++
Add platform specific functions to decipher the register contents
instead of just returning the shift value. Use macros instead of magic
numbers to look at the register bits.
As a side effect, if an unsupported port is passed, consistently return
false (indicating short hotplug) instead of returni
Trying to make the hotplug code a bit nicer to work with. Hopefully more
to follow.
BR,
Jani.
Jani Nikula (7):
drm/i915: reduce indent in i9xx_hpd_irq_handler
drm/i915: reduce duplicate conditions in i9xx_hpd_irq_handler
drm/i915: reduce indent in intel_hpd_irq_handler
drm/i915: group al
Bail out early if nothing to do. No functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_irq.c | 35 ++-
1 file changed, 18 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index
Continue to loop early if there's nothing to do. No functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_irq.c | 49 ++---
1 file changed, 26 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm
On Tue, May 26, 2015 at 04:47:45PM +, Morton, Derek J wrote:
> -Original Message-
> From: daniel.vet...@ffwll.ch [mailto:daniel.vet...@ffwll.ch] On Behalf Of
> Daniel Vetter
> Sent: Tuesday, May 26, 2015 4:27 PM
> To: Morton, Derek J
> Cc: intel-gfx; Wood, Thomas
> Subject: Re: [Intel-
Move dp aux irq handling within the same branch instead of duplicating
the conditions. No functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_irq.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/dr
On Tue, May 26, 2015 at 09:16:11PM +0100, Chris Wilson wrote:
> On Tue, May 26, 2015 at 05:25:48PM +0200, Daniel Vetter wrote:
> > On Tue, May 26, 2015 at 03:21:22PM +0100, Michel Thierry wrote:
> > > There are some allocations that must be only referenced by 32bit
> > > offsets.
>
> > > To limit
Hi Dave, here's a drm regression fix for drivers only partially
converted to atomic.
BR,
Jani.
The following changes since commit 030bbdbf4c833bc69f502eae58498bc5572db736:
Linux 4.1-rc3 (2015-05-10 15:12:29 -0700)
are available in the git repository at:
git://anongit.freedesktop.org/drm-i
On Tue, May 26, 2015 at 05:21:56PM -0700, Rodrigo Vivi wrote:
> On Thu, May 21, 2015 at 5:04 AM, Animesh Manna
> wrote:
> > Naming convention of csr firmware will be -
> > _dmc__.bin
> >
> > Accordingly updated the same in code.
> >
> > Signed-off-by: Animesh Manna
> > ---
> > drivers/gpu/drm/i
On Thu, May 21, 2015 at 12:44:53PM +0300, David Weinehall wrote:
> tests/gem_ctx_param_basic: Expand ctx_param tests
>
> Expand the context parameter tests to cover the
> no-zeromap parameter.
>
> Signed-off-by: David Weinehall
> ---
> gem_ctx_param_basic.c | 24 +++-
> 1
On Wed, May 27, 2015 at 07:54:44AM +, Zou, Nanhai wrote:
> > -Original Message-
> > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> > Of
> > Daniel Vetter
> > Sent: Thursday, May 21, 2015 12:01 AM
> > To: Chris Wilson; intel-gfx
> > Subject: Re: [Intel-gfx]
On Wed, May 27, 2015 at 07:30:01AM +0200, Maarten Lankhorst wrote:
> Hey,
>
> Op 20-05-15 om 18:04 schreef maarten.lankho...@linux.intel.com:
> > From: Ander Conselvan de Oliveira
> >
> > To make this work we load the new hardware state into the
> > atomic_state, then swap it with the sw state.
>
On Wed, May 27, 2015 at 12:49:52PM +0300, Jani Nikula wrote:
> On Mon, 27 Apr 2015, Michel Thierry wrote:
> > commit 53292cdb066950611e5bc2e0eb109c7edb42af78 ("drm/i915: Workaround
> > to avoid lite restore with HEAD==TAIL") added a check for req0 != null
> > which is unnecessary.
> >
> > The only
From: Tvrtko Ursulin
These are the display call sites so should use the proper helper.
Also requires intel_plane_obj_offset to assume normal view when
plane pointer is not available.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_display.c | 8 +---
drivers/gpu/drm/i915/inte
From: Tvrtko Ursulin
Makes it a little bit more debug friendly not having to
remember which number is what.
Signed-off-by: Tvrtko Ursulin
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_debugfs.c | 11 ++-
drivers/gpu/drm/i915/i915_gem_gtt.c | 11 +++
drivers/gpu/drm/i915/i9
From: Tvrtko Ursulin
Printing it for PPGTT VMAs only adds noise since we have defined
view types are only applicable for GGTT.
Signed-off-by: Tvrtko Ursulin
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_debugfs.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --g
On Mon, 27 Apr 2015, Michel Thierry wrote:
> commit 53292cdb066950611e5bc2e0eb109c7edb42af78 ("drm/i915: Workaround
> to avoid lite restore with HEAD==TAIL") added a check for req0 != null
> which is unnecessary.
>
> The only way req0 could be null is if the list was empty, and this is
> already a
On Wed, May 27, 2015 at 06:21:24PM +0900, Michel Dänzer wrote:
> On 27.05.2015 18:04, Daniel Vetter wrote:
> > These should be functionally equivalent to the older per/post modeset
> > functions, except that they block out drm_vblank_get right away.
> > There's only the clock adjusting code (outsid
Unit test to check a segfaulting subtest is handled correctly.
v2: Added script to check subtest results
Signed-off-by: Derek Morton
---
lib/tests/Makefile.sources | 3 ++
lib/tests/igt_segfault.c| 57 ++
lib/tests/igt_segfault_check.sh | 61 +++
On 27.05.2015 18:04, Daniel Vetter wrote:
> These should be functionally equivalent to the older per/post modeset
> functions, except that they block out drm_vblank_get right away.
> There's only the clock adjusting code (outside of pageflips) in
> readone which uses drm_vblank_get. But that code d
On Thu, May 21, 2015 at 10:50:37AM +0100, Chris Wilson wrote:
> It also have just as much risk as reporting EBUSY due to the CL client
> trying to use a pinned buffer.
>
> However, it is a security hole because the same process can arrange to
> have whatever buffer it likes at 0 then access it thr
Now that all drivers are switched over to drm_vblank_on/off we can
relegate pre/post_modeset to the purely drm_irq.c internal role of
supporting on userspace.
As usual switch to the drm_legacy_ prefix to make it clear this is
for old drivers only.
Signed-off-by: Daniel Vetter
---
Documentation/
These should be functionally equivalent to the older per/post modeset
functions, except that they block out drm_vblank_get right away.
There's only the clock adjusting code (outside of pageflips) in
readone which uses drm_vblank_get. But that code doesn't synchronize
against concurrent modesets and
In
commit 9cba5efab5a8145ae6c52ea273553f069c294482
Author: Mario Kleiner
Date: Tue Jul 29 02:36:44 2014 +0200
drm/nouveau: Dis/Enable vblank irqs during suspend/resume
drm_vblank_on/off calls where added around suspend/resume to make sure
vblank stay doesn't go boom over that transition.
On Wed, May 27, 2015 at 11:03:09AM +0300, Jani Nikula wrote:
> On Tue, 26 May 2015, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > chv_enable_pll() doesn't need to hold sb_lock for the entire duration of
> > the function. Drop the lock as soon as possible.
> >
> > valleyview_
On Tue, 26 May 2015, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> chv_enable_pll() doesn't need to hold sb_lock for the entire duration of
> the function. Drop the lock as soon as possible.
>
> valleyview_set_cdclk() does a potential lock+unlock+lock+unlock cycle
> with sb_lock.
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
> Daniel Vetter
> Sent: Thursday, May 21, 2015 12:01 AM
> To: Chris Wilson; intel-gfx
> Subject: Re: [Intel-gfx] [PATCH 00/03] Preventing zero GPU virtual address
> allocation
>
> On Wed, M
When testing all modes on a connector with a single mode, if the modeset
fails, the code attempts to remove fb_info[-1], because old_fb still has
the inital value of -1.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90625
Signed-off-by: Ander Conselvan de Oliveira
---
tests/testdisplay
The line between maxfifo and SR is a blurry one. Since we treat them as
the same thing, just read out the registers set up in
intel_set_memory_cxsr().
References: https://bugs.freedesktop.org/show_bug.cgi?id=89792
Signed-off-by: Ander Conselvan de Oliveira
---
On 04/02/2015 11:42 AM, Ville Syr
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