Re: [Intel-gfx] [PATCH v2] drm/i915: Don't read dpcd for disconnected ports

On Fri, May 15, 2015 at 01:09:21PM +0300, Jani Nikula wrote: > From: Mika Kuoppala > > Reading from disconnected ports will spit out timeout error > on the dmesg. Skip the attempted read if the port is not > connected and avoid confusing users/testcases about > expected timeouts. > > This new dp

Re: [Intel-gfx] [PATCH v2] drm/i915: Don't read dpcd for disconnected ports

Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang...@intel.com) Task id: 6416 -Summary- Platform Delta drm-intel-nightly Series Applied PNV

Re: [Intel-gfx] Intel-gfx Digest, Vol 87, Issue 314

Hello guys, This reply will refer only to the first query (1): 1. Very bad performance from intel chipset on Thinkpad T540p (2880x1620) (Marc MERLIN) The solution here is switching to SNA mode on SandyBridge and newer iterations of Intel HD Graphics core on Linux. See the entry here

[Intel-gfx] Another behavior of tests from HANG section with enabled command parser

Hi All, I observed that some tests from HANG section described in Makefile.in change their behavior when command parser is enabled: Tests gem_bad_address starts to fail with error: "CMD: Rejected command 0x1062 for bitmask 0x0040..." As said Chris this test and gem_bad_blit are out o

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Output scaler related pipe config debug in a single line

Reviewed-by: Chandra Konduru > -Original Message- > From: Tvrtko Ursulin [mailto:tvrtko.ursu...@linux.intel.com] > Sent: Wednesday, May 13, 2015 8:51 AM > To: Intel-gfx@lists.freedesktop.org > Cc: Ursulin, Tvrtko; Konduru, Chandra > Subject: [PATCH 2/2] drm/i915: Output scaler related pip

Re: [Intel-gfx] [PATCH 00/11] Skylake display NV12 feature addition

> -Original Message- > From: Tvrtko Ursulin [mailto:tvrtko.ursu...@linux.intel.com] > Sent: Thursday, May 14, 2015 5:47 AM > To: Konduru, Chandra; Vetter, Daniel; Lespiau, Damien; Syrjala, Ville > Cc: intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH 00/11] Skylake display

[Intel-gfx] [PATCH 05/12] drm/i915: Upscale scaler max scale for NV12.

This patch updates max supported scaler limits for NV12. Signed-off-by: Chandra Konduru --- drivers/gpu/drm/i915/intel_display.c | 12 drivers/gpu/drm/i915/intel_drv.h |3 ++- drivers/gpu/drm/i915/intel_sprite.c |2 +- 3 files changed, 11 insertions(+), 6 deletions(-)

[Intel-gfx] [PATCH 02/12] drm/i915: Set scaler mode for NV12

This patch sets appropriate scaler mode for NV12 format. In this mode, skylake scaler does either chroma-upsampling or chroma-upsampling and resolution scaling. Signed-off-by: Chandra Konduru --- drivers/gpu/drm/i915/intel_atomic.c |5 - 1 file changed, 4 insertions(+), 1 deletion(-) di

[Intel-gfx] [PATCH 03/12] drm/i915: Stage scaler request for NV12 as src format

This patch stages a scaler request when input format is NV12. The same scaler does both chroma-upsampling and resolution scaling as needed. Signed-off-by: Chandra Konduru --- drivers/gpu/drm/i915/intel_display.c |9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/driv

[Intel-gfx] [PATCH 04/12] drm/i915: Update format_is_yuv() to include NV12

This patch adds NV12 to format_is_yuv() function and made it available for both primary and sprite planes. Signed-off-by: Chandra Konduru --- drivers/gpu/drm/i915/intel_drv.h|1 + drivers/gpu/drm/i915/intel_sprite.c |3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git

[Intel-gfx] [PATCH 11/12] drm/i915: Add NV12 to sprite plane programming.

This patch is adding NV12 support to skylake sprite plane programming. It is covering linear/X/Y/Yf tiling formats for 0 and 180 rotations. For 90/270 rotation, Y and UV subplanes should be treated as separate surfaces and GTT remapping for rotation should be done separately for each subplane. Onc

[Intel-gfx] [PATCH 12/12] drm/i915: Add 90/270 rotation for NV12 format.

Adding NV12 90/270 rotation support for primary and sprite planes. Signed-off-by: Chandra Konduru Testcase: igt/kms_nv12 --- drivers/gpu/drm/i915/intel_display.c | 23 --- drivers/gpu/drm/i915/intel_sprite.c | 32 +--- 2 files changed, 41 inse

[Intel-gfx] [PATCH 01/12] drm/i915: Add register definitions for NV12 support

This patch adds register definitions for skylake display NV12 support. Signed-off-by: Chandra Konduru --- drivers/gpu/drm/i915/i915_reg.h | 27 +++ 1 file changed, 27 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 770

[Intel-gfx] [PATCH 06/12] drm/i915: Add NV12 as supported format for primary plane

This patch adds NV12 to list of supported formats for primary plane. Signed-off-by: Chandra Konduru Testcase: igt/kms_nv12 --- drivers/gpu/drm/i915/intel_display.c | 16 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 10/12] drm/i915: Add NV12 to primary plane programming.

This patch is adding NV12 support to skylake primary plane programming. It is covering linear/X/Y/Yf tiling formats for 0 and 180 rotations. For 90/270 rotation, Y and UV subplanes should be treated as separate surfaces and GTT remapping for rotation should be done separately for each subplane. On

[Intel-gfx] [PATCH 07/12] drm/i915: Add NV12 as supported format for sprite plane

This patch adds NV12 to list of supported formats for sprite plane. Signed-off-by: Chandra Konduru Testcase: igt/kms_nv12 --- drivers/gpu/drm/i915/intel_sprite.c | 23 +-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/

[Intel-gfx] [PATCH 00/12] drm/i915: Adding NV12 for skylake display

This patch series is adding NV12 support for Skylake display after rebasing on latest drm-intel-nightly. Earlier I had two patch series one for 0/180 and another for 90/270. Some of the patches were already merged. This is combined series to support 0/90/180/270 and removing the ones that are alrea

[Intel-gfx] [PATCH 08/12] drm/i915: Add NV12 support to intel_framebuffer_init

This patch adds NV12 as supported format to intel_framebuffer_init and performs various checks. Signed-off-by: Chandra Konduru Testcase: igt/kms_nv12 --- drivers/gpu/drm/i915/intel_display.c | 27 +++ 1 file changed, 27 insertions(+) diff --git a/drivers/gpu/drm/i915/i

[Intel-gfx] [PATCH 09/12] drm/i915: Enable NV12 primary plane via crtc set config

Setup a scaler for primary plane if its FB is in NV12 format in legacy crtc set config path. Signed-off-by: Chandra Konduru --- drivers/gpu/drm/i915/intel_display.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/inte

Re: [Intel-gfx] [PATCH] drm/i915: Preserve ddi_pll_sel when allocating new pipe_config

Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang...@intel.com) Task id: 6415 -Summary- Platform Delta drm-intel-nightly Series Applied PNV

[Intel-gfx] build error with GCC5.1.1

gcc5.1.1 generates an error at build time. sna_accel.c: In function 'sna_poly_zero_line_blt': sna_accel.c:9207:10: warning: variable 'intersects' set but not used [-Wunused-but-set-variable] bool intersects; ^ sna_accel.c:9107:6: warning: variable 'degenerate' set but not used

Re: [Intel-gfx] [PATCH] tests/gem_bad_address: Adapt test to ppgtt to pass with command parser

Hi Chris, Thanks for quick response. I see that these tests from HANG section. Probably all tests with unclear behavior are put here. But what is about the test gem_exec_bad_domains? It also contains BAD_GTT_DEST with the same value. This test isn't from HANG section. Pavel -Original Mes

Re: [Intel-gfx] [PATCH] drm/i915: drrs_invalidate at flip schedule

Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang...@intel.com) Task id: 6412 -Summary- Platform Delta drm-intel-nightly Series Applied PNV