This patch adds NV12 to list of supported formats for
primary plane.
Signed-off-by: Chandra Konduru <chandra.kond...@intel.com>
Testcase: igt/kms_nv12
---
drivers/gpu/drm/i915/intel_display.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index b7e4b3b..42924a6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -70,6 +70,18 @@ static const uint32_t i965_primary_formats[] = {
DRM_FORMAT_ABGR2101010,
};
+/* Primary plane formats for gen >= 9 with NV12 */
+static const uint32_t skl_primary_formats_with_nv12[] = {
+ COMMON_PRIMARY_FORMATS, \
+ DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_ABGR8888,
+ DRM_FORMAT_XRGB2101010,
+ DRM_FORMAT_ARGB2101010,
+ DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_ABGR2101010,
+ DRM_FORMAT_NV12,
+};
+
/* Cursor formats */
static const uint32_t intel_cursor_formats[] = {
DRM_FORMAT_ARGB8888,
@@ -13315,6 +13327,10 @@ static struct drm_plane
*intel_primary_plane_create(struct drm_device *dev,
if (INTEL_INFO(dev)->gen <= 3) {
intel_primary_formats = i8xx_primary_formats;
num_formats = ARRAY_SIZE(i8xx_primary_formats);
+ } else if (INTEL_INFO(dev)->gen >= 9 &&
+ (pipe == PIPE_A || pipe == PIPE_B)) {
+ intel_primary_formats = skl_primary_formats_with_nv12;
+ num_formats = ARRAY_SIZE(skl_primary_formats_with_nv12);
} else {
intel_primary_formats = i965_primary_formats;
num_formats = ARRAY_SIZE(i965_primary_formats);
--
1.7.9.5
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