> -Original Message-
> From: Jesse Barnes [mailto:jbar...@virtuousgeek.org]
> Sent: Saturday, March 21, 2015 3:17 AM
> To: He, Shuang; Gao, Ethan; intel-gfx@lists.freedesktop.org; Hoath, Nicholas
> Subject: Re: [Intel-gfx] [PATCH] drm/i195/bxt: Add A1 stepping for Broxton
>
> On 03/20/2015
From: chandra konduru
This patch is adding i-g-t plane scaling test case to test couple basic
display plane scaling usages. Additional test scenarios can be added later.
v2:
-Added iterative scaling to visually observe scaling (me)
v3:
-Added a flag to control primary plane scaling.
Signed-off
From: chandra konduru
This patch is adding i-g-t test case to test panel fitting usages.
Signed-off-by: chandra konduru
---
tests/.gitignore |1 +
tests/Android.mk |1 +
tests/Makefile.sources|1 +
tests/kms_panel_fitting.c | 270 +
Plane scaling and colorkey are mutually exclusive. Ensure scaling
isn't active at the time of enabling colorkey.
Signed-off-by: Chandra Konduru
---
drivers/gpu/drm/i915/intel_sprite.c |6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_sprite.c
b/drivers/gpu/
This patch enables skylake primary plane display scaling using shared
scalers atomic desgin.
v2:
-use single copy of scaler limits (Matt)
Signed-off-by: Chandra Konduru
---
drivers/gpu/drm/i915/intel_display.c | 77 +++---
1 file changed, 71 insertions(+), 6 deleti
This is required for commit to perform as per staged assignment
of scalers until atomic crtc commit function is available.
As a place holder doing this copy from intel_atomic_commit for
scaling to operate correctly.
Signed-off-by: Chandra Konduru
---
drivers/gpu/drm/i915/intel_atomic.c | 12 +
This helper function stages a scaler request for a plane/crtc into
crtc_state->scaler_users (which is a bit field). It also performs
required checks before staging any change into scaler_state.
v2:
-updates to use single copy of scaler limits (Matt)
-added force detach parameter for pfit disable p
Adding register definitions for skylake scalers.
v2:
-add #define for plane selection mask (me)
Signed-off-by: Chandra Konduru
---
drivers/gpu/drm/i915/i915_reg.h | 115 +++
1 file changed, 115 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/dri
crtc_state is cleared during mode set which wipes out complete
scaler state too. This is causing issues. To fix, ensure scaler
state is preserved because it contains not only crtc
scaler usage, but also planes using scalers on this crtc.
Signed-off-by: Chandra Konduru
---
drivers/gpu/drm/i915/in
Modify skylake panel fitting implementation to use shared scalers.
v2:
-added log message in pfit enable/disable (me)
-read crtc scaler state from hw state (Daniel)
-replaced both skylake_pfit_enable and disable with skylake_pfit_update (me)
-added scaler id check to intel_pipe_config_compare (Dan
This function is called from commit path of a plane or crtc.
It programs scaler registers to detach (aka. unbinds) scaler
from requested plane or crtc if it isn't in use. It also resets
scaler_id in crtc/plane state.
v2:
-improved a log message (me)
Signed-off-by: Chandra Konduru
---
drivers/gp
This patch enables skylake sprite plane display scaling using shared
scalers atomic desgin.
v2:
-use single copy of scaler limits (Matt)
Signed-off-by: Chandra Konduru
---
drivers/gpu/drm/i915/intel_sprite.c | 79 +++
1 file changed, 61 insertions(+), 18 deleti
During readout_hw_state, rebuild crtc scaler_state from hw state:
- crtc scaler id
- scaler users
- scaling ratios
Signed-off-by: Chandra Konduru
---
drivers/gpu/drm/i915/intel_display.c |5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/driver
intel_atomic_setup_scalers sets up scalers based on staged scaling
requests coming from a crtc and its planes. This function should be
called from crtc level check path.
If staged requests are supportable, function assigns scalers to
requested planes and crtc. This function also takes into account
skylake scaler structure definitions. scalers live in crtc_state as
they are pipe resources. They can be used either as plane scaler or
panel fitter.
scaler assigned to either plane (for plane scaling) or crtc (for panel
fitting) is saved in scaler_id in plane_state or crtc_state respectively.
sc
Based on computed crtc config, stage any updates to scaling ratios.
Also call intel_atomic_setup_scalers() to stage scaler assignments
if crtc compute config staged any changes to its scaler needs.
Above actions should be moved to atomic crtc once it is available.
v2:
-moved gen comparision chec
Signed-off-by: Chandra Konduru
---
drivers/gpu/drm/i915/intel_display.c |2 ++
drivers/gpu/drm/i915/intel_sprite.c |1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 7150c33..ffaed7b 100644
--- a/drivers
Helper function updates supported scaling ratios based on cdclk and
crtc clocks.
v2:
-update single copy of scaling ratios (Matt)
Signed-off-by: Chandra Konduru
---
drivers/gpu/drm/i915/intel_display.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/gpu/
This patch calls skl_update_scaler_users() to stage a panel fitting
request for fixed mode panel.
v2:
-move gen check to caller (Matt)
Signed-off-by: Chandra Konduru
---
drivers/gpu/drm/i915/intel_dp.c |8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dp.
From intel_atomic_check, call intel_atomic_setup_scalers() to
assign scalers based on staged scaling requests. Fail the
transaction if setup returns error.
Setting up of scalers should be moved to atomic crtc check once
atomic crtc is ready.
v2:
-updated parameter passing to setup_scalers (me)
Initializing scalers with supported values during crtc init.
v2:
-initialize single copy of min/max values (Matt)
Signed-off-by: Chandra Konduru
---
drivers/gpu/drm/i915/intel_display.c | 53 ++
1 file changed, 53 insertions(+)
diff --git a/drivers/gpu/drm/i91
This patch enables skylake display scalers in atomic framework.
Version 2 of patch series addresses comments from Daniel and Matt.
see below for full details and also individual patch headers.
Though changes aren't big, but they trickled down into multiple
patches. So I'm sending the whole series f
Made intel_colorkey_enabled and skl_get_colorkey functions
available for primary plane.
Signed-off-by: Chandra Konduru
---
drivers/gpu/drm/i915/intel_drv.h|3 +++
drivers/gpu/drm/i915/intel_sprite.c |9 +
2 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/
Dumps scaler state as part of dumping crtc_state.
Signed-off-by: Chandra Konduru
---
drivers/gpu/drm/i915/intel_display.c | 47 --
1 file changed, 45 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_d
Adding drm helper function to return plane pointer from index where
index is a returned by drm_plane_index.
v2:
-avoided nested loop by adding loop count (Daniel)
Signed-off-by: Chandra Konduru
---
drivers/gpu/drm/drm_crtc.c | 22 ++
include/drm/drm_crtc.h |1 +
2
Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 6020
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV -2 274/274
Hi Sonika,
on the previous email I forgot to tell that we also need to add
somewhere a check to avoid PSR for resolutions bigger than 3200x2000.
Although most of displays that we have that support psr are 3200x1800 it
is better to think a way to protect now than later.
Thanks,
Rodrigo.
On Fri,
On Fri, Mar 20, 2015 at 04:19:02PM +, Chris Wilson wrote:
> I guess one test would be to see how many 1x1 [xN overdraw, say 1x1
> Window, but rendering internally at 1080p] clients we can run in
> parallel whilst hitting 60fps. And then whether allowing multiple
> spinners helps or hinders.
I
Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 6019
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV -1 274/274
On Fri, 2015-03-20 at 11:27 +0530, Sonika Jindal wrote:
> We make use of HW tracking for Selective update region and enable frame sync
> on
> sink. We use hardware's hardcoded data values for frame sync and GTC.
Before enabling HW tracking for PSR2 I'd like to know if all known bad
cases of bad H
On Fri, Mar 20, 2015 at 05:48:36PM +, john.c.harri...@intel.com wrote:
> From: John Harrison
>
> The intended usage model for struct fence is that the signalled status should
> be
> set on demand rather than polled. That is, there should not be a need for a
> 'signaled' function to be called
On Fri, Mar 20, 2015 at 09:28:08PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> msleep() can sleep for way too long, so switch wait_for() to use
> usleep_range() instead. Following a totally unscientific method
> I just picked the range as W-2W.
>
> This cuts the i915 in
On 03/20/2015 12:28 PM, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> msleep() can sleep for way too long, so switch wait_for() to use
> usleep_range() instead. Following a totally unscientific method
> I just picked the range as W-2W.
>
> This cuts the i915 init time on my BSW
From: Ville Syrjälä
msleep() can sleep for way too long, so switch wait_for() to use
usleep_range() instead. Following a totally unscientific method
I just picked the range as W-2W.
This cuts the i915 init time on my BSW to almost half:
- initcall i915_init+0x0/0xa8 [i915] returned 0 after 41997
Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 6017
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV -2 274/274
On 03/20/2015 10:14 AM, shuang...@intel.com wrote:
> Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
> shuang...@intel.com)
> Task id: 6016
> -Summary-
> Platform Delta drm-intel-nightly
On 20 March 2015 at 11:14, Javi Merino wrote:
> We have grown a number of different implementations of
> DIV_ROUND_CLOSEST_ULL throughout the kernel. Move the i915 one to
> kernel.h so that it can be reused.
>
> Cc: Daniel Vetter
> Cc: Jani Nikula
> Cc: David Airlie
> Cc: Darrick J. Wong
> Cc
On 20/03/2015 16:19, John Harrison wrote:
On 19/03/2015 12:30, john.c.harri...@intel.com wrote:
+void intel_ring_reserved_space_end(struct intel_ringbuffer *ringbuf)
+{
+WARN_ON(!ringbuf->reserved_in_use);
+WARN_ON(ringbuf->tail > ringbuf->reserved_tail +
ringbuf->reserved_size);
+
+
From: John Harrison
There is a construct in the linux kernel called 'struct fence' that is intended
to keep track of work that is executed on hardware. I.e. it solves the basic
problem that the drivers 'struct drm_i915_gem_request' is trying to address. The
request structure does quite a lot more
From: John Harrison
Added the '_complete' trace event which occurs when a fence/request is signaled
as complete. Also moved the notify event from the IRQ handler code to inside the
notify function itself.
For: VIZ-5190
Signed-off-by: John Harrison
---
drivers/gpu/drm/i915/i915_gem.c |3 +
From: John Harrison
The intended usage model for struct fence is that the signalled status should be
set on demand rather than polled. That is, there should not be a need for a
'signaled' function to be called everytime the status is queried. Instead,
'something' should be done to enable a signal
From: John Harrison
The change to the implementation of i915_gem_request_completed() means that the
lazy coherency flag is no longer used. This can now be removed to simplify the
interface.
For: VIZ-5190
Signed-off-by: John Harrison
---
drivers/gpu/drm/i915/i915_debugfs.c |2 +-
drivers/g
From: John Harrison
There is a construct in the linux kernel called 'struct fence' that is intended
to keep track of work that is executed on hardware. I.e. it solves the basic
problem that the drivers 'struct drm_i915_gem_request' is trying to address. The
request structure does quite a lot more
On Fri, 2015-03-20 at 10:54 +0100, Daniel Vetter wrote:
> On Thu, Mar 19, 2015 at 06:24:24PM -0700, Rodrigo Vivi wrote:
> > This will allow manual tests when crc isn't available.
> >
> > v2: Remove unused and non-sense buf->size and decrease buf->stride a bit as
> > suggested by Daniel.
>
> buf-
On Fri, 2015-03-20 at 16:10 +0200, Ville Syrjälä wrote:
> On Tue, Mar 17, 2015 at 11:39:56AM +0200, Imre Deak wrote:
> > From: Vandana Kannan
> >
> > Add display clock/PHY initialization sequence as per BSpec.
>
> This should really be two patches I think. I'll go over the cdclk bits
> first...
Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 6016
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV -2 274/274
On 03/20/2015 04:19 PM, Chris Wilson wrote:
On Fri, Mar 20, 2015 at 04:01:52PM +, Tvrtko Ursulin wrote:
On 03/20/2015 02:36 PM, Chris Wilson wrote:
This provides a nice boost to mesa in swap bound scenarios (as mesa
throttles itself to the previous frame and given the scenario that will
c
On Fri, Mar 20, 2015 at 04:01:52PM +, Tvrtko Ursulin wrote:
>
> On 03/20/2015 02:36 PM, Chris Wilson wrote:
> >This provides a nice boost to mesa in swap bound scenarios (as mesa
> >throttles itself to the previous frame and given the scenario that will
> >complete shortly). It will also provi
On 19/03/2015 12:30, john.c.harri...@intel.com wrote:
+void intel_ring_reserved_space_end(struct intel_ringbuffer *ringbuf)
+{
+WARN_ON(!ringbuf->reserved_in_use);
+WARN_ON(ringbuf->tail > ringbuf->reserved_tail +
ringbuf->reserved_size);
+
+ringbuf->reserved_size = 0;
+ringbu
On 20/03/2015 15:30, Chris Wilson wrote:
On Fri, Mar 20, 2015 at 04:23:45PM +0100, Daniel Vetter wrote:
On Thu, Mar 19, 2015 at 12:30:56PM +, john.c.harri...@intel.com wrote:
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 6f198df..c7dca
On 03/20/2015 02:36 PM, Chris Wilson wrote:
This provides a nice boost to mesa in swap bound scenarios (as mesa
throttles itself to the previous frame and given the scenario that will
complete shortly). It will also provide a good boost to systems running
with semaphores disabled and so frequent
On 20/03/2015 15:13, Daniel Vetter wrote:
On Thu, Mar 19, 2015 at 12:30:10PM +, john.c.harri...@intel.com wrote:
+void intel_ring_reserved_space_use(struct intel_ringbuffer *ringbuf, int size)
Just a bit of interface bikeshed - I'd drop the size parameter here. It
just duplicates what we te
On 03/20/2015 03:16 AM, Daniel Vetter wrote:
> On Thu, Mar 19, 2015 at 11:06:14AM -0700, Jesse Barnes wrote:
>> On 03/19/2015 10:44 AM, Daniel Vetter wrote:
>>> On Wed, Mar 18, 2015 at 11:41:48AM -0700, Jesse Barnes wrote:
This updates my old patch for this, but w/o fixing the locking issue
>>
On Fri, Mar 20, 2015 at 04:33:08PM +0100, Daniel Vetter wrote:
> On Fri, Mar 20, 2015 at 03:04:39PM +, Chris Wilson wrote:
> > The retire comes before the before the gpu_idle (we retire often as a
> > part of busy, execbuffer, timers etc). The traces show exactly that.
>
> Yeah, the sequence I
On Fri, Mar 20, 2015 at 03:04:39PM +, Chris Wilson wrote:
> On Fri, Mar 20, 2015 at 04:00:50PM +0100, Daniel Vetter wrote:
> > On Fri, Mar 20, 2015 at 02:45:04PM +, Chris Wilson wrote:
> > > On Fri, Mar 20, 2015 at 03:32:52PM +0100, Daniel Vetter wrote:
> > > > But if we do that short-circu
On Fri, Mar 20, 2015 at 04:23:45PM +0100, Daniel Vetter wrote:
> On Thu, Mar 19, 2015 at 12:30:56PM +, john.c.harri...@intel.com wrote:
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > index 6f198df..c7dcabd 100644
> > --- a/drivers/gpu
On Fri, Mar 20, 2015 at 03:54:01PM +0100, Daniel Vetter wrote:
> On Thu, Mar 19, 2015 at 03:16:15PM +, Chris Wilson wrote:
> > On Thu, Mar 12, 2015 at 11:11:17AM +, Chris Wilson wrote:
> > > This provides a nice boost to mesa in swap bound scenarios (as mesa
> > > throttles itself to the pr
On Thu, Mar 19, 2015 at 12:30:56PM +, john.c.harri...@intel.com wrote:
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
> b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 6f198df..c7dcabd 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffe
On Thu, Mar 19, 2015 at 12:30:10PM +, john.c.harri...@intel.com wrote:
> +void intel_ring_reserved_space_use(struct intel_ringbuffer *ringbuf, int
> size)
Just a bit of interface bikeshed - I'd drop the size parameter here. It
just duplicates what we tell the ring in the reservation code and
On Fri, Mar 20, 2015 at 04:00:50PM +0100, Daniel Vetter wrote:
> On Fri, Mar 20, 2015 at 02:45:04PM +, Chris Wilson wrote:
> > On Fri, Mar 20, 2015 at 03:32:52PM +0100, Daniel Vetter wrote:
> > > But if we do that short-circuiting in ring_idle the all the requests
> > > _should_ be completed. W
Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 6015
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV 274/274
On Fri, Mar 20, 2015 at 02:45:04PM +, Chris Wilson wrote:
> On Fri, Mar 20, 2015 at 03:32:52PM +0100, Daniel Vetter wrote:
> > But if we do that short-circuiting in ring_idle the all the requests
> > _should_ be completed. Which meanse retire_request_ring should move all
> > buffers to the inac
On Fri, Mar 20, 2015 at 04:23:51PM +0530, Jindal, Sonika wrote:
>
>
> On 3/20/2015 3:34 PM, Ville Syrjälä wrote:
> > On Fri, Mar 20, 2015 at 03:19:53PM +0530, Jindal, Sonika wrote:
> >>
> >>
> >> On 3/19/2015 7:58 PM, ville.syrj...@linux.intel.com wrote:
> >>> From: Ville Syrjälä
> >>>
> >>> In
On Thu, Mar 19, 2015 at 03:16:15PM +, Chris Wilson wrote:
> On Thu, Mar 12, 2015 at 11:11:17AM +, Chris Wilson wrote:
> > This provides a nice boost to mesa in swap bound scenarios (as mesa
> > throttles itself to the previous frame and given the scenario that will
> > complete shortly). It
On Fri, Mar 20, 2015 at 11:29:25AM +0100, Daniel Vetter wrote:
> On Thu, Mar 19, 2015 at 04:50:22PM +, Chris Wilson wrote:
> > On Thu, Mar 19, 2015 at 05:35:17PM +0100, Daniel Vetter wrote:
> > > On Thu, Mar 19, 2015 at 11:29:40AM +, Chris Wilson wrote:
> > > > The existing ABI says that sc
On Fri, Mar 20, 2015 at 09:41:03AM +, Michel Thierry wrote:
> While running kmemleak chasing a different memleak, I saw that the
> capture_error_state function was leaking some objects, for example:
>
> unreferenced object 0x8800a9b72148 (size 8192):
> comm "kworker/u16:0", pid 1499, jif
On Fri, Mar 20, 2015 at 03:32:52PM +0100, Daniel Vetter wrote:
> But if we do that short-circuiting in ring_idle the all the requests
> _should_ be completed. Which meanse retire_request_ring should move all
> buffers to the inactive list, even when we do that before retiring
> requests.
We test f
This provides a nice boost to mesa in swap bound scenarios (as mesa
throttles itself to the previous frame and given the scenario that will
complete shortly). It will also provide a good boost to systems running
with semaphores disabled and so frequently waiting on the GPU as it
switches rings. In
On Fri, Mar 20, 2015 at 10:49:19AM +, Chris Wilson wrote:
> On Fri, Mar 20, 2015 at 11:29:25AM +0100, Daniel Vetter wrote:
> > On Thu, Mar 19, 2015 at 04:50:22PM +, Chris Wilson wrote:
> > > On Thu, Mar 19, 2015 at 05:35:17PM +0100, Daniel Vetter wrote:
> > > > On Thu, Mar 19, 2015 at 11:29
On Fri, Mar 20, 2015 at 01:39:51PM +, Chris Wilson wrote:
> On Fri, Mar 20, 2015 at 01:02:10PM +, Chris Wilson wrote:
> > On Fri, Mar 20, 2015 at 11:06:57AM +0100, Daniel Vetter wrote:
> > > On Thu, Mar 19, 2015 at 10:17:42PM +, Chris Wilson wrote:
> > > > On Thu, Mar 19, 2015 at 06:37:
Keep that state updated so that we can write code that depends on it on
the follow up patches.
v2: Fix BUG due to stale connector_state->crtc value. (Chandra)
v3: Update comment about dummy state connectors. (Chandra)
Signed-off-by: Ander Conselvan de Oliveira
---
drivers/gpu/drm/i915/intel_di
Some of the crtc_compute_clock() still depended on encoder->new_crtc
since they didn't use intel_pipe_will_have_type() and used an open
coded version of that function instead. This patch replaces those with
the appropriate code that checks the atomic state intead.
Signed-off-by: Ander Conselvan de
The function intel_dp_set_drrs_state() would decide which pipe to
downclock based on the staged config for the given connector. However,
the result of that function is immediate, and it uses input values from
crtc->config, so it should be looking at the current crtc instead.
Signed-off-by: Ander C
So that we can add connector states to the drm_atomic_state used in the
legacy modeset.
Signed-off-by: Ander Conselvan de Oliveira
---
drivers/gpu/drm/i915/intel_crt.c| 1 +
drivers/gpu/drm/i915/intel_dp.c | 1 +
drivers/gpu/drm/i915/intel_dp_mst.c | 1 +
drivers/gpu/drm/i915/intel_dsi.
For consistency, allocate a new crtc_state for a crtc that is being
disabled. Previously only the enabled value of the current state would
change.
v2: Rebase on v5 of previous patch. (Ander)
Signed-off-by: Ander Conselvan de Oliveira
---
drivers/gpu/drm/i915/intel_display.c | 30 ++
Instead of using connector->new_encoder, get the same information from
the pipe_config, thus making the function ready for the atomic
conversion.
Signed-off-by: Ander Conselvan de Oliveira
---
drivers/gpu/drm/i915/intel_ddi.c | 24 +++-
1 file changed, 15 insertions(+), 9 de
For now this is not necessary since intel_set_mode() doesn't acquire any
new locks. However, once that function is converted to atomic, that will
change, since we'll pass an atomic state to it, and that needs to have
the right acquire context set.
Signed-off-by: Ander Conselvan de Oliveira
---
Follow up patches will convert some functions called from there to use
the atomic state, instead of directly accessing the new or current
config. This patch just changes the parameters, but shouldn't have any
functional changes.
Signed-off-by: Ander Conselvan de Oliveira
---
drivers/gpu/drm/i91
Move towards atomic by using the legacy modeset's drm_atomic_state
instead.
Signed-off-by: Ander Conselvan de Oliveira
---
drivers/gpu/drm/i915/intel_display.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/dr
For the atomic conversion, the mode set paths need to be changed to rely
on an atomic state instead of using the staged config. By using an
atomic state for the legacy code, we will be able to convert the code
base in small chunks.
v2: Squash patch that adds stat argument to intel_set_mode(). (And
Move towards atomic by using the legacy modeset's drm_atomic_state
instead.
Signed-off-by: Ander Conselvan de Oliveira
---
drivers/gpu/drm/i915/intel_lvds.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_lvds.c
b/drivers/gpu/drm/i915/intel_lvds.c
Move towards atomic by using the legacy modeset's drm_atomic_state
instead.
Signed-off-by: Ander Conselvan de Oliveira
---
drivers/gpu/drm/i915/intel_hdmi.c | 21 -
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gp
Makes that code atomic ready.
Signed-off-by: Ander Conselvan de Oliveira
---
drivers/gpu/drm/i915/intel_display.c | 49 ++--
1 file changed, 42 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.
Pass a crtc_state to it and find whether the pipe has an encoder of a
given type by looking at the drm_atomic_state the crtc_state points to.
Until recently i9xx_get_refclk() used to be called indirectly from
vlv_force_pll_on() with a dummy crtc_state. That dummy crtc state is not
converted to be
Move towards atomic by using the legacy modeset's drm_atomic_state
instead.
Signed-off-by: Ander Conselvan de Oliveira
---
drivers/gpu/drm/i915/intel_dp_mst.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
b/drivers/gp
With this in place, we can start converting pieces of the modeset code
to look at the connector atomic state instead of the staged config.
v2: Handle the load detect staged config changes too. (Ander)
Remove unnecessary blank line. (Daniel)
Signed-off-by: Ander Conselvan de Oliveira
---
dr
Move towards atomic by using the legacy modeset's drm_atomic_state
instead.
Signed-off-by: Ander Conselvan de Oliveira
---
drivers/gpu/drm/i915/intel_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index
Move towards atomic by using the legacy modeset's drm_atomic_state
instead.
v2: Move call to drm_atomic_add_affected_connectors() to
intel_modeset_compute_config(). (Daniel)
Signed-off-by: Ander Conselvan de Oliveira
---
drivers/gpu/drm/i915/intel_display.c | 17 +++--
1 file c
The pattern of getting the crtc state with drm_atomic_get_crtc_state()
and then converting it to intel_crtc_state will repeat quite often in
the following patches, so add a helper function to save some typing.
v2: Fix upcasting so that crtc_state base field could be moved. (Daniel)
Signed-off-by:
Version 3 of the series with comments from Chandra addressed. I'm sending the
whole series again so it goes through another round of PRTS testing.
Thanks,
Ander
Ander Conselvan de Oliveira (19):
drm/i915: Add intel_atomic_get_crtc_state() helper function
drm/i915: Pass acquire ctx also to int
On Tue, Mar 17, 2015 at 11:39:56AM +0200, Imre Deak wrote:
> From: Vandana Kannan
>
> Add display clock/PHY initialization sequence as per BSpec.
This should really be two patches I think. I'll go over the cdclk bits
first...
>
> Until GOP/VBIOS provides an upper limit value for CDCLK, compari
On 03/20/2015 01:31 PM, Joonas Lahtinen wrote:
[snip]
Hm, rotation info is not considered in comparing views, it is just a
bucket of data passed around between layers. So I suppose private data
under your design. Since there is no private union yet, maybe do this later?
Why not? Isn't a 270
On Fri, Mar 20, 2015 at 01:02:10PM +, Chris Wilson wrote:
> On Fri, Mar 20, 2015 at 11:06:57AM +0100, Daniel Vetter wrote:
> > On Thu, Mar 19, 2015 at 10:17:42PM +, Chris Wilson wrote:
> > > On Thu, Mar 19, 2015 at 06:37:28PM +0100, Daniel Vetter wrote:
> > > > On Wed, Mar 18, 2015 at 06:19
Hi,
On pe, 2015-03-20 at 12:11 +, Tvrtko Ursulin wrote:
> On 03/20/2015 12:01 PM, Joonas Lahtinen wrote:
> > On to, 2015-03-19 at 15:07 +, Tvrtko Ursulin wrote:
> >> Hi,
> >>
> >> On 03/19/2015 01:02 PM, Joonas Lahtinen wrote:
> static inline
> int i915_get_ggtt_vma_pages(s
Michel Thierry writes:
> Traces for page directories and tables allocation and map.
>
> v2: Removed references to teardown.
> v3: bitmap_scnprintf has been deprecated.
>
> Signed-off-by: Michel Thierry
> ---
> drivers/gpu/drm/i915/i915_gem.c | 2 +
> drivers/gpu/drm/i915/i915_gem_gtt.c |
On Fri, Mar 20, 2015 at 11:06:57AM +0100, Daniel Vetter wrote:
> On Thu, Mar 19, 2015 at 10:17:42PM +, Chris Wilson wrote:
> > On Thu, Mar 19, 2015 at 06:37:28PM +0100, Daniel Vetter wrote:
> > > On Wed, Mar 18, 2015 at 06:19:22PM +, Chris Wilson wrote:
> > > > WARNING: CPU: 0 PID:
On 03/20/2015 12:01 PM, Joonas Lahtinen wrote:
On to, 2015-03-19 at 15:07 +, Tvrtko Ursulin wrote:
Hi,
On 03/19/2015 01:02 PM, Joonas Lahtinen wrote:
static inline
int i915_get_ggtt_vma_pages(struct i915_vma *vma)
Same rant about function signatures as on earlier patch, put all on
On to, 2015-03-19 at 15:07 +, Tvrtko Ursulin wrote:
> Hi,
>
> On 03/19/2015 01:02 PM, Joonas Lahtinen wrote:
> >> static inline
> >> int i915_get_ggtt_vma_pages(struct i915_vma *vma)
> >
> > Same rant about function signatures as on earlier patch, put all on the
> > same line like most of
On 3/19/2015 7:59 PM, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä
In preparation for changing the primary plane position pass the clipped
position to .update_primary_plane().
v2: Rebased
Cc: Sonika Jindal
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_drv.h
On 3/20/2015 3:34 PM, Ville Syrjälä wrote:
On Fri, Mar 20, 2015 at 03:19:53PM +0530, Jindal, Sonika wrote:
On 3/19/2015 7:58 PM, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä
In preparation to movable/resizeable primary planes pass the clipped
plane size to .update_primary_plan
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