Re: [Intel-gfx] [BUG, bisect] drm/i915: mouse pointer lags and overshoots

all, On Tue, Jan 20, 2015 at 06:48:42AM +0100, Daniel Vetter wrote: > On Mon, Jan 19, 2015 at 08:40:24AM -0800, Matt Roper wrote: > > On Mon, Jan 19, 2015 at 11:04:04AM +, Chris Wilson wrote: > > > On Mon, Jan 19, 2015 at 11:51:43AM +0100, Daniel Vetter wrote: > > > > There's also an issue in

Re: [Intel-gfx] [PATCH] drm/i915: debugfs interface to read module parameters

Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang...@intel.com) Task id: 5633 -Summary- Platform Delta drm-intel-nightly Series Applied PNV 353/353

Re: [Intel-gfx] [PATCH] drm/i915: Add debugfs entry for DRRS

On Fri, Jan 23, 2015 at 9:52 AM, Ramalingam C wrote: > From: Vandana Kannan > > Adding a debugfs entry to determine if DRRS is supported or not > > V2: [By Ram]: Following details about the active crtc will be filled > in seq-file of the debugfs > 1. Encoder output type >

Re: [Intel-gfx] [PATCH 7/10] drm/i915: Enable eDP DRRS for CHV

Reviewed-by: Rodrigo Vivi On Fri, Jan 9, 2015 at 12:56 PM, Vandana Kannan wrote: > From: Durgadoss R > > This patch enables eDP DRRS for CHV by adding the > required IS_CHERRYVIEW() checks. > CHV uses the same register bit as VLV. > > [Vandana]: Since CHV has 2 sets of M_N registers, it will fo

Re: [Intel-gfx] [PATCH] drm/i915/bdw: Add support for DRRS to switch RR

On Thu, Jan 22, 2015 at 8:40 AM, Ramalingam C wrote: > From: Vandana Kannan > > For Broadwell, there is one instance of Transcoder MN values per transcoder. > For dynamic switching between multiple refreshr rates, M/N values may be > reprogrammed on the fly. Link N programming triggers update of

Re: [Intel-gfx] [PATCH] drm/i915: Enable/disable DRRS

re Reviewed-by: Rodrigo Vivi On Thu, Jan 22, 2015 at 1:47 AM, Ramalingam C wrote: > From: Vandana Kannan > > Calling enable/disable DRRS when enable/disable DDI are called. > These functions are responsible for setup of drrs data (in enable) and > reset of drrs (in disable). > has_drrs is true

Re: [Intel-gfx] [PATCH] drm/i915: Initialize DRRS delayed work

On Thu, Jan 22, 2015 at 1:44 AM, Ramalingam C wrote: > From: Vandana Kannan > > Add DRRS work function to trigger a switch to low refresh rate, > when no activity is detected on screen till 1 sec duration. > > v2: [By Ram]: drrs.dp also protected with drrs.mutex and worker function > is renamed t

Re: [Intel-gfx] [PATCH] drm/i915: debugfs interface to read module parameters

On Fri, Jan 23, 2015 at 02:35:20PM +0200, Ville Syrjälä wrote: > On Fri, Jan 23, 2015 at 12:25:26PM +, Dave Gordon wrote: > > It can be useful to know what the driver's parameters have ended up set > > to after sanitisation, so this commit adds a debugfs function to print > > the current values

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Convert hangcheck from a timer into a delayed work item

On Fri, Jan 23, 2015 at 02:44:07PM +0200, Mika Kuoppala wrote: > From: Chris Wilson > > When run as a timer, i915_hangcheck_elapsed() must adhere to all the > rules of running in a softirq context. This is advantageous to us as we > want to minimise the risk that a driver bug will prevent us from

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Display current hangcheck status in debugfs

On Fri, Jan 23, 2015 at 03:19:16PM +0200, Ville Syrjälä wrote: > On Fri, Jan 23, 2015 at 02:44:08PM +0200, Mika Kuoppala wrote: > > From: Chris Wilson > > > > For example, > > > > /sys/kernel/debug/dri/0/i915_hangcheck_info: > > > > Hangcheck active, fires in 15887800ms > > render ring: > >

Re: [Intel-gfx] [PATCH 1/4] drm/i915: Update PMINTRMSK on VLV/CHV after sysfs min/max freq change

On Fri, Jan 23, 2015 at 09:04:23PM +0200, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > Currently we don't call valleyview_set_rps() when changing the min/max > limits through sysfs if the current frequency is still within the new > limits. However that means we sometimes forget

Re: [Intel-gfx] [PATCH 4/4] drm/atomic-helpers: Recover full cursor plane behaviour

On 21/01/15 17:45, Daniel Vetter wrote: > On Wed, Jan 21, 2015 at 04:59:08PM +, Dave Gordon wrote: >> On 20/01/15 22:09, Daniel Vetter wrote: >>> Cursor plane updates have historically been fully async and mutliple >>> updates batched together for the next vsync. And userspace relies upon >>> t

[Intel-gfx] [PATCH 3/4] drm/i915: Add intel_gpu_freq() and intel_freq_opcode()

From: Ville Syrjälä Rename the vlv_gpu_freq() and vlv_freq_opecode() functions to have an intel_ prefix, and handle non-VLV/CHV platforms in them as well. Leave the vlv_ names around for now since they're currently used. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_drv.h | 2 ++

[Intel-gfx] [PATCH 4/4] drm/i915: Use intel_gpu_freq() and intel_freq_opcode()

From: Ville Syrjälä Replace all the vlv_gpu_freq(), vlv_freq_opcode(), *GT_FREQUENCY_MULTIPLIER, and /GT_FREQUENCY_MULTIPLIER instances with intel_gpu_freq() and intel_freq_opcode() calls. Most of the change was performed with the following semantic patch: @@ expression E; @@ ( - E * GT_FREQUENC

[Intel-gfx] [PATCH 0/4] drm/i915: PMINTRMSK fix for VLV/CHV and some other rps stuff

From: Ville Syrjälä I was staring at the GPU frequency on my BSW recently when I noticed that the value of PMINTRMSK didn't make much sense when I was frobbing with the sysfs frequency files. So while fixing that I became annoyed at the differences between VLV/CHV vs. others and tried to do somet

[Intel-gfx] [PATCH 2/4] drm/i915: Add gt_act_freq_mhz sysfs file

From: Ville Syrjälä Currently the 'gt_cur_freq_mhz' file shows the actual GPU frequency on VLV/CHV, and the last requested frequency on other platforms. Change the meaning of the file on VLV/CHV to follow the the other platforms, and introduce a new file 'gt_act_freq_mhz' which shows the actual f

[Intel-gfx] [PATCH 1/4] drm/i915: Update PMINTRMSK on VLV/CHV after sysfs min/max freq change

From: Ville Syrjälä Currently we don't call valleyview_set_rps() when changing the min/max limits through sysfs if the current frequency is still within the new limits. However that means we sometimes forget to update PMINTRMSK. Eg. if the current frequency is at the old minimum, and then we redu

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Display current hangcheck status in debugfs

Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang...@intel.com) Task id: 5634 -Summary- Platform Delta drm-intel-nightly Series Applied PNV -1 353/353

[Intel-gfx] [PATCH] drm/i915: Add debugfs entry for DRRS

From: Vandana Kannan Adding a debugfs entry to determine if DRRS is supported or not V2: [By Ram]: Following details about the active crtc will be filled in seq-file of the debugfs 1. Encoder output type 2. DRRS Support on this CRTC 3. DRRS current state 4

Re: [Intel-gfx] [PATCH] drm/i915: Add debugfs entry for DRRS

On Friday 23 January 2015 09:33 PM, Daniel Vetter wrote: On Thu, Jan 22, 2015 at 10:15:21PM +0530, Ramalingam C wrote: From: Vandana Kannan Adding a debugfs entry to determine if DRRS is supported or not V2: [By Ram]: Following details about the active crtc will be filled in seq-file

Re: [Intel-gfx] [RFC v2] drm/i915: Android native sync support

On Fri, Jan 23, 2015 at 04:53:48PM +0100, Daniel Vetter wrote: > Yeah that's kind the big behaviour difference (at least as I see it) > between explicit sync and implicit sync: > - with implicit sync the kernel attachs sync points/requests to buffers > and userspace just asks about idle/business

Re: [Intel-gfx] [RFC v2] drm/i915: Android native sync support

On 01/23/2015 03:53 PM, Daniel Vetter wrote: On Fri, Jan 23, 2015 at 02:02:44PM +, Tvrtko Ursulin wrote: On 01/23/2015 11:27 AM, Chris Wilson wrote: On Fri, Jan 23, 2015 at 11:13:14AM +, Tvrtko Ursulin wrote: From: Jesse Barnes Add Android native sync support with fences exported a

Re: [Intel-gfx] [PATCH] drm/i915: Add debugfs entry for DRRS

On Thu, Jan 22, 2015 at 10:15:21PM +0530, Ramalingam C wrote: > From: Vandana Kannan > > Adding a debugfs entry to determine if DRRS is supported or not > > V2: [By Ram]: Following details about the active crtc will be filled > in seq-file of the debugfs > 1. Encoder output type >

[Intel-gfx] [PULL] topic/core-stuff

Hi Dave, Just flushing out my drm-misc branch, nothing major. Well too old patches I've dug out from years since a patch from Rob look eerily familiar ;-) I'm cooking some more atomic patches that I'd like to sneak into 3.20, but still need a bit more testing. I'll send the pull for that next wee

Re: [Intel-gfx] [RFC v2] drm/i915: Android native sync support

On Fri, Jan 23, 2015 at 02:02:44PM +, Tvrtko Ursulin wrote: > > On 01/23/2015 11:27 AM, Chris Wilson wrote: > >On Fri, Jan 23, 2015 at 11:13:14AM +, Tvrtko Ursulin wrote: > >>From: Jesse Barnes > >> > >>Add Android native sync support with fences exported as file descriptors via > >>the e

[Intel-gfx] [PATCH 1/1] drm/i915: Add debugfs tunable for forcewake hysteresis

Add a tunable to set forcewake hysteresis timer for those who want explore the perf/power impacts. Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_debugfs.c | 44 + drivers/gpu/drm/i915/i915_drv.h | 8 +++ drivers/gpu/drm/i915/intel_uncore.

[Intel-gfx] [PULL] drm-intel-next

Hi Dave, drm-intel-next-2015-01-17: - refactor i915/snd-hda interaction to use the component framework (Imre) - psr cleanups and small fixes (Rodrigo) - a few perf w/a from Ken Graunke - switch to atomic plane helpers (Matt Roper) - wc mmap support (Chris Wilson & Akash Goel) - smaller things all

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Convert hangcheck from a timer into a delayed work item

On Fri, Jan 23, 2015 at 02:44:07PM +0200, Mika Kuoppala wrote: > From: Chris Wilson > > When run as a timer, i915_hangcheck_elapsed() must adhere to all the > rules of running in a softirq context. This is advantageous to us as we > want to minimise the risk that a driver bug will prevent us from

Re: [Intel-gfx] [PATCH] drm/i915: debugfs interface to read module parameters

On Fri, Jan 23, 2015 at 02:35:20PM +0200, Ville Syrjälä wrote: > On Fri, Jan 23, 2015 at 12:25:26PM +, Dave Gordon wrote: > > It can be useful to know what the driver's parameters have ended up set > > to after sanitisation, so this commit adds a debugfs function to print > > the current values

Re: [Intel-gfx] [RFC PATCH 07/12] drm/i915/dsi: switch to drm_panel interface

On Fri, Jan 23, 2015 at 04:27:46PM +0530, Shobhit Kumar wrote: > On 01/16/2015 05:57 PM, Jani Nikula wrote: > >@@ -881,13 +889,23 @@ void intel_dsi_init(struct drm_device *dev) > > > > drm_connector_register(connector); > > > >-fixed_mode = dsi->dev_ops->get_modes(&intel_dsi->dev); > >+

Re: [Intel-gfx] [RFC PATCH 05/12] drm/i915/dsi: remove unnecessary dsi device callbacks

On Fri, Jan 23, 2015 at 03:14:41PM +0530, Shobhit Kumar wrote: > On 01/22/2015 06:53 PM, Jani Nikula wrote: > >On Thu, 22 Jan 2015, Shobhit Kumar wrote: > >>There had been a instance where we had to drive different resolution > >>(lower) than the native one. Also in VBT there is a field to make th

[Intel-gfx] [PATCH 2/2] drm/i915: Display current hangcheck status in debugfs

From: Chris Wilson For example, /sys/kernel/debug/dri/0/i915_hangcheck_info: Hangcheck active, fires in 15887800ms render ring: seqno = -4059 [current -583] action = 2 score = 0 ACTHD = 1ee8 [current 21f980] max ACTHD = 0 v2: Include expiration ETA. Can

Re: [Intel-gfx] [RFC v2] drm/i915: Android native sync support

On 01/23/2015 11:27 AM, Chris Wilson wrote: On Fri, Jan 23, 2015 at 11:13:14AM +, Tvrtko Ursulin wrote: From: Jesse Barnes Add Android native sync support with fences exported as file descriptors via the execbuf ioctl (rsvd2 field is used). This is a continuation of Jesse Barnes's previo

Re: [Intel-gfx] [PATCH] drm/i915: Use symbolic irqreturn for ->hpd_pulse

On Fri, 23 Jan 2015, Daniel Vetter wrote: > Self-explanatory code is better code. > > Cc: Dave Airlie > Signed-off-by: Daniel Vetter Reviewed-by: Jani Nikula > --- > drivers/gpu/drm/i915/i915_irq.c | 8 +--- > drivers/gpu/drm/i915/intel_dp.c | 8 +--- > drivers/gpu/drm/i915/intel_

[Intel-gfx] [PATCH v2] drm/i915/dsi: switch to drm_panel interface

Replace intel_dsi_device and intel_dsi_dev_ops with drm_panel and drm_panel_funcs. They are adequate for what we have now, and if we end up needing more than this we should improve drm_panel. This will keep us better aligned with the drm core infrastructure. The panel driver initialization changes

[Intel-gfx] [QA 2015/01/23 ww04] Testing report for `drm-intel-testing` (was: Updated -next)

Summary We covered these platforms: Braswell, Broadwell, Baytrail, Haswell, SandyBridge, Ivybridge In this circle, 4 new bugs have been found (88620, 88382, Bug 88648

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Display current hangcheck status in debugfs

On Fri, Jan 23, 2015 at 02:44:08PM +0200, Mika Kuoppala wrote: > From: Chris Wilson > > For example, > > /sys/kernel/debug/dri/0/i915_hangcheck_info: > > Hangcheck active, fires in 15887800ms > render ring: > seqno = -4059 [current -583] > action = 2 > score = 0 >

[Intel-gfx] [PATCH 1/2] drm/i915: Convert hangcheck from a timer into a delayed work item

From: Chris Wilson When run as a timer, i915_hangcheck_elapsed() must adhere to all the rules of running in a softirq context. This is advantageous to us as we want to minimise the risk that a driver bug will prevent us from detecting a hung GPU. However, that is irrelevant if the driver bug prev

[Intel-gfx] [PATCH 2/2] drm/i915: Display current hangcheck status in debugfs

From: Chris Wilson For example, /sys/kernel/debug/dri/0/i915_hangcheck_info: Hangcheck active, fires in 15887800ms render ring: seqno = -4059 [current -583] action = 2 score = 0 ACTHD = 1ee8 [current 21f980] max ACTHD = 0 v2: Include expiration ETA. Can

Re: [Intel-gfx] [PATCH] drm/i915: debugfs interface to read module parameters

On Fri, Jan 23, 2015 at 12:25:26PM +, Dave Gordon wrote: > It can be useful to know what the driver's parameters have ended up set > to after sanitisation, so this commit adds a debugfs function to print > the current values of all the module parameters. What's wrong with eg. 'grep . /sys/modu

Re: [Intel-gfx] [RFC PATCH 00/12] drm/i915: port dsi over to drm panel/dsi frameworks

On 01/23/2015 07:43 AM, Shobhit Kumar wrote: On 01/22/2015 06:58 PM, Jani Nikula wrote: On Thu, 22 Jan 2015, Shobhit Kumar wrote: On 01/16/2015 05:57 PM, Jani Nikula wrote: This series ports our DSI code over to the drm_panel and mipi_dsi_host/mipi_dsi_device. There are some rough edges towar

Re: [Intel-gfx] [RFC PATCH 12/12] drm/i915/dsi: remove intel_dsi_cmd.c and the unused functions therein

On 01/16/2015 05:57 PM, Jani Nikula wrote: The removed functions can be resurrected in intel_dsi.c as need arises. Signed-off-by: Jani Nikula Reviewed-By: Shobhit Kumar --- drivers/gpu/drm/i915/Makefile | 1 - drivers/gpu/drm/i915/intel_dsi.c | 1 - drivers/g

Re: [Intel-gfx] [RFC PATCH 11/12] drm/i915/dsi: move dpi_send_cmd() to intel_dsi.c and make it static

On 01/16/2015 05:57 PM, Jani Nikula wrote: No functional changes. Signed-off-by: Jani Nikula Reviewed-By: Shobhit Kumar --- drivers/gpu/drm/i915/intel_dsi.c | 39 ++-- drivers/gpu/drm/i915/intel_dsi_cmd.c | 34 --- drivers

Re: [Intel-gfx] [RFC PATCH 10/12] drm/i915/dsi: remove old read/write functions in favor of new stuff

On 01/16/2015 05:57 PM, Jani Nikula wrote: All of these are replaced by the drm core mipi dsi functions. Signed-off-by: Jani Nikula Reviewed-By: Shobhit Kumar --- drivers/gpu/drm/i915/intel_dsi_cmd.c | 259 --- drivers/gpu/drm/i915/intel_dsi_cmd.h | 72 -

[Intel-gfx] [PATCH] drm/i915: debugfs interface to read module parameters

It can be useful to know what the driver's parameters have ended up set to after sanitisation, so this commit adds a debugfs function to print the current values of all the module parameters. --- drivers/gpu/drm/i915/i915_debugfs.c | 45 +++ 1 file changed, 45 ins

Re: [Intel-gfx] [RFC PATCH 09/12] drm/i915/dsi: make the vbt panel driver use mipi_dsi_device for transfers

On 01/16/2015 05:57 PM, Jani Nikula wrote: Use the drm core interfaces in preparation of removing our homebrew. Signed-off-by: Jani Nikula All looks well on code review and tested also and everything works. I have ASUS T100 whose panel does not need actually the DCS write commands during OT

Re: [Intel-gfx] [RFC PATCH 08/12] drm/i915/dsi: add drm mipi dsi host support

On 01/16/2015 05:57 PM, Jani Nikula wrote: Add basic support for using the drm mipi dsi framework for DSI. We don't use device tree which is pretty much required by mipi_dsi_host_register and friends, and we don't have the kind of device model the functions expect either. So we cheat and use it a

Re: [Intel-gfx] [RFC v2] drm/i915: Android native sync support

On Fri, Jan 23, 2015 at 11:13:14AM +, Tvrtko Ursulin wrote: > From: Jesse Barnes > > Add Android native sync support with fences exported as file descriptors via > the execbuf ioctl (rsvd2 field is used). > > This is a continuation of Jesse Barnes's previous work, squashed to arrive at > the

[Intel-gfx] [RFC v2] drm/i915: Android native sync support

From: Jesse Barnes Add Android native sync support with fences exported as file descriptors via the execbuf ioctl (rsvd2 field is used). This is a continuation of Jesse Barnes's previous work, squashed to arrive at the final destination, cleaned up, with some fixes and preliminary light testing.

Re: [Intel-gfx] [RFC PATCH 07/12] drm/i915/dsi: switch to drm_panel interface

On 01/16/2015 05:57 PM, Jani Nikula wrote: Replace intel_dsi_device and intel_dsi_dev_ops with drm_panel and drm_panel_funcs. They are adequate for what we have now, and if we end up needing more than this we should improve drm_panel. This will keep us better aligned with the drm core infrastruct

Re: [Intel-gfx] [PATCH] drm/i915: Use symbolic irqreturn for ->hpd_pulse

Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang...@intel.com) Task id: 5631 -Summary- Platform Delta drm-intel-nightly Series Applied PNV -1 353/353

Re: [Intel-gfx] [RFC PATCH 05/12] drm/i915/dsi: remove unnecessary dsi device callbacks

On 01/22/2015 06:53 PM, Jani Nikula wrote: On Thu, 22 Jan 2015, Shobhit Kumar wrote: On 01/16/2015 05:57 PM, Jani Nikula wrote: Remove all the trivial and/or dummy callbacks from intel dsi device ops. Merge send_otp_cmds into panel_reset as they're called back to back. This will be helpful fo

[Intel-gfx] [PATCH] drm/mm: Support 4 GiB and larger ranges

From: Thierry Reding The current implementation is limited by the number of addresses that fit into an unsigned long. This causes problems on 32-bit Tegra where unsigned long is 32-bit but drm_mm is used to manage an IOVA space of 4 GiB. Given the 32-bit limitation, the range is limited to 4 GiB