Re: [Intel-gfx] [PATCH 2/6] drm: add tile_group support. (v2)

2014-10-27 Thread Dave Airlie
> @@ -5156,3 +5158,100 @@ struct drm_property > *drm_mode_create_rotation_property(struct drm_device *dev, >supported_rotations); > } > EXPORT_SYMBOL(drm_mode_create_rotation_property); > + > +/** > + * DOC: Tile group > + * > + * Tile groups are used

Re: [Intel-gfx] [Beignet] Beignet crashes on vanilla 3.17.1 with IVB hardware

2014-10-27 Thread Zhigang Gong
Vasily, Could you try ImageMagick(convert) again with latest git master beignet(git-e46764f). It should work now. Thanks, Zhigang Gong. On Fri, Oct 24, 2014 at 04:36:49PM +0300, Vasily Khoruzhick wrote: > Hi Zhigang, > > On Fri, Oct 24, 2014 at 12:13 PM, Zhigang Gong > wrote: > > Hi, > > > > L

[Intel-gfx] [PATCH 2/2] drm/i915: run hsw_disable_pc8() later on resume

2014-10-27 Thread Paulo Zanoni
From: Paulo Zanoni We want to run intel_uncore_early_sanitize() before we touch any registers, because on BDW, when we resume, the FPGA_DBG_RM_NOCLAIM bit is set, so we need to clear it - through intel_uncore_early_sanitize() - before we do anything else. With the current code, we don't clear the

[Intel-gfx] [PATCH 1/2] drm/i915: kill intel_resume_prepare()

2014-10-27 Thread Paulo Zanoni
From: Paulo Zanoni Because, really, the abstraction is not working for us. It is nice for VLV, but doesn't add anything useful on SNB/HSW/BDW. We want to change this code due to a recently-discovered bug, but we can't seem to find a nice solution that repects the current abstraction. So let's kil

[Intel-gfx] [PATCH 2/2] drm/i915: transform INTEL_OUTPUT_* into an enum

2014-10-27 Thread Paulo Zanoni
From: Paulo Zanoni Because I got annoyed that I had to document what values "int ddi_personality" is supposed to hold. A good side-effect of this change is that now the compilers can do some additional checks on our code, which may prevent some bugs in the future. A bad side-effect of this chang

[Intel-gfx] [PATCH 1/2] drm/i915: introduce pipe_config->ddi_personality

2014-10-27 Thread Paulo Zanoni
From: Paulo Zanoni On HSW+, one encoder (DDI) can have multiple connectors (HDMI and DP). If no connector is connected, we consider the encoder type to be INTEL_OUTPUT_UNKNOWN. The problem is that we allow user space to set modes on disconnected connectors, so when we try to set a mode on an INTE

Re: [Intel-gfx] [PATCH v2 18/18] drm/i915/audio: add DOC comment describing HDA over HDMI/DP

2014-10-27 Thread Rodrigo Vivi
Reviewed-by: Rodrigo Vivi On Mon, Oct 27, 2014 at 7:27 AM, Jani Nikula wrote: > v2: include the section in the drm docbook. > > Signed-off-by: Jani Nikula > --- > Documentation/DocBook/drm.tmpl | 5 + > drivers/gpu/drm/i915/intel_audio.c | 21 + > 2 files changed,

Re: [Intel-gfx] [PATCH v2 17/18] drm/i915: make pipe/port based audio valid accessors easier to use

2014-10-27 Thread Rodrigo Vivi
Reviewed-by: Rodrigo Vivi On Mon, Oct 27, 2014 at 7:26 AM, Jani Nikula wrote: > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/i915_reg.h| 20 ++-- > drivers/gpu/drm/i915/intel_audio.c | 22 ++ > drivers/gpu/drm/i915/intel_ddi.c | 2 +- > 3 f

Re: [Intel-gfx] [PATCH v2 16/18] drm/i915/audio: add audio codec enable debug log for g4x

2014-10-27 Thread Rodrigo Vivi
I believe we could add debug like this for all gens, but anyway: Reviewed-by: Rodrigo Vivi On Mon, Oct 27, 2014 at 7:26 AM, Jani Nikula wrote: > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/intel_audio.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i91

Re: [Intel-gfx] [PATCH v2 11/18] drm/i915: rewrite hsw/bdw audio codec enable/disable sequences

2014-10-27 Thread Rodrigo Vivi
On Mon, Oct 27, 2014 at 7:26 AM, Jani Nikula wrote: > There's some serious confusion regarding ELD valid bit that gets set and > cleared back and forth etc. Rewrite it all based on the documented audio > codec enable/disable sequences. Could you please share this doc or point me out? > > Signed-

Re: [Intel-gfx] [PATCH v2 10/18] drm/i915: clean up and clarify audio related register defines

2014-10-27 Thread Rodrigo Vivi
Reviewed-by: Rodrigo Vivi On Mon, Oct 27, 2014 at 7:26 AM, Jani Nikula wrote: > Make audio related register defines conform to existing style: Add _MASK > where relevant, indent the defines for register contents, don't indent > the defines for register addresses, prefix pipe specific register >

Re: [Intel-gfx] [PATCH v2 09/18] drm/i915/audio: remove misleading checks for !eld[0]

2014-10-27 Thread Rodrigo Vivi
oh nevermind... I'm 100% convinced... Reviewed-by: Rodrigo Vivi On Mon, Oct 27, 2014 at 11:27 AM, Rodrigo Vivi wrote: > I'm not 100% convinced drm_select_eld will always cover this check... so > What do you think about changing it to a BUG_ON or at least a WARN_ON? > > On Mon, Oct 27, 2014 at 7

Re: [Intel-gfx] [PATCH v2 09/18] drm/i915/audio: remove misleading checks for !eld[0]

2014-10-27 Thread Rodrigo Vivi
I'm not 100% convinced drm_select_eld will always cover this check... so What do you think about changing it to a BUG_ON or at least a WARN_ON? On Mon, Oct 27, 2014 at 7:26 AM, Jani Nikula wrote: > We'll never end up in the hooks with eld[0] unset, as that's checked by > drm_select_eld(). > > Sig

Re: [Intel-gfx] [PATCH v2 08/18] drm/i915: introduce intel_audio_codec_{enable, disable}

2014-10-27 Thread Rodrigo Vivi
Good! Reviewed-by: Rodrigo Vivi On Mon, Oct 27, 2014 at 7:26 AM, Jani Nikula wrote: > Introduce functions to enable/disable the audio codec, incorporating the > ELD setup within enable. The disable is initially limited to HSW, > covering exactly what was done previously. > > The only functional

Re: [Intel-gfx] [PATCH 00/17] drm/i915: Fix vlv/chv panel power sequencer

2014-10-27 Thread Imre Deak
On Thu, 2014-10-16 at 21:27 +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > After weeks or months of beating on the hardware I finally managed > to figure out how to kick the vlv/chv power sequencer in a reasonably > light way after changing the pipe<->port mapping. > > Con

Re: [Intel-gfx] [PATCH v2 07/18] drm/i915/ddi: write ELD where it's supposed to be done

2014-10-27 Thread Rodrigo Vivi
On Mon, Oct 27, 2014 at 7:26 AM, Jani Nikula wrote: > The audio programming sequence states that the ELD must be written and > enabled after the pipe is ready. Indeed, this should clarify the > situation with Where/what doc can I confirm this? > > commit c79057922ed6c2c6df1214e6ab4414fea1b23db2

Re: [Intel-gfx] [PATCH v2 06/18] drm/i915/audio: set ELD Conn_Type at one place

2014-10-27 Thread Rodrigo Vivi
On Mon, Oct 27, 2014 at 7:26 AM, Jani Nikula wrote: > Keep the driver modifications to ELD together. This also sets the > Conn_Type for G4X DP which wasn't done before. > > Clean up the debugs while at it; this is all obvious from the connector > name. > > Signed-off-by: Jani Nikula > --- > driv

Re: [Intel-gfx] [PATCH v2 05/18] drm/i915/audio: pass intel_encoder on to platform specific ELD functions

2014-10-27 Thread Rodrigo Vivi
On Mon, Oct 27, 2014 at 7:26 AM, Jani Nikula wrote: > This will simplify things later on. No functional changes. > > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/i915_drv.h| 4 ++-- > drivers/gpu/drm/i915/intel_audio.c | 22 ++ > 2 files changed, 12 insertions

Re: [Intel-gfx] [PATCH v2 04/18] drm/i915: pass intel_encoder to intel_write_eld

2014-10-27 Thread Rodrigo Vivi
Reviewed-by: Rodrigo Vivi On Mon, Oct 27, 2014 at 7:26 AM, Jani Nikula wrote: > Everything else can be derived from that. No functional changes. > > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/intel_audio.c | 9 + > drivers/gpu/drm/i915/intel_ddi.c | 2 +- > drivers/gpu/d

Re: [Intel-gfx] [PATCH v2 03/18] drm/i915/audio: beat some sense into the variable types and names

2014-10-27 Thread Rodrigo Vivi
Agree. Reviewed-by: Rodrigo Vivi On Mon, Oct 27, 2014 at 7:26 AM, Jani Nikula wrote: > Most importantly, "i" need not be the universal variable used for > everything. No functional changes. > > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/intel_audio.c | 115 > ++--

Re: [Intel-gfx] [PATCH v2 02/18] drm/i915/audio: constify hdmi audio clock struct

2014-10-27 Thread Rodrigo Vivi
Agree! Reviewed-by: Rodrigo Vivi On Mon, Oct 27, 2014 at 7:26 AM, Jani Nikula wrote: > Const is good. > > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/intel_audio.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_audio.c > b/driv

Re: [Intel-gfx] [PATCH v2 01/18] drm/i915: add new intel audio file to group DP/HDMI audio

2014-10-27 Thread Vivi, Rodrigo
Nice reorg! Reviewed-by: Rodrigo Vivi -Original Message- From: Nikula, Jani Sent: Monday, October 27, 2014 7:27 AM To: intel-gfx@lists.freedesktop.org Cc: shuang...@linux.intel.com; Vivi, Rodrigo; Nikula, Jani Subject: [PATCH v2 01/18] drm/i915: add new intel audio file to group DP/HDMI

Re: [Intel-gfx] [PATCH 12/17] drm/i915: Don't kick the power seqeuncer just to check if we have vdd/panel power

2014-10-27 Thread Imre Deak
On Thu, 2014-10-16 at 21:29 +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > If there's no power sequencer assigned to the port currently we can't > very well have vdd or panel power enabled either. If we would try to > check that from the pps registers we'd need to pick a po

Re: [Intel-gfx] [PATCH] drm/i915: Move flags describing VMA mappings into the VMA

2014-10-27 Thread Jesse Barnes
On Fri, 24 Oct 2014 16:44:32 +0200 Daniel Vetter wrote: > On Fri, Oct 24, 2014 at 04:43:08PM +0200, Daniel Vetter wrote: > > On Fri, Oct 24, 2014 at 01:09:08PM +0100, Chris Wilson wrote: > > > On Fri, Oct 24, 2014 at 12:42:33PM +0100, Tvrtko Ursulin wrote: > > > > From: Tvrtko Ursulin > > > > >

Re: [Intel-gfx] [PATCH 05/17] drm/i915: Don't initialize power seqeuencer delays more than once

2014-10-27 Thread Ville Syrjälä
On Mon, Oct 27, 2014 at 04:43:07PM +0200, Imre Deak wrote: > On Thu, 2014-10-16 at 21:27 +0300, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > Since we read the current power seqeuncer delays from the registers > > (as well as looking at the vbt and spec values) we may end u

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Introduce a vfunc for platform-specfic MMIO flip code

2014-10-27 Thread Damien Lespiau
On Mon, Oct 27, 2014 at 04:47:53PM +0200, Ville Syrjälä wrote: > On Mon, Oct 27, 2014 at 04:38:04PM +0200, Ander Conselvan de Oliveira wrote: > > On 10/27/2014 04:25 PM, Daniel Vetter wrote: > > > On Mon, Oct 27, 2014 at 11:08:20AM +, Damien Lespiau wrote: > > >> On Mon, Oct 27, 2014 at 10:16:0

Re: [Intel-gfx] [PATCH 05/17] drm/i915: Don't initialize power seqeuencer delays more than once

2014-10-27 Thread Imre Deak
On Thu, 2014-10-16 at 21:27 +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > Since we read the current power seqeuncer delays from the registers > (as well as looking at the vbt and spec values) we may end up > corrupting delays we already initialized when we switch to anothe

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Introduce a vfunc for platform-specfic MMIO flip code

2014-10-27 Thread Ville Syrjälä
On Mon, Oct 27, 2014 at 04:38:04PM +0200, Ander Conselvan de Oliveira wrote: > On 10/27/2014 04:25 PM, Daniel Vetter wrote: > > On Mon, Oct 27, 2014 at 11:08:20AM +, Damien Lespiau wrote: > >> On Mon, Oct 27, 2014 at 10:16:06AM +0100, Daniel Vetter wrote: > >>> On Sat, Oct 25, 2014 at 12:11:12A

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Introduce a vfunc for platform-specfic MMIO flip code

2014-10-27 Thread Ander Conselvan de Oliveira
On 10/27/2014 04:25 PM, Daniel Vetter wrote: On Mon, Oct 27, 2014 at 11:08:20AM +, Damien Lespiau wrote: On Mon, Oct 27, 2014 at 10:16:06AM +0100, Daniel Vetter wrote: On Sat, Oct 25, 2014 at 12:11:12AM +0100, Damien Lespiau wrote: SKL will specialize it. Signed-off-by: Damien Lespiau

[Intel-gfx] [PATCH v2 04/18] drm/i915: pass intel_encoder to intel_write_eld

2014-10-27 Thread Jani Nikula
Everything else can be derived from that. No functional changes. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_audio.c | 9 + drivers/gpu/drm/i915/intel_ddi.c | 2 +- drivers/gpu/drm/i915/intel_dp.c| 2 +- drivers/gpu/drm/i915/intel_drv.h | 3 +-- drivers/gpu/drm/i915

Re: [Intel-gfx] [PATCH] drm/i915/chv: Use 16 and 32 for low and high drain latency precision.

2014-10-27 Thread Ville Syrjälä
On Mon, Oct 27, 2014 at 03:20:28PM +0100, Daniel Vetter wrote: > On Mon, Oct 27, 2014 at 02:17:34PM +0200, Ville Syrjälä wrote: > > On Wed, Oct 22, 2014 at 09:57:06AM +0300, Ville Syrjälä wrote: > > > On Fri, Oct 17, 2014 at 08:05:08AM -0700, Rodrigo Vivi wrote: > > > > Current chv spec teels we ca

[Intel-gfx] [PATCH v2 12/18] drm/i915/audio: rewrite vlv/chv and gen 5-7 audio codec enable sequence

2014-10-27 Thread Jani Nikula
Similar to the hsw/bdw enable sequence rewrite. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_audio.c | 58 +- 1 file changed, 26 insertions(+), 32 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c

[Intel-gfx] [PATCH v2 18/18] drm/i915/audio: add DOC comment describing HDA over HDMI/DP

2014-10-27 Thread Jani Nikula
v2: include the section in the drm docbook. Signed-off-by: Jani Nikula --- Documentation/DocBook/drm.tmpl | 5 + drivers/gpu/drm/i915/intel_audio.c | 21 + 2 files changed, 26 insertions(+) diff --git a/Documentation/DocBook/drm.tmpl b/Documentation/DocBook/drm.tmpl

[Intel-gfx] [PATCH v2 15/18] drm/i915/audio: add audio codec disable on g4x

2014-10-27 Thread Jani Nikula
This not based on any documentation... Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_audio.c | 20 1 file changed, 20 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c index 1bd1a51d8d49..86c1f8db7332 100644 ---

[Intel-gfx] [PATCH v2 17/18] drm/i915: make pipe/port based audio valid accessors easier to use

2014-10-27 Thread Jani Nikula
Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_reg.h| 20 ++-- drivers/gpu/drm/i915/intel_audio.c | 22 ++ drivers/gpu/drm/i915/intel_ddi.c | 2 +- 3 files changed, 17 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h

[Intel-gfx] [PATCH v2 11/18] drm/i915: rewrite hsw/bdw audio codec enable/disable sequences

2014-10-27 Thread Jani Nikula
There's some serious confusion regarding ELD valid bit that gets set and cleared back and forth etc. Rewrite it all based on the documented audio codec enable/disable sequences. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_audio.c | 110 - 1 file

[Intel-gfx] [PATCH v2 16/18] drm/i915/audio: add audio codec enable debug log for g4x

2014-10-27 Thread Jani Nikula
Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_audio.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c index 86c1f8db7332..6d0013cd3ed4 100644 --- a/drivers/gpu/drm/i915/intel_audio.c +++ b/drivers/gpu/drm/i

[Intel-gfx] [PATCH v2 03/18] drm/i915/audio: beat some sense into the variable types and names

2014-10-27 Thread Jani Nikula
Most importantly, "i" need not be the universal variable used for everything. No functional changes. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_audio.c | 115 ++--- 1 file changed, 57 insertions(+), 58 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v2 13/18] drm/i915/audio: add vlv/chv/gen5-7 audio codec disable sequence

2014-10-27 Thread Jani Nikula
Add support for disabling the audio codec on vlv/chv/gen5-7, similar to hsw/bdw. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_audio.c | 52 ++ drivers/gpu/drm/i915/intel_dp.c| 4 +++ drivers/gpu/drm/i915/intel_hdmi.c | 4 +++ 3 files change

[Intel-gfx] [PATCH v2 14/18] drm/i915: enable audio codec after port

2014-10-27 Thread Jani Nikula
As per spec, and similar to DDI. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_dp.c | 13 - drivers/gpu/drm/i915/intel_hdmi.c | 15 +++ 2 files changed, 15 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/in

[Intel-gfx] [PATCH v2 06/18] drm/i915/audio: set ELD Conn_Type at one place

2014-10-27 Thread Jani Nikula
Keep the driver modifications to ELD together. This also sets the Conn_Type for G4X DP which wasn't done before. Clean up the debugs while at it; this is all obvious from the connector name. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_audio.c | 19 +-- 1 file chang

[Intel-gfx] [PATCH v2 09/18] drm/i915/audio: remove misleading checks for !eld[0]

2014-10-27 Thread Jani Nikula
We'll never end up in the hooks with eld[0] unset, as that's checked by drm_select_eld(). Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_audio.c | 12 1 file changed, 12 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c in

[Intel-gfx] [PATCH v2 10/18] drm/i915: clean up and clarify audio related register defines

2014-10-27 Thread Jani Nikula
Make audio related register defines conform to existing style: Add _MASK where relevant, indent the defines for register contents, don't indent the defines for register addresses, prefix pipe specific register address defines with underscores, drop self explanatory comments. No functional changes.

[Intel-gfx] [PATCH v2 08/18] drm/i915: introduce intel_audio_codec_{enable, disable}

2014-10-27 Thread Jani Nikula
Introduce functions to enable/disable the audio codec, incorporating the ELD setup within enable. The disable is initially limited to HSW, covering exactly what was done previously. The only functional difference is that ELD valid is no longer set if there is no connector with ELD, which should be

[Intel-gfx] [PATCH v2 01/18] drm/i915: add new intel audio file to group DP/HDMI audio

2014-10-27 Thread Jani Nikula
In preparation for some additional cleanup. No functional changes. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/Makefile| 3 +- drivers/gpu/drm/i915/intel_audio.c | 357 +++ drivers/gpu/drm/i915/intel_display.c | 323 +---

[Intel-gfx] [PATCH v2 02/18] drm/i915/audio: constify hdmi audio clock struct

2014-10-27 Thread Jani Nikula
Const is good. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_audio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c index 167903b5e3ff..e761f2c8d1ae 100644 --- a/drivers/gpu/drm/i915/intel_a

[Intel-gfx] [PATCH v2 07/18] drm/i915/ddi: write ELD where it's supposed to be done

2014-10-27 Thread Jani Nikula
The audio programming sequence states that the ELD must be written and enabled after the pipe is ready. Indeed, this should clarify the situation with commit c79057922ed6c2c6df1214e6ab4414fea1b23db2 Author: Daniel Vetter Date: Wed Apr 16 16:56:09 2014 +0200 drm/i915: Remove vblank wait fro

[Intel-gfx] [PATCH v2 05/18] drm/i915/audio: pass intel_encoder on to platform specific ELD functions

2014-10-27 Thread Jani Nikula
This will simplify things later on. No functional changes. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_drv.h| 4 ++-- drivers/gpu/drm/i915/intel_audio.c | 22 ++ 2 files changed, 12 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [PATCH v2 00/18] drm/i915: hdmi/dp audio rework

2014-10-27 Thread Jani Nikula
This is v2 of [1]. No functional changes since the last version; just a rebase on top of current nightly, and some kerneldoc improvements. BR, Jani. [1] http://mid.gmane.org/cover.1412339886.git.jani.nik...@intel.com Jani Nikula (18): drm/i915: add new intel audio file to group DP/HDMI audio

Re: [Intel-gfx] [PATCH 1/2] drm: make sure visible is set to false if fb is null

2014-10-27 Thread Daniel Vetter
On Mon, Oct 27, 2014 at 04:23:26PM +0200, Ville Syrjälä wrote: > On Fri, Oct 24, 2014 at 07:00:17PM +0100, Gustavo Padovan wrote: > > From: Gustavo Padovan > > > > We can't let visible set true while the fb is null, some places of > > the code only check for visible to base its decisions. > > >

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Introduce a vfunc for platform-specfic MMIO flip code

2014-10-27 Thread Daniel Vetter
On Mon, Oct 27, 2014 at 11:08:20AM +, Damien Lespiau wrote: > On Mon, Oct 27, 2014 at 10:16:06AM +0100, Daniel Vetter wrote: > > On Sat, Oct 25, 2014 at 12:11:12AM +0100, Damien Lespiau wrote: > > > SKL will specialize it. > > > > > > Signed-off-by: Damien Lespiau > > > > So with atomic I'd

Re: [Intel-gfx] [PATCH 1/2] drm: make sure visible is set to false if fb is null

2014-10-27 Thread Ville Syrjälä
On Fri, Oct 24, 2014 at 07:00:17PM +0100, Gustavo Padovan wrote: > From: Gustavo Padovan > > We can't let visible set true while the fb is null, some places of > the code only check for visible to base its decisions. > > Signed-off-by: Gustavo Padovan For the series: Reviewed-by: Ville Syrjälä

Re: [Intel-gfx] [RFC 4/7] drm/i915: Program PPS registers

2014-10-27 Thread Daniel Vetter
On Mon, Oct 27, 2014 at 02:55:40PM +0530, Kannan, Vandana wrote: > I went through the LVDS and DSI parts. If software delays are used for both, > would it really add more value to have the delays in a function in > intel_panel.c and call whenever required ? > I'm thinking directly calling a msleep

Re: [Intel-gfx] [PATCH] drm/i915/chv: Use 16 and 32 for low and high drain latency precision.

2014-10-27 Thread Daniel Vetter
On Mon, Oct 27, 2014 at 02:17:34PM +0200, Ville Syrjälä wrote: > On Wed, Oct 22, 2014 at 09:57:06AM +0300, Ville Syrjälä wrote: > > On Fri, Oct 17, 2014 at 08:05:08AM -0700, Rodrigo Vivi wrote: > > > Current chv spec teels we can only use either 16 or 32 bits as precision. > > > > > > Although in

[Intel-gfx] [PATCH 2/2] Move library selftests to lib/tests

2014-10-27 Thread Daniel Vetter
Again they're not really igt testcases so are in the way of running spatch unconditionally. Move them someplace else. Signed-off-by: Daniel Vetter --- configure.ac | 1 + lib/Makefile.am | 2 + lib/tests/.gitignore | 7 ++ lib/tests/Makef

[Intel-gfx] [PATCH 1/2] Move watermark code from tests to tools

2014-10-27 Thread Daniel Vetter
They're now igt tests, and so if you blindly run lib/igt.cocci with spatch on tests/*c they get mangled. Move them away, but still keep them as noinst targets. Signed-off-by: Daniel Vetter --- tests/.gitignore | 2 - tests/Makefile.sources | 2 - tests/ddi_compute_wrpll.c | 62

[Intel-gfx] [PATCH] drm/i915: Enable pipe-a power well on chv

2014-10-27 Thread ville . syrjala
From: Ville Syrjälä It seems that the pipe-a power well has replaced the disp2d power well on chv. At least that's the case with the current punit firmware. So enable the pipe-a power and expand its domains to cover everything the disp2d well ought to cover. The other power wells (apart from the

Re: [Intel-gfx] [PATCH] drm/i915/chv: Use 16 and 32 for low and high drain latency precision.

2014-10-27 Thread Ville Syrjälä
On Wed, Oct 22, 2014 at 09:57:06AM +0300, Ville Syrjälä wrote: > On Fri, Oct 17, 2014 at 08:05:08AM -0700, Rodrigo Vivi wrote: > > Current chv spec teels we can only use either 16 or 32 bits as precision. > > > > Although in the past VLV went from 16/32 to 32/64 and spec might not be > > updated,

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Introduce a vfunc for platform-specfic MMIO flip code

2014-10-27 Thread Damien Lespiau
On Mon, Oct 27, 2014 at 10:16:06AM +0100, Daniel Vetter wrote: > On Sat, Oct 25, 2014 at 12:11:12AM +0100, Damien Lespiau wrote: > > SKL will specialize it. > > > > Signed-off-by: Damien Lespiau > > So with atomic I'd expect that we'd have one giant mmio_flip driver > function and that just call

Re: [Intel-gfx] [PATCH v5] drm/i915: Add ppgtt create/release trace points

2014-10-27 Thread Ceraolo Spurio, Daniele
On 10/27/2014 8:49 AM, Chris Wilson wrote: On Fri, Oct 24, 2014 at 04:30:52PM +0100, daniele.ceraolospu...@intel.com wrote: From: Daniele Ceraolo Spurio These tracepoints are useful for observing the creation and destruction of Full PPGTTs. v4: add DOC information v5: pull the DOC in drm.tmpl

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Grab rpm ref when changing cdclk on VLV/CHV

2014-10-27 Thread Ville Syrjälä
On Mon, Oct 27, 2014 at 09:48:27AM +0100, Daniel Vetter wrote: > On Tue, Oct 07, 2014 at 05:41:21PM +0300, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > We need to access the gunit mailbox when changing the cdclk frequency. > > Currently we update the power wells only after

Re: [Intel-gfx] [RFC 4/7] drm/i915: Program PPS registers

2014-10-27 Thread Kannan, Vandana
On 20-Oct-14 9:38 PM, Daniel Vetter wrote: On Mon, Oct 20, 2014 at 06:20:06PM +0530, Vandana Kannan wrote: Actually set values into PPS related registers. This implementation is equivalent to intel_dp_panel_power_sequencer_registers where the values saved intially are written into registers.

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Introduce a vfunc for platform-specfic MMIO flip code

2014-10-27 Thread Daniel Vetter
On Sat, Oct 25, 2014 at 12:11:12AM +0100, Damien Lespiau wrote: > SKL will specialize it. > > Signed-off-by: Damien Lespiau So with atomic I'd expect that we'd have one giant mmio_flip driver function and that just calls into the relevant platform/plane update hooks. Gustavo&Ville are working on

Re: [Intel-gfx] [Beignet] Beignet crashes on vanilla 3.17.1 with IVB hardware

2014-10-27 Thread Vasily Khoruzhick
Hi Zhigang, On Fri, Oct 24, 2014 at 12:13 PM, Zhigang Gong wrote: > Hi, > > Luxmark (both 2.0/2.1) works fine on my IVB machine. The back trace > you provided below doesn't indicate it's a beignet related problem. > It hadn't enter beignet domain and just crashed in luxmark internal. I'm testing

Re: [Intel-gfx] [Beignet] Beignet crashes on vanilla 3.17.1 with IVB hardware

2014-10-27 Thread Vasily Khoruzhick
Hi Zhigang, Luxmark crashes with following backtrace: Program received signal SIGSEGV, Segmentation fault. 0x004cd8b0 in slg::PathOCLRenderEngine::StopLockLess() () (gdb) bt #0 0x004cd8b0 in slg::PathOCLRenderEngine::StopLockLess() () #1 0x00482236 in slg::RenderEngine::

Re: [Intel-gfx] [PATCH v4 4/5] drm/i915: only flip frontbuffer if crtc is active

2014-10-27 Thread Daniel Vetter
On Fri, Oct 24, 2014 at 06:07:15PM +0300, Ville Syrjälä wrote: > On Fri, Oct 24, 2014 at 02:51:34PM +0100, Gustavo Padovan wrote: > > From: Gustavo Padovan > > > > There is no point in flipping a buffer for a disabled crtc. > > That thing doesn't actually flip but just signal the frontbuffer > t

Re: [Intel-gfx] [PATCH] drm/i915: Report the actual swizzling back to userspace

2014-10-27 Thread Daniel Vetter
On Fri, Oct 24, 2014 at 04:16:14PM +0100, Chris Wilson wrote: > On Fri, Oct 24, 2014 at 04:39:29PM +0200, Daniel Vetter wrote: > > On Fri, Oct 24, 2014 at 12:11:11PM +0100, Chris Wilson wrote: > > > Userspace cares about whether or not swizzling depends on the page > > > address for its direct acce

Re: [Intel-gfx] [PATCH 3/4] drm/i915: Add copyright headers to all golden context source

2014-10-27 Thread Daniel Vetter
On Fri, Oct 24, 2014 at 10:23:20AM +0300, Mika Kuoppala wrote: > armin.c.re...@intel.com writes: > > > From: Armin Reese > > > > Existing Gen6, 7, 8, and 9 golden context source files are > > currently generated without the copyright header. Adding > > them manually here. > > > > Signed-off-by:

Re: [Intel-gfx] [PATCH] drm/i915: Abort command parsing for chained batches

2014-10-27 Thread Daniel Vetter
On Fri, Oct 24, 2014 at 10:17:51AM -0700, Volkin, Bradley D wrote: > On Thu, Oct 23, 2014 at 08:52:59AM -0700, Volkin, Bradley D wrote: > > On Thu, Oct 23, 2014 at 05:31:12AM -0700, Daniel Vetter wrote: > > > On Wed, Oct 22, 2014 at 09:04:32AM -0700, Volkin, Bradley D wrote: > > > > [snip] > > > >

Re: [Intel-gfx] [PATCH v5] drm/i915: Add ppgtt create/release trace points

2014-10-27 Thread Chris Wilson
On Fri, Oct 24, 2014 at 04:30:52PM +0100, daniele.ceraolospu...@intel.com wrote: > From: Daniele Ceraolo Spurio > > These tracepoints are useful for observing the creation and > destruction of Full PPGTTs. > > v4: add DOC information > v5: pull the DOC in drm.tmpl > > Signed-off-by: Daniele Cer

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Grab rpm ref when changing cdclk on VLV/CHV

2014-10-27 Thread Daniel Vetter
On Tue, Oct 07, 2014 at 05:41:21PM +0300, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > We need to access the gunit mailbox when changing the cdclk frequency. > Currently we update the power wells only after chancing cdclk, so the > device might be suspended when we have to frob