Re: [Intel-gfx] [PATCH 2/2] drm/i915: Embellish wait_end trace

2014-07-29 Thread Chris Wilson
On Tue, Jul 29, 2014 at 11:33:43PM -0700, Ben Widawsky wrote: > On Wed, Jul 30, 2014 at 07:19:26AM +0100, Chris Wilson wrote: > > On Tue, Jul 29, 2014 at 01:14:30PM -0700, Ben Widawsky wrote: > > > This adds two new data points to the trace event, wait time, and whether > > > or not the event slept

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Embellish wait_end trace

2014-07-29 Thread Ben Widawsky
On Wed, Jul 30, 2014 at 07:19:26AM +0100, Chris Wilson wrote: > On Tue, Jul 29, 2014 at 01:14:30PM -0700, Ben Widawsky wrote: > > This adds two new data points to the trace event, wait time, and whether > > or not the event slept. Both of these should already be obtainable > > through various means

Re: [Intel-gfx] [PATCH 1/2] drm/i915: timespec_sub should already be normalized

2014-07-29 Thread Ben Widawsky
On Wed, Jul 30, 2014 at 07:15:05AM +0100, Chris Wilson wrote: > On Tue, Jul 29, 2014 at 01:14:29PM -0700, Ben Widawsky wrote: > > So don't bother checking it again. > > This was introduced: > > commit b361237bcc7cea1d99f770490120d8bc2aed > > Author: Chris Wilson > > Date: Fri Aug 24 09:35:08

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Embellish wait_end trace

2014-07-29 Thread Chris Wilson
On Tue, Jul 29, 2014 at 01:14:30PM -0700, Ben Widawsky wrote: > This adds two new data points to the trace event, wait time, and whether > or not the event slept. Both of these should already be obtainable > through various means. This patch just makes the data more accessible. Right, the key poin

Re: [Intel-gfx] [PATCH 1/2] drm/i915: timespec_sub should already be normalized

2014-07-29 Thread Chris Wilson
On Tue, Jul 29, 2014 at 01:14:29PM -0700, Ben Widawsky wrote: > So don't bother checking it again. > This was introduced: > commit b361237bcc7cea1d99f770490120d8bc2aed > Author: Chris Wilson > Date: Fri Aug 24 09:35:08 2012 +0100 > > drm/i915: Juggle code order to ease flow of the next

Re: [Intel-gfx] [PATCH 7/8] drm/irq: Implement a generic vblank_wait function

2014-07-29 Thread Michel Dänzer
On 30.07.2014 06:32, Daniel Vetter wrote: > As usual in both a crtc index and a struct drm_crtc * version. > > The function assumes that no one drivers their display below 10Hz, and > it will complain if the vblank wait takes longer than that. > > v2: Also check dev->max_vblank_counter since some

[Intel-gfx] [PATCH 1/2] drm/i915/hdmi: call intel_hdmi_prepare for CHV

2014-07-29 Thread libin . yang
From: Libin Yang call the intel_hdmi_prepare() in chv_hdmi_pre_enable() for hdmi audio. Signed-off-by: Libin Yang --- drivers/gpu/drm/i915/intel_hdmi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 5f8f4ca..5a65

Re: [Intel-gfx] [PATCH 4/8] drm: Move ->old_fb from crtc to plane

2014-07-29 Thread Matt Roper
On Tue, Jul 29, 2014 at 11:32:19PM +0200, Daniel Vetter wrote: > Atomic implemenations for legacy ioctls must be able to drop locks. > Which doesn't cause havoc since we only do that while constructing > the new state, so no driver or hardware state change has happened. > > The only troubling bit

Re: [Intel-gfx] [PATCH 4/8] drm: Move ->old_fb from crtc to plane

2014-07-29 Thread Dave Airlie
On 30 July 2014 07:32, Daniel Vetter wrote: > Atomic implemenations for legacy ioctls must be able to drop locks. > Which doesn't cause havoc since we only do that while constructing > the new state, so no driver or hardware state change has happened. > > The only troubling bit is the fb refcounti

Re: [Intel-gfx] [PATCH 3/8] drm: Handle legacy per-crtc locking with full acquire ctx

2014-07-29 Thread Dave Airlie
> --- > drivers/gpu/drm/drm_crtc.c | 8 ++-- > drivers/gpu/drm/drm_modeset_lock.c | 84 > ++ > include/drm/drm_crtc.h | 6 +++ > include/drm/drm_modeset_lock.h | 5 +++ > 4 files changed, 99 insertions(+), 4 deletions(-) > > diff --gi

Re: [Intel-gfx] [PATCH 2/8] drm: Move modeset_lock_all helpers to drm_modeset_lock.[hc]

2014-07-29 Thread Dave Airlie
On 30 July 2014 07:32, Daniel Vetter wrote: > Somehow we've forgotten about this little bit of OCD. > > Signed-off-by: Daniel Vetter Reviewed-by: Dave Airlie ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailm

Re: [Intel-gfx] [PATCH 1/8] drm: Add drm_plane/connector_index

2014-07-29 Thread Matt Roper
On Tue, Jul 29, 2014 at 11:32:16PM +0200, Daniel Vetter wrote: > In the atomic state we'll have an array of states for crtcs, planes > and connectors and need to be able to at them by their index. We > already have a drm_crtc_index function so add the missing ones for > planes and connectors. > >

Re: [Intel-gfx] [PATCH 07/12] drm/i915: Update EDID automated test function for Displayport compliance

2014-07-29 Thread Paulo Zanoni
2014-07-14 16:10 GMT-03:00 Todd Previte : > Implements an updated version of the automated testing function that handles > Displayport compliance for EDID operations. Both the commit message and the code should mention the name of the specification that defines these tests, and also mention which

Re: [Intel-gfx] [RFC] Move BDW workarounds to ring init fn

2014-07-29 Thread Siluvery, Arun
On 28/07/2014 18:26, Ville Syrjälä wrote: On Mon, Jul 28, 2014 at 05:31:45PM +0100, arun.siluv...@linux.intel.com wrote: From: Arun Siluvery This patch moves BDW workarounds from init_clock_gating() to render ring init fn otherwise they are lost when gpu is reset. In case of execlists, some of

Re: [Intel-gfx] i915 / 3.15 intermittently boots into blank screeen

2014-07-29 Thread Jan Niggemann
Am 29.07.2014 23:35, schrieb Daniel Vetter: On Tue, Jul 29, 2014 at 11:09 PM, Jan Niggemann wrote: Am 18.07.2014 18:25, schrieb Daniel Vetter: On Fri, Jul 18, 2014 at 4:49 PM, Jan Niggemann wrote: Am 18.07.2014 15:27, schrieb Daniel Vetter: On Thu, Jul 17, 2014 at 10:31:30PM +0200, Jan

[Intel-gfx] [PATCH] drm: HDMI pixel replication modes now hactive of 720 for pixel replication

2014-07-29 Thread clinton . a . taylor
From: Clint Taylor CEA SD interlaced modes use a horizontal 720 pixels that are pixel replicated to 1440. The current driver reports 1440 pixel to the OS and does not set pixel replicated modes. Signed-off-by: Clint Taylor --- drivers/gpu/drm/drm_edid.c| 68 ++--

Re: [Intel-gfx] [PATCH v2] Displayport compliance testing

2014-07-29 Thread Paulo Zanoni
2014-07-22 18:11 GMT-03:00 Jesse Barnes : > On Tue, 22 Jul 2014 22:53:44 +0200 > Daniel Vetter wrote: > >> On Tue, Jul 22, 2014 at 10:48 PM, Jesse Barnes >> wrote: >> > Are you saying >> > you'll reject this approach entirely? >> >> I'm saying that I don't see terrible lot of value in adding a b

Re: [Intel-gfx] i915 / 3.15 intermittently boots into blank screeen

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 11:09 PM, Jan Niggemann wrote: > Am 18.07.2014 18:25, schrieb Daniel Vetter: >> >> On Fri, Jul 18, 2014 at 4:49 PM, Jan Niggemann wrote: >> >>> >>> Am 18.07.2014 15:27, schrieb Daniel Vetter: On Thu, Jul 17, 2014 at 10:31:30PM +0200, Jan Niggemann wrote: >>>

[Intel-gfx] [PATCH 5/8] drm: trylock modest locking for fbdev panics

2014-07-29 Thread Daniel Vetter
In the fbdev code we want to do trylocks only to avoid deadlocks and other ugly issues. Thus far we've only grabbed the overall modeset lock, but that already failed to exclude a pile of potential concurrent operations. With proper atomic support this will be worse. So add a trylock mode to the mo

[Intel-gfx] [PATCH 2/8] drm: Move modeset_lock_all helpers to drm_modeset_lock.[hc]

2014-07-29 Thread Daniel Vetter
Somehow we've forgotten about this little bit of OCD. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/drm_crtc.c | 95 -- drivers/gpu/drm/drm_modeset_lock.c | 95 ++ include/drm/drm_crtc.h | 4 -- inclu

[Intel-gfx] [PATCH 3/8] drm: Handle legacy per-crtc locking with full acquire ctx

2014-07-29 Thread Daniel Vetter
So drivers using the atomic interfaces expect that they can acquire additional locks internal to the driver as-needed. Examples would be locks to protect shared state like shared display PLLs. Unfortunately the legacy ioctls assume that all locking is fully done by the drm core. Now for those path

[Intel-gfx] [PATCH 8/8] drm/i915: Use generic vblank wait

2014-07-29 Thread Daniel Vetter
This has the upside that it will no longer steal interrupts from the interrutp handler on pre-g4x. Furthermore this will now scream properly on all platforms if we don't have hw counters enabled. Cc: Ville Syrjälä Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 41 +-

[Intel-gfx] [PATCH 4/8] drm: Move ->old_fb from crtc to plane

2014-07-29 Thread Daniel Vetter
Atomic implemenations for legacy ioctls must be able to drop locks. Which doesn't cause havoc since we only do that while constructing the new state, so no driver or hardware state change has happened. The only troubling bit is the fb refcounting the core does - if someone else has snuck in then i

[Intel-gfx] [PATCH 7/8] drm/irq: Implement a generic vblank_wait function

2014-07-29 Thread Daniel Vetter
As usual in both a crtc index and a struct drm_crtc * version. The function assumes that no one drivers their display below 10Hz, and it will complain if the vblank wait takes longer than that. v2: Also check dev->max_vblank_counter since some drivers register a fake get_vblank_counter function.

[Intel-gfx] [PATCH 6/8] drm: Add a plane->reset hook

2014-07-29 Thread Daniel Vetter
In general having this can't hurt, and the atomic helpers will need it to be able to reset the state objects properly. The overall idea is to reset in the order pixels flow, so planes -> crtcs -> encoders -> connectors. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/drm_crtc.c | 5 + inclu

[Intel-gfx] [PATCH 0/8] atomic prep work

2014-07-29 Thread Daniel Vetter
Hi all, So I've split out every single hunk that touches existing code from my atomic series and this is it. It mostly touches error handling code and other more exceptional stuff. My idea is that if we get this in now we have a bit more leeway with the actual atomic infrastructure work since that

[Intel-gfx] [PATCH 1/8] drm: Add drm_plane/connector_index

2014-07-29 Thread Daniel Vetter
In the atomic state we'll have an array of states for crtcs, planes and connectors and need to be able to at them by their index. We already have a drm_crtc_index function so add the missing ones for planes and connectors. If it later on turns out that the list walking is too expensive we can add

Re: [Intel-gfx] i915 / 3.15 intermittently boots into blank screeen

2014-07-29 Thread Jan Niggemann
Am 18.07.2014 18:25, schrieb Daniel Vetter: On Fri, Jul 18, 2014 at 4:49 PM, Jan Niggemann wrote: Am 18.07.2014 15:27, schrieb Daniel Vetter: On Thu, Jul 17, 2014 at 10:31:30PM +0200, Jan Niggemann wrote: I'm experiencing an issue with 3.15.5 on my Lenovo T400: Since 3.15 (or 3.14, can't s

[Intel-gfx] [PATCH 1/2] drm/i915: timespec_sub should already be normalized

2014-07-29 Thread Ben Widawsky
So don't bother checking it again. This was introduced: commit b361237bcc7cea1d99f770490120d8bc2aed Author: Chris Wilson Date: Fri Aug 24 09:35:08 2012 +0100 drm/i915: Juggle code order to ease flow of the next patch Cc: Chris Wilson Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i

[Intel-gfx] [PATCH 2/2] drm/i915: Embellish wait_end trace

2014-07-29 Thread Ben Widawsky
This adds two new data points to the trace event, wait time, and whether or not the event slept. Both of these should already be obtainable through various means. This patch just makes the data more accessible. Wait is obtainable with the current code by matching seqnos in begin/end. In simple cas

Re: [Intel-gfx] [PATCH] drm/i915: vma/ppgtt lifetime rules

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 11:44:51AM -0700, Ben Widawsky wrote: > On Tue, Jul 29, 2014 at 11:32:07AM -0700, Ben Widawsky wrote: > > On Tue, Jul 29, 2014 at 11:08:05AM +0100, Michel Thierry wrote: > > > VMAs should take a reference of the address space they use. > > > > > > Now, when the fd is closed

Re: [Intel-gfx] [PATCH 37/40] drm/i915: Fix eDP link training when switching pipes

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 10:18:46PM +0300, Ville Syrjälä wrote: > On Tue, Jul 29, 2014 at 08:06:57PM +0200, Daniel Vetter wrote: > > On Mon, Jun 30, 2014 at 02:52:12PM -0700, Jesse Barnes wrote: > > > On Sat, 28 Jun 2014 02:04:28 +0300 > > > ville.syrj...@linux.intel.com wrote: > > > > > > > From:

Re: [Intel-gfx] [PATCH 37/40] drm/i915: Fix eDP link training when switching pipes

2014-07-29 Thread Ville Syrjälä
On Tue, Jul 29, 2014 at 08:06:57PM +0200, Daniel Vetter wrote: > On Mon, Jun 30, 2014 at 02:52:12PM -0700, Jesse Barnes wrote: > > On Sat, 28 Jun 2014 02:04:28 +0300 > > ville.syrj...@linux.intel.com wrote: > > > > > From: Ville Syrjälä > > > > > > When switching from one pipe to another, the po

Re: [Intel-gfx] [PATCH 34/40] drm/i915: Add DP training pattern 3 for CHV

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 09:34:34PM +0300, Ville Syrjälä wrote: > On Tue, Jul 29, 2014 at 08:04:59PM +0200, Daniel Vetter wrote: > > On Tue, Jul 29, 2014 at 10:01:57AM -0700, Jesse Barnes wrote: > > > On Sat, 28 Jun 2014 02:04:25 +0300 > > > ville.syrj...@linux.intel.com wrote: > > > > > > > From:

Re: [Intel-gfx] [PATCH 12/40] drm/i915: Clarify CHV swing margin/deemph bits

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 09:55:39AM -0700, Jesse Barnes wrote: > On Sat, 28 Jun 2014 02:04:03 +0300 > ville.syrj...@linux.intel.com wrote: > > > From: Ville Syrjälä > > > > CHV display PHY registes have two swing margin/deemph settings. Make it > > clear which ones we're using. > > > > Signed-of

Re: [Intel-gfx] [PATCH] drm/i915: freeze display before the interrupts and GT

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 11:13:03AM -0700, Jesse Barnes wrote: > On Thu, 17 Jul 2014 17:43:46 -0300 > Paulo Zanoni wrote: > > > From: Paulo Zanoni > > > > Since we started using intel_runtime_pm_disable_interrupts() at normal > > (non-runtime) suspend/resume, we had to remove a WARN from > > iro

Re: [Intel-gfx] [PATCH] drm/i915: vma/ppgtt lifetime rules

2014-07-29 Thread Ben Widawsky
On Tue, Jul 29, 2014 at 11:32:07AM -0700, Ben Widawsky wrote: > On Tue, Jul 29, 2014 at 11:08:05AM +0100, Michel Thierry wrote: > > VMAs should take a reference of the address space they use. > > > > Now, when the fd is closed, it will release the ref that the context was > > holding, but it will

Re: [Intel-gfx] [PATCH 06/40] drm/i915: Add cdclk change support for chv

2014-07-29 Thread Ville Syrjälä
On Tue, Jul 29, 2014 at 09:51:03AM -0700, Jesse Barnes wrote: > On Sat, 28 Jun 2014 02:03:57 +0300 > ville.syrj...@linux.intel.com wrote: > > > From: Ville Syrjälä > > > > Looks like the Punit is supposed to support the 400MHz cdclk directly on > > chv, so we don't need the vlv tricks. > > > >

Re: [Intel-gfx] [PATCH 34/40] drm/i915: Add DP training pattern 3 for CHV

2014-07-29 Thread Ville Syrjälä
On Tue, Jul 29, 2014 at 08:04:59PM +0200, Daniel Vetter wrote: > On Tue, Jul 29, 2014 at 10:01:57AM -0700, Jesse Barnes wrote: > > On Sat, 28 Jun 2014 02:04:25 +0300 > > ville.syrj...@linux.intel.com wrote: > > > > > From: Ville Syrjälä > > > > > > CHV supports DP training pattern 3. Add the req

Re: [Intel-gfx] [PATCH] drm/i915: vma/ppgtt lifetime rules

2014-07-29 Thread Ben Widawsky
On Tue, Jul 29, 2014 at 11:08:05AM +0100, Michel Thierry wrote: > VMAs should take a reference of the address space they use. > > Now, when the fd is closed, it will release the ref that the context was > holding, but it will still be referenced by any vmas that are still > active. > > ppgtt_rele

Re: [Intel-gfx] [PATCH 00/10] Split the HSW/BDW PLL code a bit more

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 06:06:15PM +0100, Damien Lespiau wrote: > Turns out we were optimistic. intel_ prefixes don't tend to last and this is > one of those times. Pulled in the entire series to dinq, thanks. -Daniel > > -- > Damien > > Damien Lespiau (10): > drm/i915: Specify when the PLL

Re: [Intel-gfx] [PATCH 37/40] drm/i915: Fix eDP link training when switching pipes

2014-07-29 Thread Daniel Vetter
On Mon, Jun 30, 2014 at 02:52:12PM -0700, Jesse Barnes wrote: > On Sat, 28 Jun 2014 02:04:28 +0300 > ville.syrj...@linux.intel.com wrote: > > > From: Ville Syrjälä > > > > When switching from one pipe to another, the power sequencer of the new > > pipe seems to need a bit of kicking to lock into

Re: [Intel-gfx] [PATCH 05/10] drm/i915: Restrict hsw_dp_set_ddi_pll_sel() to HSW/BDW

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 06:06:20PM +0100, Damien Lespiau wrote: > Future platform will use config->ddi_pll_sel in a different way. > > Signed-off-by: Damien Lespiau > --- > drivers/gpu/drm/i915/intel_dp.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i

[Intel-gfx] [PATCH] tests/gem_ringfill: add interruptible mode

2014-07-29 Thread Daniel Vetter
Should be useful to test intel_ring_begin restart behaviour a bit. Signed-off-by: Daniel Vetter --- tests/gem_ringfill.c | 17 + 1 file changed, 17 insertions(+) diff --git a/tests/gem_ringfill.c b/tests/gem_ringfill.c index 5700a74d260b..750537a9bbab 100644 --- a/tests/gem_ring

Re: [Intel-gfx] [PATCH] drm/i915: Rework GPU reset sequence to match driver load & thaw

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 05:25:48PM +, Mcaulay, Alistair wrote: > > drv_suspend, gem_hangcheck_forcewake are working fine now with PPGTT > enabled. Both with and without my patch. > > The results are the same with and without my patch for: > > $ sudo ~/drm_nightly/intel-gpu-tools/tests/drv_

Re: [Intel-gfx] [PATCH] drm/i915: freeze display before the interrupts and GT

2014-07-29 Thread Jesse Barnes
On Thu, 17 Jul 2014 17:43:46 -0300 Paulo Zanoni wrote: > From: Paulo Zanoni > > Since we started using intel_runtime_pm_disable_interrupts() at normal > (non-runtime) suspend/resume, we had to remove a WARN from > ironlake_disable_display_irq to avoid a case where we were doing the > correct th

Re: [Intel-gfx] [PATCH 06/40] drm/i915: Add cdclk change support for chv

2014-07-29 Thread Jesse Barnes
On Tue, 29 Jul 2014 19:59:26 +0200 Daniel Vetter wrote: > On Tue, Jul 29, 2014 at 09:51:03AM -0700, Jesse Barnes wrote: > > On Sat, 28 Jun 2014 02:03:57 +0300 > > ville.syrj...@linux.intel.com wrote: > > > > > From: Ville Syrjälä > > > > > > Looks like the Punit is supposed to support the 400M

Re: [Intel-gfx] [PATCH 34/40] drm/i915: Add DP training pattern 3 for CHV

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 10:01:57AM -0700, Jesse Barnes wrote: > On Sat, 28 Jun 2014 02:04:25 +0300 > ville.syrj...@linux.intel.com wrote: > > > From: Ville Syrjälä > > > > CHV supports DP training pattern 3. Add the required stuff. > > > > Signed-off-by: Ville Syrjälä > > --- > > drivers/gpu/

Re: [Intel-gfx] [PATCH 29/40] drm/i915: Refactor Broadwell PIPE_CONTROL emission into a helper.

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 09:59:53AM -0700, Jesse Barnes wrote: > On Sat, 28 Jun 2014 02:04:20 +0300 > ville.syrj...@linux.intel.com wrote: > > > From: Kenneth Graunke > > > > We'll want to reuse this for a workaround. > > > > Signed-off-by: Kenneth Graunke > > --- > > drivers/gpu/drm/i915/inte

Re: [Intel-gfx] [PATCH 06/40] drm/i915: Add cdclk change support for chv

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 09:51:03AM -0700, Jesse Barnes wrote: > On Sat, 28 Jun 2014 02:03:57 +0300 > ville.syrj...@linux.intel.com wrote: > > > From: Ville Syrjälä > > > > Looks like the Punit is supposed to support the 400MHz cdclk directly on > > chv, so we don't need the vlv tricks. > > > >

Re: [Intel-gfx] [PATCH 10/9] drm: Add dev->vblank_disable_immediate flag

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 08:31:55PM +0300, Ville Syrjälä wrote: > On Thu, Jun 19, 2014 at 05:41:24PM -0700, Matt Roper wrote: > > On Mon, May 26, 2014 at 05:26:47PM +0300, ville.syrj...@linux.intel.com > > wrote: > > > From: Ville Syrjälä > > > > > > Add a flag to drm_device which will cause the

Re: [Intel-gfx] [PATCH 10/9] drm: Add dev->vblank_disable_immediate flag

2014-07-29 Thread Ville Syrjälä
On Thu, Jun 19, 2014 at 05:41:24PM -0700, Matt Roper wrote: > On Mon, May 26, 2014 at 05:26:47PM +0300, ville.syrj...@linux.intel.com wrote: > > From: Ville Syrjälä > > > > Add a flag to drm_device which will cause the vblank code to bypass the > > disable timer and always disable the vblank inte

Re: [Intel-gfx] [PATCH] drm/i915: Rework GPU reset sequence to match driver load & thaw

2014-07-29 Thread Mcaulay, Alistair
drv_suspend, gem_hangcheck_forcewake are working fine now with PPGTT enabled. Both with and without my patch. The results are the same with and without my patch for: $ sudo ~/drm_nightly/intel-gpu-tools/tests/drv_hangman IGT-Version: 1.7-g70e6ed9 (x86_64) (Linux: 3.16.0-rc5+ x86_64) Subtest e

[Intel-gfx] [PATCH 09/10] drm/i915: Split the CDCLK retrieval per-platform

2014-07-29 Thread Damien Lespiau
This is only going to get worse, so split it now to avoid adding more cases to the if/else ladder. Suggested-by: Daniel Vetter Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/intel_ddi.c | 55 +++- 1 file changed, 38 insertions(+), 17 deletions(-) dif

[Intel-gfx] [PATCH 10/10] drm/i915: Make ddi_clock_gate() HSW/BDW specific

2014-07-29 Thread Damien Lespiau
Turns out we were again way too naive and optimistic, of course things will change. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/intel_ddi.c | 12 +--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_dd

[Intel-gfx] [PATCH 08/10] drm/i915: Make intel_ddi_calculate_wrpll() HSW/BDW specific

2014-07-29 Thread Damien Lespiau
Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/intel_ddi.c | 15 --- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 98e2fd5..69dc54c 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/dri

[Intel-gfx] [PATCH 03/10] drm/i915: Extract the HSW DDI selection code into its own function

2014-07-29 Thread Damien Lespiau
Future platform will slightly change that. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/intel_display.c | 27 +-- 1 file changed, 17 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 0

[Intel-gfx] [PATCH 07/10] drm/i915: Split the BDW/HSW specific shared pll selection

2014-07-29 Thread Damien Lespiau
We'll need a different algorithm to select the shared DPLL. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/intel_ddi.c | 39 +++ 1 file changed, 23 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/int

[Intel-gfx] [PATCH 00/10] Split the HSW/BDW PLL code a bit more

2014-07-29 Thread Damien Lespiau
Turns out we were optimistic. intel_ prefixes don't tend to last and this is one of those times. -- Damien Damien Lespiau (10): drm/i915: Specify when the PLL hw state fields are valid drm/i915: Add a space to the shared DPLL debug message drm/i915: Extract the HSW DDI selection code into

[Intel-gfx] [PATCH 02/10] drm/i915: Add a space to the shared DPLL debug message

2014-07-29 Thread Damien Lespiau
Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/intel_display.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1edfd1a..0147652 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/dr

[Intel-gfx] [PATCH 04/10] drm/i915: Extract the HSW/BDW shared dpll init code

2014-07-29 Thread Damien Lespiau
So we can easily provide an alternate implementation in the future. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/intel_ddi.c | 12 +--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 184890

[Intel-gfx] [PATCH 05/10] drm/i915: Restrict hsw_dp_set_ddi_pll_sel() to HSW/BDW

2014-07-29 Thread Damien Lespiau
Future platform will use config->ddi_pll_sel in a different way. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/intel_dp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index ea6ff71..bdbe8f7 100644 -

[Intel-gfx] [PATCH 06/10] drm/i915: Fix stale comment for intel_ddi_pll_select()

2014-07-29 Thread Damien Lespiau
Since the run-time PM on DPMS series, this function has an outdated comment. Refresh it a bit. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/intel_ddi.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/i

[Intel-gfx] [PATCH 01/10] drm/i915: Specify when the PLL hw state fields are valid

2014-07-29 Thread Damien Lespiau
Not all those fields are valid on a given platform. Make it explicit. Unions could also be used, but were cluttering some code paths with if/else ladders. v2: Don't use anonymous unions (Daniel) Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/i915_drv.h | 3 +++ 1 file changed, 3 insert

Re: [Intel-gfx] [PATCH 34/40] drm/i915: Add DP training pattern 3 for CHV

2014-07-29 Thread Jesse Barnes
On Sat, 28 Jun 2014 02:04:25 +0300 ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > CHV supports DP training pattern 3. Add the required stuff. > > Signed-off-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/i915_reg.h | 2 ++ > drivers/gpu/drm/i915/intel_dp.c | 18 ++

Re: [Intel-gfx] [PATCH 29/40] drm/i915: Refactor Broadwell PIPE_CONTROL emission into a helper.

2014-07-29 Thread Jesse Barnes
On Sat, 28 Jun 2014 02:04:20 +0300 ville.syrj...@linux.intel.com wrote: > From: Kenneth Graunke > > We'll want to reuse this for a workaround. > > Signed-off-by: Kenneth Graunke > --- > drivers/gpu/drm/i915/intel_ringbuffer.c | 36 > - > 1 file changed, 22 ins

Re: [Intel-gfx] [PATCH 27/40] drm/i915: Split a few long debug prints

2014-07-29 Thread Jesse Barnes
On Sat, 28 Jun 2014 02:04:18 +0300 ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > Split some WM debug prints to multiple lines. This shouldn't hurt > grappability since the important part is at the start and the rest > is just repeated stuff for each pipe. > > Signed-off-by: Vil

Re: [Intel-gfx] [PATCH 14/40] drm/i915: Override display PHY TX FIFO reset master on chv

2014-07-29 Thread Jesse Barnes
On Sat, 28 Jun 2014 02:04:05 +0300 ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > Just an attempt to frob these bits. Apparently we should not need to > touch them (apart from maybe making sure the override is disabled so > that the hardware automagically does the right thing). >

Re: [Intel-gfx] [PATCH 12/40] drm/i915: Clarify CHV swing margin/deemph bits

2014-07-29 Thread Jesse Barnes
On Sat, 28 Jun 2014 02:04:03 +0300 ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > CHV display PHY registes have two swing margin/deemph settings. Make it > clear which ones we're using. > > Signed-off-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/i915_reg.h | 8 ++-- >

Re: [Intel-gfx] [PATCH 11/40] drm/i915: Call intel_{dp, hdmi}_prepare for chv

2014-07-29 Thread Jesse Barnes
On Sat, 28 Jun 2014 02:04:02 +0300 ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > CHV was forgotten the intel_{dp,hdmi}_prepare() were introduced (or the > chv patches were still in flight?). Call these when enabling the ports. > > Things tend to work much better when we actuall

Re: [Intel-gfx] [PATCH 09/40] drm/i915: Split chv_update_pll() apart

2014-07-29 Thread Jesse Barnes
On Sat, 28 Jun 2014 02:04:00 +0300 ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > Split chv_update_pll() into two parts ala: > commit bdd4b6a655749970cc632aafc5fd596c07b60b1c > Author: Daniel Vetter > Date: Thu Apr 24 23:55:11 2014 +0200 > > drm/i915: Extract vlv_prepa

Re: [Intel-gfx] [PATCH 08/40] drm/i915: Leave DPLL ref clocks on

2014-07-29 Thread Jesse Barnes
On Sat, 28 Jun 2014 02:03:59 +0300 ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > We enable the DPLL refclock already when bringing up the cmnlane power > well, so also leave it on when otherwise disabling the DPLL. > > Signed-off-by: Ville Syrjälä > --- > drivers/gpu/drm/i915

Re: [Intel-gfx] [PATCH 07/40] drm/i915: Disable cdclk changes for chv until Punit is ready

2014-07-29 Thread Jesse Barnes
On Sat, 28 Jun 2014 02:03:58 +0300 ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > Punit seems a bit WIP still. Disable cdclk changes until we have > hardware where it works. > > Signed-off-by: Ville Syrjälä > --- > drivers/gpu/drm/i915/intel_display.c | 8 > 1 file ch

Re: [Intel-gfx] [PATCH 06/40] drm/i915: Add cdclk change support for chv

2014-07-29 Thread Jesse Barnes
On Sat, 28 Jun 2014 02:03:57 +0300 ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > Looks like the Punit is supposed to support the 400MHz cdclk directly on > chv, so we don't need the vlv tricks. > > FIXME: Punit doesn't seem ready for this yet on current hw > > Signed-off-by: V

Re: [Intel-gfx] [PATCH] drm/i915: s/seqno/request/ tracking inside objects

2014-07-29 Thread Jesse Barnes
On Tue, 29 Jul 2014 12:41:26 +0200 Daniel Vetter wrote: > On Tue, Jul 29, 2014 at 08:29:53AM +0100, Chris Wilson wrote: > > On Mon, Jul 28, 2014 at 01:44:12PM -0700, Jesse Barnes wrote: > > > > @@ -3038,44 +3203,35 @@ out: > > > > */ > > > > int > > > > i915_gem_object_sync(struct drm_i915_ge

Re: [Intel-gfx] [PATCH 1/2] drm/i915: factor out intel_edp_panel_vdd_sanitize

2014-07-29 Thread Ville Syrjälä
On Fri, Jun 27, 2014 at 09:35:13PM +0300, Imre Deak wrote: > This will be needed by an upcoming patch too that needs to sanitize the > VDD state during resume. The additional async disabling is only needed > for the resume path, here it doesn't make a difference since we enable > VDD right after th

Re: [Intel-gfx] [PATCH 1/3] drm/i915: fix cursor handling when runtime suspended

2014-07-29 Thread Paulo Zanoni
2014-07-29 7:22 GMT-03:00 Ville Syrjälä : > On Mon, Jul 28, 2014 at 03:37:12PM -0300, Paulo Zanoni wrote: >> From: Paulo Zanoni >> >> If we're runtime suspended and try to use the cursor interfaces, we >> will get a lot of WARNs saying we did the wrong thing. >> >> For intel_crtc_update_cursor(),

Re: [Intel-gfx] [PATCH] drm/i915: Correctly read backlight PWM for pipe B on vlv/chv

2014-07-29 Thread Barbalho, Rafael
> -Original Message- > From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf > Of Barbalho, Rafael > Sent: Tuesday, July 29, 2014 2:38 PM > To: Ville Syrjälä > Cc: intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH] drm/i915: Correctly read backlight PWM

Re: [Intel-gfx] [PATCH] drm/i915: Correctly read backlight PWM for pipe B on vlv/chv

2014-07-29 Thread Barbalho, Rafael
> -Original Message- > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] > Sent: Tuesday, July 29, 2014 2:13 PM > To: Barbalho, Rafael > Cc: intel-gfx@lists.freedesktop.org > Subject: Re: [PATCH] drm/i915: Correctly read backlight PWM for pipe B on > vlv/chv > > On Tue, Jul 29, 20

Re: [Intel-gfx] [PATCH] drm/i915: Correctly read backlight PWM for pipe B on vlv/chv

2014-07-29 Thread Ville Syrjälä
On Tue, Jul 29, 2014 at 01:44:40PM +0100, rafael.barba...@intel.com wrote: > From: Rafael Barbalho > > Make the vlv/chv backlight setup more generic by actually looking at which > pipe the panel is attached to and read the backlight PWM registers that were > setup by the bios from that pipe. > >

[Intel-gfx] [PATCH] drm/i915: Correctly read backlight PWM for pipe B on vlv/chv

2014-07-29 Thread rafael . barbalho
From: Rafael Barbalho Make the vlv/chv backlight setup more generic by actually looking at which pipe the panel is attached to and read the backlight PWM registers that were setup by the bios from that pipe. Cc: Ville Syrjälä Signed-off-by: Rafael Barbalho --- drivers/gpu/drm/i915/intel_panel

Re: [Intel-gfx] [PATCH 2/3] drm/i915: wait for all DSI FIFOs to be empty

2014-07-29 Thread Imre Deak
On Sat, 2014-07-12 at 17:17 +0530, Shobhit Kumar wrote: > Ensure that the DSI packets for a particular sequence are completely > sent before going ahead in the enabling or disabling of the panel > > Signed-off-by: Shobhit Kumar Reviewed-by: Imre Deak > --- > drivers/gpu/drm/i915/intel_dsi.c

Re: [Intel-gfx] [v2] drm/i915: Add correct hw/sw config check for DSI encoder

2014-07-29 Thread Imre Deak
On Tue, 2014-07-15 at 18:15 +0530, Shobhit Kumar wrote: > Check in vlv_crtc_clock_get if DPLL is enabled before calling dpio read. > It will not be enabled for DSI and avoid dpio read WARN dumps. > > Absence of ->get_config was causing other WARN dumps as well. Update > dpll_hw_state as well corre

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add get_config implementation for DSI encoder

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 02:38:36PM +0300, Imre Deak wrote: > On Sat, 2014-07-12 at 17:17 +0530, Shobhit Kumar wrote: > > Call to vlv_crtc_clock_get is not needed for DSI and was causing dpio > > read WARN dumps as well. Absence of ->get_config was casuing othet WARN > > dumps as well. With this the

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add get_config implementation for DSI encoder

2014-07-29 Thread Imre Deak
On Sat, 2014-07-12 at 17:17 +0530, Shobhit Kumar wrote: > Call to vlv_crtc_clock_get is not needed for DSI and was causing dpio > read WARN dumps as well. Absence of ->get_config was casuing othet WARN > dumps as well. With this the last of the known WARN dumps for DSI should > be fixed. > > Signe

Re: [Intel-gfx] [PATCH i-g-t] lib: don't abort if forcing the connector state fails

2014-07-29 Thread Chris Wilson
On Mon, Jul 28, 2014 at 05:34:55PM +0200, Daniel Vetter wrote: > On Mon, Jul 28, 2014 at 04:24:49PM +0100, Thomas Wood wrote: > > Ensure tests using igt_enable_connectors can still run even if the > > relevant debugfs files are not available. > > > > Signed-off-by: Thomas Wood > > --- > > lib/ig

Re: [Intel-gfx] [PATCH] drm/i915: vma/ppgtt lifetime rules

2014-07-29 Thread Chris Wilson
On Tue, Jul 29, 2014 at 01:06:40PM +0200, Daniel Vetter wrote: > On Tue, Jul 29, 2014 at 11:08:05AM +0100, Michel Thierry wrote: > > VMAs should take a reference of the address space they use. > > > > Now, when the fd is closed, it will release the ref that the context was > > holding, but it will

Re: [Intel-gfx] [PATCH i-g-t 1/5] lib: Remove unused field from struct igt_fb

2014-07-29 Thread Damien Lespiau
Pushed those, before I forget. -- Damien On Fri, Jul 11, 2014 at 03:09:01PM +0100, Damien Lespiau wrote: > Signed-off-by: Damien Lespiau > --- > lib/igt_fb.h | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/lib/igt_fb.h b/lib/igt_fb.h > index 6d030e6..f5110d4 100644 > --- a/lib/igt_fb.

Re: [Intel-gfx] [PATCH] drm/i915: vma/ppgtt lifetime rules

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 11:08:05AM +0100, Michel Thierry wrote: > VMAs should take a reference of the address space they use. > > Now, when the fd is closed, it will release the ref that the context was > holding, but it will still be referenced by any vmas that are still > active. > > ppgtt_rele

Re: [Intel-gfx] [PATCH 09/11] i915: add DP 1.2 MST support (v0.6)

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 12:50 PM, Dave Airlie wrote: > On 29 July 2014 20:46, Daniel Vetter wrote: >> On Wed, Jul 23, 2014 at 6:32 AM, Dave Airlie wrote: >>> On 23 July 2014 06:02, Paulo Zanoni wrote: 2014-06-05 1:01 GMT-03:00 Dave Airlie : > From: Dave Airlie > > This adds DP

Re: [Intel-gfx] [PATCH 09/11] i915: add DP 1.2 MST support (v0.6)

2014-07-29 Thread Dave Airlie
On 29 July 2014 20:46, Daniel Vetter wrote: > On Wed, Jul 23, 2014 at 6:32 AM, Dave Airlie wrote: >> On 23 July 2014 06:02, Paulo Zanoni wrote: >>> 2014-06-05 1:01 GMT-03:00 Dave Airlie : From: Dave Airlie This adds DP 1.2 MST support on Haswell systems. >>> >>> Hi >>> >>> It loo

Re: [Intel-gfx] [PATCH 09/11] i915: add DP 1.2 MST support (v0.6)

2014-07-29 Thread Daniel Vetter
On Wed, Jul 23, 2014 at 6:32 AM, Dave Airlie wrote: > On 23 July 2014 06:02, Paulo Zanoni wrote: >> 2014-06-05 1:01 GMT-03:00 Dave Airlie : >>> From: Dave Airlie >>> >>> This adds DP 1.2 MST support on Haswell systems. >> >> Hi >> >> It looks like drm-intel-nightly now includes this patch. It ac

Re: [Intel-gfx] [PATCH] drm/i915: s/seqno/request/ tracking inside objects

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 08:29:53AM +0100, Chris Wilson wrote: > On Mon, Jul 28, 2014 at 01:44:12PM -0700, Jesse Barnes wrote: > > > @@ -3038,44 +3203,35 @@ out: > > > */ > > > int > > > i915_gem_object_sync(struct drm_i915_gem_object *obj, > > > - struct intel_engine_cs *to) > > >

Re: [Intel-gfx] PROBLEM: Native backlight regressed from logarithmic to linear scale

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 06:14:16AM -0400, Anders Kaseorg wrote: > On Tue, 29 Jul 2014, Hans de Goede wrote: > > I've been thinking a bit about this, and I believe that the right answer > > here is to do the linear to logarithmic mapping in user-space. The intel > > backlight interface has a type

Re: [Intel-gfx] [PATCH] drm/i915: Rework GPU reset sequence to match driver load & thaw

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 08:36:33AM +0100, Chris Wilson wrote: > On Mon, Jul 28, 2014 at 11:26:38AM +0200, Daniel Vetter wrote: > > Oh, I guess that's the tricky bit why the old approach never worked - > > because reset_in_progress is set we failed the context/ppgtt loading > > through the rings and

Re: [Intel-gfx] [PATCH] drm: Add rotation_property to mode_config and creating it

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 12:40:29PM +0300, Ville Syrjälä wrote: > On Mon, Jul 28, 2014 at 08:47:22PM +0200, Daniel Vetter wrote: > > On Mon, Jul 28, 2014 at 06:29:41PM +0300, Ville Syrjälä wrote: > > > On Tue, Jul 15, 2014 at 05:43:37PM +0530, sonika.jin...@intel.com wrote: > > > > From: Sonika Jind

Re: [Intel-gfx] [PATCH 22/40] drm/i915: Add chv port D TX wells

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 12:54:36PM +0300, Imre Deak wrote: > On Mon, 2014-07-28 at 18:19 +0300, Ville Syrjälä wrote: > > On Fri, Jul 25, 2014 at 04:30:29PM +0300, Imre Deak wrote: > > > On Sat, 2014-06-28 at 02:04 +0300, ville.syrj...@linux.intel.com wrote: > > > > From: Ville Syrjälä > > > > > >

Re: [Intel-gfx] [PATCH 45/53] drm/i915/bdw: Do not call intel_runtime_pm_get() in an interrupt

2014-07-29 Thread Daniel Vetter
On Tue, Jul 29, 2014 at 08:37:48AM +0100, Chris Wilson wrote: > On Mon, Jul 28, 2014 at 10:54:06AM +0200, Daniel Vetter wrote: > > On Sat, Jul 26, 2014 at 11:27:38AM +0100, Chris Wilson wrote: > > > On Wed, Jun 18, 2014 at 10:54:13PM +0200, Daniel Vetter wrote: > > > > On Fri, Jun 13, 2014 at 04:38

Re: [Intel-gfx] [PATCH 1/3] drm/i915: fix cursor handling when runtime suspended

2014-07-29 Thread Ville Syrjälä
On Mon, Jul 28, 2014 at 03:37:12PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > If we're runtime suspended and try to use the cursor interfaces, we > will get a lot of WARNs saying we did the wrong thing. > > For intel_crtc_update_cursor(), all we need to do is return if the > CRTC is not

Re: [Intel-gfx] PROBLEM: Native backlight regressed from logarithmic to linear scale

2014-07-29 Thread Anders Kaseorg
On Tue, 29 Jul 2014, Hans de Goede wrote: > I've been thinking a bit about this, and I believe that the right answer > here is to do the linear to logarithmic mapping in user-space. The intel > backlight interface has a type of raw, clearly signalling to userspace > that it is a raw "untranslate

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