On Wed, 2013-09-18 at 09:03 +0800, Aaron Lu wrote:
> On 09/17/2013 09:34 PM, Igor Gnatenko wrote:
> > On Tue, 2013-09-17 at 17:23 +0800, Aaron Lu wrote:
> >> v1 has the subject of "Rework ACPI video driver" and is posted here:
> >> http://lkml.org/lkml/2013/9/9/74
> >> Since the objective is really
v2: Add a comment explaining the dangers of directly accessing the DFT
register (Daniel)
Signed-off-by: Ben Widawsky
---
tools/Makefile.am | 6 ++-
tools/intel_l3_parity.c| 46 --
tools/intel_l3_parity.h| 31
tools/intel_l3_udev_liste
Haswell added the ability to inject errors which is extremely useful for
testing. Add two arguments to the tool to inject, and uninject.
Signed-off-by: Ben Widawsky
---
tests/sysfs_l3_parity | 2 +-
tools/intel_l3_parity.c | 69 +++--
2 files change
Signed-off-by: Ben Widawsky
---
tools/intel_l3_parity.c | 45 -
1 file changed, 28 insertions(+), 17 deletions(-)
diff --git a/tools/intel_l3_parity.c b/tools/intel_l3_parity.c
index c98eb80..ed7034a 100644
--- a/tools/intel_l3_parity.c
+++ b/tools/int
Add a new command line argument to the tool which will spit out various
parameters for the giving hardware. As a result of this, some new
defines are added to help with the various info.
Signed-off-by: Ben Widawsky
---
tools/intel_l3_parity.c | 24
1 file changed, 20 ins
Haswell GT3 adds a new slice which is kept distinct from the old
register interface. Plumb it into the code, though it's only 1 slice
still.
Signed-off-by: Ben Widawsky
---
tools/intel_l3_parity.c | 106 +---
1 file changed, 65 insertions(+), 41 deleti
Add new command line arguments in addition to supporting the old
features. This patch only introduces one feature, the -e argument to
enable a specific row/bank/subbank. Previously you could only enable
all. Otherwise, it has what you expect (we prefer -r -b -s for
specifying the row/bank/subbank).
Signed-off-by: Ben Widawsky
---
tools/intel_l3_parity.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/tools/intel_l3_parity.c b/tools/intel_l3_parity.c
index ad027ac..970dcd6 100644
--- a/tools/intel_l3_parity.c
+++ b/tools/intel_l3_parity.c
@@ -58,12 +58,12 @@
v2: Don't assert for Valleyview (Bryan)
Rework code to be a bit more readable.
CC: "Bell, Bryan J"
Signed-off-by: Ben Widawsky
---
tools/intel_l3_parity.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/tools/intel_l3_parity.c b/tools/intel_l3_parity.c
index 970dcd6
On both Ivybridge and Haswell, row remapping information is saved and
restored with context. This means, we never actually properly supported
the l3 remapping because our sysfs interface is asynchronous (and not
tied to any context), and the known faulty HW would be reused by the
next context to ru
We'd only ever used this define to denote whether or not we have the
dynamic parity feature (DPF) and never to determine whether or not L3
exists. Baytrail is a good example of where L3 exists, and not DPF.
This patch provides clarify in the code for future use cases which might
want to actually q
I have implemented this patch before without creating a separate list
(I'm having trouble finding the links, but the messages ids are:
<1364942743-6041-2-git-send-email-...@bwidawsk.net>
<1365118914-15753-9-git-send-email-...@bwidawsk.net>)
However, the code is much simpler to just use a list and
Using LRI for setting the remapping registers allows us to stream l3
remapping information. This is necessary to handle per context remaps as
we'll see implemented in an upcoming patch.
Using the ring also means we don't need to frob the DOP clock gating
bits.
v2: Add comment about lack of worry
Certain HSW SKUs have a second bank of L3. This L3 remapping has a
separate register set, and interrupt from the first "slice". A slice is
simply a term to define some subset of the GPU's l3 cache. This patch
implements both the interrupt handler, and ability to communicate with
userspace about thi
Haswell changed the log registers to be WO, so we can no longer read
them to determine the programming (which sucks, see later note). For
now, simply use the cached value, and hope HW doesn't screw us over.
v2: Simplify the logic to avoid an extra !, remove last, and fix the
buffer offset which br
Hi all,
Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/intel_drv.h between commit 6e1b4fdad515 ("drm/i915:
Delay disabling of VGA memory until vgacon->fbcon handoff is done") from
Linus' tree and commit eb14cb747bc5 ("drm/i915: Add state readout and
checking
Hi all,
Today's linux-next merge of the drm-intel tree got a conflict in
drivers/gpu/drm/i915/i915_gem.c between commit 7dc19d5affd7 ("drivers:
convert shrinkers to new count/scan API") from the tree and commit
e656a6cba0fe ("drm/i915: inline vma_create into lookup_or_create_vma")
from the drm-in
On 09/17/2013 09:34 PM, Igor Gnatenko wrote:
> On Tue, 2013-09-17 at 17:23 +0800, Aaron Lu wrote:
>> v1 has the subject of "Rework ACPI video driver" and is posted here:
>> http://lkml.org/lkml/2013/9/9/74
>> Since the objective is really to fix Win8 backlight issues, I changed
>> the subject in th
On Wed, Sep 18, 2013 at 12:57:20AM +0100, Chris Wilson wrote:
> On Tue, Sep 17, 2013 at 04:48:50PM -0700, Ben Widawsky wrote:
> > On Wed, Sep 18, 2013 at 12:33:32AM +0100, Chris Wilson wrote:
> > > On Tue, Sep 17, 2013 at 04:14:43PM -0700, Ben Widawsky wrote:
> > > > On Tue, Sep 17, 2013 at 09:55:3
On Tue, Sep 17, 2013 at 04:52:59PM -0700, Ben Widawsky wrote:
> On Mon, Sep 16, 2013 at 06:18:28PM +, Bell, Bryan J wrote:
> > L3 dynamic parity is not supported on VLV. Please add the check for VLV.
> >
> > I can send you the email thread, if needed.
> >
> > --Thanks
> > Bryan
>
> More im
On Tue, Sep 17, 2013 at 04:48:50PM -0700, Ben Widawsky wrote:
> On Wed, Sep 18, 2013 at 12:33:32AM +0100, Chris Wilson wrote:
> > On Tue, Sep 17, 2013 at 04:14:43PM -0700, Ben Widawsky wrote:
> > > On Tue, Sep 17, 2013 at 09:55:35PM +0100, Chris Wilson wrote:
> > > > On Tue, Sep 17, 2013 at 10:01:3
On Mon, Sep 16, 2013 at 06:18:28PM +, Bell, Bryan J wrote:
> L3 dynamic parity is not supported on VLV. Please add the check for VLV.
>
> I can send you the email thread, if needed.
>
> --Thanks
> Bryan
More importantly, we need to fix this in the kernel too. Thanks for
catching this.
>
On Wed, Sep 18, 2013 at 12:33:32AM +0100, Chris Wilson wrote:
> On Tue, Sep 17, 2013 at 04:14:43PM -0700, Ben Widawsky wrote:
> > On Tue, Sep 17, 2013 at 09:55:35PM +0100, Chris Wilson wrote:
> > > On Tue, Sep 17, 2013 at 10:01:33AM -0700, Ben Widawsky wrote:
> > > > @@ -1117,8 +1109,13 @@ i915_gem
On Tue, Sep 17, 2013 at 04:14:43PM -0700, Ben Widawsky wrote:
> On Tue, Sep 17, 2013 at 09:55:35PM +0100, Chris Wilson wrote:
> > On Tue, Sep 17, 2013 at 10:01:33AM -0700, Ben Widawsky wrote:
> > > @@ -1117,8 +1109,13 @@ i915_gem_do_execbuffer(struct drm_device *dev,
> > > void *data,
> > >* b
On Tue, Sep 17, 2013 at 09:55:35PM +0100, Chris Wilson wrote:
> On Tue, Sep 17, 2013 at 10:01:33AM -0700, Ben Widawsky wrote:
> > @@ -1117,8 +1109,13 @@ i915_gem_do_execbuffer(struct drm_device *dev, void
> > *data,
> > * batch" bit. Hence we need to pin secure batches into the global gtt.
>
On Fri, Sep 13, 2013 at 12:17:17PM +0300, Ville Syrjälä wrote:
> On Thu, Sep 12, 2013 at 10:28:34PM -0700, Ben Widawsky wrote:
> > On both Ivybridge and Haswell, row remapping information is saved and
> > restored with context. This means, we never actually properly supported
> > the l3 remapping b
From: Ville Syrjälä
We have several problems with out VGA handling:
- We try to use the GMCH control VGA disable bit even though it may
be locked
- If we manage to disable VGA throuh GMCH control, we're no longer
able to correctly disable the VGA plane
- Taking part in the VGA arbitration is
On Tue, Sep 17, 2013 at 10:01:33AM -0700, Ben Widawsky wrote:
> @@ -1117,8 +1109,13 @@ i915_gem_do_execbuffer(struct drm_device *dev, void
> *data,
>* batch" bit. Hence we need to pin secure batches into the global gtt.
>* hsw should have this fixed, but let's be paranoid and do it
On Tue, Sep 17, 2013 at 9:50 PM, Peter Hurley wrote:
> On 09/11/2013 03:31 PM, Peter Hurley wrote:
>>
>> [+cc dri-devel]
>>
>> On 09/11/2013 11:38 AM, Steven Rostedt wrote:
>>>
>>> On Wed, 11 Sep 2013 11:16:43 -0400
>>> Peter Hurley wrote:
>>>
> The funny part is, there's a comment there that
On Tue, 17 Sep 2013, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> Sometimes I see the "non asle set request??" message on my Haswell
> machine, so I decided to get the spec and see if some bits are missing
> from the mask. We do have some bits missing from the mask, so this
> patch adds them, and
2013/9/17 Ville Syrjälä :
> On Tue, Sep 17, 2013 at 05:24:01PM +0100, Chris Wilson wrote:
>> On Tue, Sep 17, 2013 at 06:33:44PM +0300, ville.syrj...@linux.intel.com
>> wrote:
>> > From: Ville Syrjälä
>> >
>> > On HSW enabling a plane on a disabled pipe may hang the entire system.
>> > And there's
>> > + spin_lock_irqsave(&dev_priv->irq_lock, flags);
>> > + ilk_enable_gt_irq(dev_priv, GT_PARITY_ERROR);
>>
>> Is it actually safe to enable the second slice irq when there's no
>> second slice? This docs say it's just "reserved", but no mention
>> whether it RO or could there be side effect
On Fri, Sep 13, 2013 at 12:38:01PM +0300, Ville Syrjälä wrote:
> On Thu, Sep 12, 2013 at 10:28:31PM -0700, Ben Widawsky wrote:
> > Certain HSW SKUs have a second bank of L3. This L3 remapping has a
> > separate register set, and interrupt from the first "slice". A slice is
> > simply a term to defi
> -Original Message-
> From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> Sent: Tuesday, September 17, 2013 12:02 PM
> To: Bell, Bryan J
> Cc: Ben Widawsky; Widawsky, Benjamin; intel-gfx@lists.freedesktop.org;
> Venkatesh, Vishnu
> Subject: Re: [Intel-gfx] [PATCH 5/8] drm/i915:
2013/9/17 :
> v2 as requested.
>
> The first patch just got rebased, the second one I adjusted a bit.
I've been testing this for the last 5 minutes and it seems the problem
is fixed. Now instead of a hard hang I get a FIFO underrun :)
Tested-by: Paulo Zanoni
I'll keep using these patches (beca
On Tue, Sep 17, 2013 at 06:51:31PM +, Bell, Bryan J wrote:
> >> > +spin_lock_irqsave(&dev_priv->irq_lock, flags);
> >> > +ilk_enable_gt_irq(dev_priv, GT_PARITY_ERROR);
> >>
> >> Is it actually safe to enable the second slice irq when there's no
> >> second slice? This docs say
v2 as requested.
The first patch just got rebased, the second one I adjusted a bit.
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
From: Jani Nikula
The cursor is disabled before crtc mode set in crtc disable (and we
assert this is the case), and enabled afterwards in crtc enable. Do not
update it in crtc mode set.
On HSW enabling a plane on a disabled pipe may hang the entire system.
And there's no good reason for doing it
On Windows, with the hang bit set, we do the cache line replacement after an
error occurs, but nothing else [so L3 log registers are definitely responsive,
I don't know if other memory is also].
-Original Message-
From: daniel.vet...@ffwll.ch [mailto:daniel.vet...@ffwll.ch] On Behalf O
On Wed, 2013-09-11 at 11:21 +0300, Jani Nikula wrote:
> On Wed, 11 Sep 2013, Rodrigo Vivi wrote:
> > From: Kamal Mostafa
> >
> > Boot params quirks_set and quirks_mask allow the user to enable or
> > inhibit any dmi-matched quirks, overriding the dmi match table. Examples:
> >
> > i915.quirks_
From: Ben Widawsky
Building on the last patch which created the new function pointers in
the VM for bind/unbind, here we actually put those new function pointers
to use.
Split out as a separate patch to aid in review. I'm fine with squashing
into the previous patch if people request it.
v2: Upd
From: Ben Widawsky
As we plumb the code with more VM information, it has become more
obvious that the easiest way to deal with bind and unbind is to simply
put the function pointers in the vm, and let those choose the correct
way to handle the page table updates. This change allows many places in
On Tue, Sep 17, 2013 at 05:24:01PM +0100, Chris Wilson wrote:
> On Tue, Sep 17, 2013 at 06:33:44PM +0300, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > On HSW enabling a plane on a disabled pipe may hang the entire system.
> > And there's no good reason for doing it ever, s
On Tue, Sep 17, 2013 at 06:33:44PM +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> On HSW enabling a plane on a disabled pipe may hang the entire system.
> And there's no good reason for doing it ever, so just don't.
>
> v2: Move the crtc active checks to intel_crtc_cursor_
On Tue, Sep 17, 2013 at 12:12 AM, Daniel Vetter wrote:
> On Mon, Sep 16, 2013 at 02:56:43PM -0700, Tom.O'rou...@intel.com wrote:
>> From: Tom O'Rourke
>>
>> Enabling rps (turbo setup) was put in a work queue because it may
>> take quite awhile. This change flushes the work queue to initialize
>>
On Tue, 17 Sep 2013, Daniel Vetter wrote:
> On Tue, Sep 17, 2013 at 02:26:34PM +0300, Jani Nikula wrote:
>> This reduces dmesg noise when there's a glitch on the hpd line, or there
>> are more than one connectors on the same hpd line and only one of them
>> changes.
>>
>> While at it, switch to u
On Tue, 17 Sep 2013, ville.syrj...@linux.intel.com wrote:
> v2 as requested.
>
> The first patch just got rebased, the second one I adjusted a bit.
[dropping cc: stable]
So these two are for -fixes, right?
Unrelated to any hangs, there's still [1] that's destined to dinq, but
depends on patch 1/
From: Ville Syrjälä
On HSW enabling a plane on a disabled pipe may hang the entire system.
And there's no good reason for doing it ever, so just don't.
v2: Move the crtc active checks to intel_crtc_cursor_{set,move} to
avoid confusing people during modeset
Cc: sta...@vger.kernel.org
Signed-
On Tue, Sep 17, 2013 at 06:29:46PM +0300, Jani Nikula wrote:
> On Tue, 17 Sep 2013, Paulo Zanoni wrote:
> > From: Paulo Zanoni
> >
> > Sometimes I see the "non asle set request??" message on my Haswell
> > machine, so I decided to get the spec and see if some bits are missing
> > from the mask. W
On Tue, Sep 17, 2013 at 05:56:08PM +0300, Jani Nikula wrote:
> On Tue, 17 Sep 2013, Daniel Vetter wrote:
> > On Tue, Sep 17, 2013 at 02:26:34PM +0300, Jani Nikula wrote:
> >> This reduces dmesg noise when there's a glitch on the hpd line, or there
> >> are more than one connectors on the same hpd
On Tue, Sep 17, 2013 at 06:15:31PM +0300, Jani Nikula wrote:
> On Tue, 17 Sep 2013, Paulo Zanoni wrote:
> > From: Paulo Zanoni
> >
> > So far we control everything and nothing exceeds the current limits,
> > but (i) we never think about these limits when reviewing patches, (ii)
> > not all the ca
On Tue, 17 Sep 2013, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> So far we control everything and nothing exceeds the current limits,
> but (i) we never think about these limits when reviewing patches, (ii)
> not all the callers check the return values and (iii) if we ever hit
> any of these mes
On Tue, Sep 17, 2013 at 02:26:34PM +0300, Jani Nikula wrote:
> This reduces dmesg noise when there's a glitch on the hpd line, or there
> are more than one connectors on the same hpd line and only one of them
> changes.
>
> While at it, switch to use the friendly status names instead of numbers.
>
On Mon, Sep 16, 2013 at 09:29:31PM +0300, Ville Syrjälä wrote:
> > +struct stereo_mandatory_mode {
> > + int width, height, freq;
[..]
> > + unsigned int interlace_flag, layouts;
>
> What's the benefit of separating the two?
Just that we can easily cycle through the layout flags and add a m
From: Paulo Zanoni
So far we control everything and nothing exceeds the current limits,
but (i) we never think about these limits when reviewing patches, (ii)
not all the callers check the return values and (iii) if we ever hit
any of these messages, we'll have to fix the code that added the bad
From: Paulo Zanoni
Sometimes I see the "non asle set request??" message on my Haswell
machine, so I decided to get the spec and see if some bits are missing
from the mask. We do have some bits missing from the mask, so this
patch adds them, and the corresponding code to print "unsupported"
messag
On Tue, Sep 17, 2013 at 1:02 PM, Ville Syrjälä
wrote:
>
> But the problem is that addfb2 can't supply more than 4. So we need a new
> ioctl if we want to collect all that information inside a single drm_fb
> object. If we do add another ioctl then I think we should go at least to
> 16, since we mi
On Tue, 2013-09-17 at 17:23 +0800, Aaron Lu wrote:
> v1 has the subject of "Rework ACPI video driver" and is posted here:
> http://lkml.org/lkml/2013/9/9/74
> Since the objective is really to fix Win8 backlight issues, I changed
> the subject in this version, sorry about that.
>
> This patchset ha
On Tue, Sep 17, 2013 at 3:20 PM, Damien Lespiau
wrote:
> On Tue, Sep 17, 2013 at 12:37:48PM +0200, Daniel Vetter wrote:
>> I guess we should start to check that. For 3d framebuffers with 2
>> separate buffer handles for each plane I think we need to add another flag
>> to addfb2, e.g.
>>
>> #defin
On Tue, Sep 17, 2013 at 02:20:41PM +0100, Damien Lespiau wrote:
> On Tue, Sep 17, 2013 at 12:37:48PM +0200, Daniel Vetter wrote:
> > I guess we should start to check that. For 3d framebuffers with 2
> > separate buffer handles for each plane I think we need to add another flag
> > to addfb2, e.g.
>
On Tue, Sep 17, 2013 at 12:37:48PM +0200, Daniel Vetter wrote:
> I guess we should start to check that. For 3d framebuffers with 2
> separate buffer handles for each plane I think we need to add another flag
> to addfb2, e.g.
>
> #define DRM_MODE_FB_3D_2_FRAMES (1<<1) /* separate left/right buffer
On Tue, 2013-09-17 at 17:23 +0800, Aaron Lu wrote:
> According to Matthew Garrett, "Windows 8 leaves backlight control up
> to individual graphics drivers rather than making ACPI calls itself.
> There's plenty of evidence to suggest that the Intel driver for
> Windows 8 doesn't use the ACPI interfa
On Tue, 2013-09-17 at 17:23 +0800, Aaron Lu wrote:
> The backlight control and event delivery functionality provided by ACPI
> video module is mixed together and registered all during video device
> enumeration time. As a result, the two functionality are also removed
> together on module unload ti
On Tue, 2013-09-17 at 17:23 +0800, Aaron Lu wrote:
> Introduce a new API for modules to query if a specific type of backlight
> device has been registered. This is useful for some backlight device
> provider module(e.g. ACPI video) to know if a native control
> interface(e.g. the interface created
On Mon, Sep 16, 2013 at 02:33:06PM -0300, Paulo Zanoni wrote:
> 2013/9/16 :
> > From: Ville Syrjälä
> >
> > Reorganize the internal i915_request power well handling to use the
> > reference count just like everyone else. This way all we need to do is
> > check the reference count and we know whet
This reduces dmesg noise when there's a glitch on the hpd line, or there
are more than one connectors on the same hpd line and only one of them
changes.
While at it, switch to use the friendly status names instead of numbers.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_irq.c | 14
On Tue, Sep 17, 2013 at 12:37:48PM +0200, Daniel Vetter wrote:
> On Tue, Sep 17, 2013 at 12:54:09PM +0300, Ville Syrjälä wrote:
> > On Tue, Sep 17, 2013 at 10:03:12AM +0100, Damien Lespiau wrote:
> > > On Tue, Sep 17, 2013 at 11:20:46AM +0300, Ville Syrjälä wrote:
> > > > +++ b/drivers/gpu/drm/drm
On Tue, Sep 17, 2013 at 12:54:09PM +0300, Ville Syrjälä wrote:
> On Tue, Sep 17, 2013 at 10:03:12AM +0100, Damien Lespiau wrote:
> > On Tue, Sep 17, 2013 at 11:20:46AM +0300, Ville Syrjälä wrote:
> > > +++ b/drivers/gpu/drm/drm_crtc.c
> > > > @@ -2131,6 +2131,17 @@ int drm_mode_setcrtc(struct drm_
On Mon, Sep 16, 2013 at 11:52:17PM +0200, Daniel Vetter wrote:
> On Wed, Sep 04, 2013 at 06:25:31PM +0300, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > First of all we should not be looking at fb->{width,height} as those do
> > not tell us what the actual pipe size is. Sec
On Tue, Sep 17, 2013 at 10:03:12AM +0100, Damien Lespiau wrote:
> On Tue, Sep 17, 2013 at 11:20:46AM +0300, Ville Syrjälä wrote:
> > +++ b/drivers/gpu/drm/drm_crtc.c
> > > @@ -2131,6 +2131,17 @@ int drm_mode_setcrtc(struct drm_device *dev, void
> > > *data,
> > > goto out;
> > >
According to Matthew Garrett, "Windows 8 leaves backlight control up
to individual graphics drivers rather than making ACPI calls itself.
There's plenty of evidence to suggest that the Intel driver for
Windows 8 doesn't use the ACPI interface, including the fact that
it's broken on a bunch of machi
Introduce a new API for modules to query if a specific type of backlight
device has been registered. This is useful for some backlight device
provider module(e.g. ACPI video) to know if a native control
interface(e.g. the interface created by i915) is available and then do
things accordingly(e.g. a
The backlight control and event delivery functionality provided by ACPI
video module is mixed together and registered all during video device
enumeration time. As a result, the two functionality are also removed
together on module unload time or by the acpi_video_unregister function.
The two functi
v1 has the subject of "Rework ACPI video driver" and is posted here:
http://lkml.org/lkml/2013/9/9/74
Since the objective is really to fix Win8 backlight issues, I changed
the subject in this version, sorry about that.
This patchset has three patches, the first introduced a new API named
backlight
On Mon, Sep 16, 2013 at 06:48:43PM +0100, Damien Lespiau wrote:
> Next installment of the HDMI stereo 3D series, following:
> http://lists.freedesktop.org/archives/dri-devel/2013-September/044885.html
Seems like a v5 is shapping up. I'll summarise the discussion with
Daniel on IRC yesterday and
On Tue, Sep 17, 2013 at 11:20:46AM +0300, Ville Syrjälä wrote:
> +++ b/drivers/gpu/drm/drm_crtc.c
> > @@ -2131,6 +2131,17 @@ int drm_mode_setcrtc(struct drm_device *dev, void
> > *data,
> > goto out;
> > }
> >
> > + /*
> > +* Do not allow th
On Tue, Sep 17, 2013 at 11:22:26AM +0300, Ville Syrjälä wrote:
> On Mon, Sep 16, 2013 at 06:48:54PM +0100, Damien Lespiau wrote:
> > When scanning out a stereo mode, the AVI infoframe vic field has to be
> > the underlyng 2D VIC. Before that commit, we weren't matching the CEA
> > mode because of t
On Mon, Sep 16, 2013 at 06:48:54PM +0100, Damien Lespiau wrote:
> When scanning out a stereo mode, the AVI infoframe vic field has to be
> the underlyng 2D VIC. Before that commit, we weren't matching the CEA
> mode because of the extra stereo flag and then were setting the VIC
> field in the AVI i
On Mon, Sep 16, 2013 at 06:48:53PM +0100, Damien Lespiau wrote:
> There are a few things to be flushed out if we want to allow multiple
> buffers stereo framebuffers:
> - What with drm_planes? what semantics do they follow, what is the
> hardware able to do with them?
> - How do we define w
On Mon, Sep 16, 2013 at 10:41:38PM +0200, Daniel Vetter wrote:
> On Mon, Sep 16, 2013 at 02:14:47PM +0300, Jani Nikula wrote:
> > On Fri, 13 Sep 2013, ville.syrj...@linux.intel.com wrote:
> > > From: Ville Syrjälä
> > >
> > > Extract the code to calculate the dotclock from the link clock and M/N
>
On Wed, Sep 04, 2013 at 06:30:07PM +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Signed-off-by: Ville Syrjälä
Entire series merged to dinq, thanks for the patches.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_overlay.c | 5 +
> 1 file changed, 1 insertion(+), 4 delet
On Mon, Sep 16, 2013 at 10:44:29PM -0700, Ben Widawsky wrote:
> I'm sorry. After reading my comments again, you're absolutely right.
>
> How's this?
I'm liking it better, since it gives some insight into why GLOBAL_BIND
is required.
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
> b/drivers
On Tue, Sep 17, 2013 at 9:11 AM, Jani Nikula
wrote:
> Heh, I was reading the subject as relay-out, not re-layout for a while
> there. -ENOCOFFEE.
Added a dash to the commit message.
> On Tue, 17 Sep 2013, Daniel Vetter wrote:
>> Especially intel_gmch_panel_fitting was shifting way too much over
On Tue, Sep 17, 2013 at 6:15 AM, Ben Widawsky
wrote:
> I see. I had thought the hang bit was part of the test injection, when
> it's actually modifying the behavior or L3 errors. Any opinions on
> what the default should be (agreed that policy should be controlled by
> user space, but we can contr
On Tue, Sep 17, 2013 at 5:28 AM, Greg KH wrote:
> On Tue, Sep 17, 2013 at 01:13:26AM +0200, Daniel Vetter wrote:
>> Dear stable team,
>>
>> Please packport the following upstream commit to 3.10:
>>
>> commit 2960bc9cceecb5d556ce1c07656a66
>> 09e2f7e8b0
>> Author: Imre Deak
>> Date: Tue Jul 30 1
Heh, I was reading the subject as relay-out, not re-layout for a while
there. -ENOCOFFEE.
On Tue, 17 Sep 2013, Daniel Vetter wrote:
> Especially intel_gmch_panel_fitting was shifting way too much over the
> right edge and also was way too long. So extract two helpers, one for
> gen4+ and one for
On Mon, Sep 16, 2013 at 11:13:02PM +0100, Chris Wilson wrote:
> On Mon, Sep 16, 2013 at 11:23:43AM -0700, Ben Widawsky wrote:
> > On Mon, Sep 16, 2013 at 10:25:28AM +0100, Chris Wilson wrote:
> > > On Sat, Sep 14, 2013 at 03:03:17PM -0700, Ben Widawsky wrote:
> > > > +static void gen6_ggtt_bind_vma
I see. I had thought the hang bit was part of the test injection, when
it's actually modifying the behavior or L3 errors. Any opinions on
what the default should be (agreed that policy should be controlled by
user space, but we can control the default)? What does a "hang" mean
exactly, is the rest
On Tue, Sep 17, 2013 at 01:13:26AM +0200, Daniel Vetter wrote:
> Dear stable team,
>
> Please packport the following upstream commit to 3.10:
>
> commit 2960bc9cceecb5d556ce1c07656a66
> 09e2f7e8b0
> Author: Imre Deak
> Date: Tue Jul 30 13:36:32 2013 +0300
>
> drm/i915: make user mode sync
89 matches
Mail list logo
