---
tests/gem_dummy_reloc_loop.c | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/tests/gem_dummy_reloc_loop.c b/tests/gem_dummy_reloc_loop.c
index b67c7d3..c56d559 100644
--- a/tests/gem_dummy_reloc_loop.c
+++ b/tests/gem_dummy_reloc_loop.c
@@ -42,6 +42
---
lib/drmtest.c | 61 ++--
lib/drmtest.h |6 -
tests/gem_ring_sync_loop.c | 38 +--
3 files changed, 59 insertions(+), 46 deletions(-)
diff --git a/lib/drmtest.c b/lib/drmtest.c
index 2ddaff0..
On Thu, 2 May 2013 15:49:17 -0700
Ben Widawsky wrote:
> On Thu, May 02, 2013 at 02:26:17PM -0700, Jesse Barnes wrote:
> > On Tue, 23 Apr 2013 23:15:31 -0700
> > Ben Widawsky wrote:
> >
> > > Accomplish this be removing the PDE count define which is (and has
> > > always been) part of the PPGTT
On Thu, May 02, 2013 at 02:26:17PM -0700, Jesse Barnes wrote:
> On Tue, 23 Apr 2013 23:15:31 -0700
> Ben Widawsky wrote:
>
> > Accomplish this be removing the PDE count define which is (and has
> > always been) part of the PPGTT structure anyway. With the addition of
> > the gen specific init fun
We can't read the pfit regs if the power well is off, so use the cached
value.
v2: re-add lost comment (Jesse)
make sure the crtc using the fitter is actually enabled (Jesse)
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_display.c |2 +-
1 file changed, 1 insertion(+), 1 de
We can't read the pfit regs if the power well is off, so use the cached
value.
However, I think this check is incorrect (it was taken from an earlier
check against dev_priv). We should probably just drop it altogether,
since the panel fitter isn't useful without a pipe to fetch from and
an encode
Hi
2013/4/25 Jesse Barnes :
> And put the pfit stuff into substructs while we're at it.
>
> Signed-off-by: Jesse Barnes
> ---
> drivers/gpu/drm/i915/i915_drv.h |2 --
> drivers/gpu/drm/i915/intel_ddi.c |2 +-
> drivers/gpu/drm/i915/intel_display.c | 65
> -
On Tue, 23 Apr 2013 23:15:34 -0700
Ben Widawsky wrote:
> I think this is a nice generalization on it's own, but it's primarily
> prep work for my PPGTT support. Does this bother anyone?
>
> The only down side I can see is we waste 2k of cpu unmappable space
> (unless we have something else that
On Tue, 23 Apr 2013 23:15:32 -0700
Ben Widawsky wrote:
> It also makes some sense IMO to have these two functions separate
> irrespective of the number of callers.
>
> Only the single caller for now, but that will change as we add more
> PPGTTs.
>
> Signed-off-by: Ben Widawsky
> ---
> drivers
On Tue, 23 Apr 2013 23:15:31 -0700
Ben Widawsky wrote:
> Accomplish this be removing the PDE count define which is (and has
> always been) part of the PPGTT structure anyway. With the addition of
> the gen specific init function, we can nicely tuck away the magic number
> in there.
>
> In this v
2013/5/1 Daniel Vetter :
> Only one caller. Also drop the intel_ prefix as is now customary for
> platform specific and static functions.
>
> Signed-off-by: Daniel Vetter
Reviewed-by: Paulo Zanoni
> ---
> drivers/gpu/drm/i915/intel_display.c | 4 ++--
> drivers/gpu/drm/i915/intel_drv.h | 1
Hi
2013/5/1 Daniel Vetter :
> - PCH_ prefix for pch registers on ibx/cpt/ppt.
> - Drop the DP_ from the link defines, redundant.
> - Drop the GMCH from the data defines and instead give the special g4x
> registers a consistent _G4X postfix.
>
> Signed-off-by: Daniel Vetter
Yay, the new naming
On Tue, 23 Apr 2013 23:15:30 -0700
Ben Widawsky wrote:
> Because PPGTT PDEs within the GTT are calculated in cachelines
> (HW guys consistency ftw) we do a divide which will wreak havoc if this
> is wrong, and I know that from experience).
>
> If/when we move to multiple PPGTTs this will have to
On Tue, 23 Apr 2013 23:15:29 -0700
Ben Widawsky wrote:
> Because our context refcounting doesn't grab a ref at lookup time, it is
> unsafe to do so without the lock.
>
> NOTE: We don't have an easy way to put the assertion in the lookup
> function which is where this really belongs. Context swit
On Thu, May 02, 2013 at 02:38:09PM -0300, Paulo Zanoni wrote:
> 2013/5/2 Daniel Vetter :
> > On Thu, May 02, 2013 at 10:34:23AM -0300, Paulo Zanoni wrote:
> >> 2013/4/30 Daniel Vetter :
> >> > If we ever leak a non-DP compliant port width through here, we have a
> >> > pretty serious issue. So just
On Thu, 2013-05-02 at 14:45 -0300, Paulo Zanoni wrote:
> Hi
>
> 2013/4/29 Imre Deak :
> > According to BSpec the link training sequence for eDP on HSW port-A
> > should be as follows:
> >
> > 1. link training: clock recovery
> > 2. link training: equalization
> > 3. link training: set idle transmi
2013/5/1 Daniel Vetter :
> This is possible thanks to moving the m/n stuff into pipe_config.
>
> Unfortunately we need to move them a bit to avoid forward
> declarations.
>
> Signed-off-by: Daniel Vetter
Reviewed-by: Paulo Zanoni
> ---
> drivers/gpu/drm/i915/intel_display.c | 68
> ++
2013/5/1 Daniel Vetter :
> While at it, also extract a common helper to copy the timings from the
> cpu transcoder to the pch transcoder. That way it's really explicit
> how the lpt transcoder is hardcoded.
>
> Signed-off-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/i915_reg.h | 46 +++
Hi
2013/5/1 Daniel Vetter :
> Every time I read hsw code I get completely confused about this. So
> call it what it is more explicitly.
>
> Also, add an LPT_TRANSCONF for the pch transcoder A and use it in
> lpt-only code, to really unconfuse me.
>
> Signed-off-by: Daniel Vetter
> ---
> drivers/
Supposedly we should use the DAC divider for <300MHz pixel clocks, but as
that doesn't actually work as well as the high freq divider here in
practice, just use the high freq divider all the time.
v2: remove unconditional write (Jesse)
check for pixel rate properly (Jesse)
v3: give up, the DAC
But we need to get the right stolen base and make pre-allocated objects
for BIOS stuff so we don't clobber it. If the BIOS hasn't allocated a
power context, we allocate one here too, from stolen space as required
by the docs.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_drv.h
Both the docs and the existing code were wrong. So fix both and use a
switch statement like we do elsewhere to make things simple & clear.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_pm.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/
Instead of returning the cached value, which is just what the kernel
requested.
Reviewed-by: Kenneth Graunke
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/i915_sysfs.c |9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c
b/dri
Hi
2013/4/29 Imre Deak :
> According to BSpec the link training sequence for eDP on HSW port-A
> should be as follows:
>
> 1. link training: clock recovery
> 2. link training: equalization
> 3. link training: set idle transmission mode
> 4. display pipe enable
> 5. link training: disable (set norm
2013/5/2 Daniel Vetter :
> On Thu, May 02, 2013 at 10:34:23AM -0300, Paulo Zanoni wrote:
>> 2013/4/30 Daniel Vetter :
>> > If we ever leak a non-DP compliant port width through here, we have a
>> > pretty serious issue. So just rip out all these WARNs - if we need
>> > them it's probably better to
On Thu, May 02, 2013 at 11:37:02AM +0300, Mika Kuoppala wrote:
> Ben Widawsky writes:
>
> > On Tue, Apr 30, 2013 at 01:30:34PM +0300, Mika Kuoppala wrote:
> >> Before module unload is called, gpu_idle() will switch
> >> to default context. This will increment ref count of base
> >> object as the
Sorry for the following crappy message. I came travelling without my laptop.
Please note that one of my patches implement one shot shrinkers onto of
vmpressure mechanism. It can still be called frequently, because right now it
is called every time userspace would get an event. But at least it wo
On 04/30/2013 04:41 PM, Liam Girdwood wrote:
On Tue, 2013-04-30 at 12:29 +0200, David Henningsson wrote:
On 04/29/2013 05:02 PM, Jesse Barnes wrote:
On Sat, 27 Apr 2013 13:35:29 +0200
Daniel Vetter wrote:
On Sat, Apr 27, 2013 at 09:20:39AM +, Wang, Xingchao wrote:
Let me throw a basic p
On Thu, May 02, 2013 at 10:34:23AM -0300, Paulo Zanoni wrote:
> 2013/4/30 Daniel Vetter :
> > If we ever leak a non-DP compliant port width through here, we have a
> > pretty serious issue. So just rip out all these WARNs - if we need
> > them it's probably better to have them at a central place wh
Storing context reference into request struct
allows us to inspect context and its associated
objects when requests are retired.
Both ppgtt and arb robustness work will need
this.
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_drv.h |3 +++
drivers/gpu/drm/i915/i915_gem.c | 24
From: Chris Wilson
In order to be notified of when the context and all of its associated
objects is idle (for if the context maps to a ppgtt) we need a callback
from the retire handler. We can arrange this by using the kref_get/put
of the context for request tracking and by inserting a request to
2013/4/30 Daniel Vetter :
> If we ever leak a non-DP compliant port width through here, we have a
> pretty serious issue. So just rip out all these WARNs - if we need
> them it's probably better to have them at a central place where we
> compute the dp lane count.
>
> Also use the new DDI width mac
On Thu, 2013-05-02 at 11:33 +0200, Daniel Vetter wrote:
> On Thu, May 2, 2013 at 11:31 AM, Daniel Vetter wrote:
> > On Thu, May 2, 2013 at 11:17 AM, Chris Wilson
> > wrote:
> >> On Thu, May 02, 2013 at 12:00:03PM +0300, Imre Deak wrote:
> >>> Due to possible scheduling latencies wait_event_timeo
On Tue, Apr 30, 2013 at 03:00:50PM -0700, Kent Overstreet wrote:
> On Tue, Apr 30, 2013 at 10:53:55PM +0100, Mel Gorman wrote:
> > On Sat, Apr 27, 2013 at 03:19:13AM +0400, Glauber Costa wrote:
> > > diff --git a/drivers/md/bcache/btree.c b/drivers/md/bcache/btree.c
> > > index 03e44c1..8b9c1a6 100
On Thu, 2013-05-02 at 10:17 +0100, Chris Wilson wrote:
> On Thu, May 02, 2013 at 12:00:03PM +0300, Imre Deak wrote:
> > Due to possible scheduling latencies wait_event_timeout doesn't
> > guarantee a non-zero return value, even if the condition becomes true
> > before the specified timeout expires.
On Thu, May 2, 2013 at 11:31 AM, Daniel Vetter wrote:
> On Thu, May 2, 2013 at 11:17 AM, Chris Wilson
> wrote:
>> On Thu, May 02, 2013 at 12:00:03PM +0300, Imre Deak wrote:
>>> Due to possible scheduling latencies wait_event_timeout doesn't
>>> guarantee a non-zero return value, even if the cond
On Wed, May 01, 2013 at 05:26:38PM +0200, Daniel Vetter wrote:
> On Tue, Apr 30, 2013 at 11:53 PM, Mel Gorman wrote:
> > On Sat, Apr 27, 2013 at 03:19:13AM +0400, Glauber Costa wrote:
> >> diff --git a/drivers/gpu/drm/i915/i915_gem.c
> >> b/drivers/gpu/drm/i915/i915_gem.c
> >> index 6be940e..2e44
On Thu, May 2, 2013 at 11:17 AM, Chris Wilson wrote:
> On Thu, May 02, 2013 at 12:00:03PM +0300, Imre Deak wrote:
>> Due to possible scheduling latencies wait_event_timeout doesn't
>> guarantee a non-zero return value, even if the condition becomes true
>> before the specified timeout expires. Thu
On Thu, May 02, 2013 at 12:00:03PM +0300, Imre Deak wrote:
> Due to possible scheduling latencies wait_event_timeout doesn't
> guarantee a non-zero return value, even if the condition becomes true
> before the specified timeout expires. Thus we can incorrectly signal a
> timeout and abort a DP AUX
Due to possible scheduling latencies wait_event_timeout doesn't
guarantee a non-zero return value, even if the condition becomes true
before the specified timeout expires. Thus we can incorrectly signal a
timeout and abort a DP AUX transaction.
If wait_event_timeout returns 0, it's guaranteed that
Ben Widawsky writes:
> On Tue, Apr 30, 2013 at 01:30:34PM +0300, Mika Kuoppala wrote:
>> Before module unload is called, gpu_idle() will switch
>> to default context. This will increment ref count of base
>> object as the default context is 'running' on module unload
>> time. Unreference the drm
Hi Jesse,
> -Original Message-
> From: Barnes, Jesse
> Sent: Monday, April 29, 2013 11:02 PM
> To: Daniel Vetter
> Cc: Wang, Xingchao; Takashi Iwai; Li, Jocelyn; Daniel Vetter; Zanoni, Paulo R;
> ville.syrj...@linux.intel.com; Lin, Mengdong; Girdwood, Liam R;
> intel-gfx@lists.freedesktop.
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