On Wed, 20 Mar 2013 22:39:33 +
Chris Wilson wrote:
> On Wed, Mar 20, 2013 at 11:05:37PM +0100, Daniel Vetter wrote:
> > On Wed, Mar 20, 2013 at 09:51:05PM +0200, ville.syrj...@linux.intel.com
> > wrote:
> > > From: Ville Syrjälä
> > >
> > > Cc: sta...@vger.kernel.org
> >
> > One of the st
On Wed, Mar 20, 2013 at 11:39 PM, Chris Wilson wrote:
> On Wed, Mar 20, 2013 at 11:05:37PM +0100, Daniel Vetter wrote:
>> On Wed, Mar 20, 2013 at 09:51:05PM +0200, ville.syrj...@linux.intel.com
>> wrote:
>> > From: Ville Syrjälä
>> >
>> > Cc: sta...@vger.kernel.org
>>
>> One of the stable rules
On Wed, Mar 20, 2013 at 11:05:37PM +0100, Daniel Vetter wrote:
> On Wed, Mar 20, 2013 at 09:51:05PM +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Cc: sta...@vger.kernel.org
>
> One of the stable rules is that patches should fix real issues. So can you
> please hunt
On Wed, Mar 20, 2013 at 02:49:14PM -0700, Ben Widawsky wrote:
> Bspec mentions this for HSW+. I can't quite tell what the effects are,
> and I don't easily have a way to test this.
>
> Signed-off-by: Ben Widawsky
Checked with Bspec, HSD and wadb. Oh dear Intel, why does everything need
to be spl
On Wed, Mar 20, 2013 at 07:03:25PM -0300, Paulo Zanoni wrote:
> Hi
>
> 2013/3/17 Daniel Vetter :
> > On Thu, Mar 07, 2013 at 11:31:23AM +0200, Ville Syrjälä wrote:
> >> On Wed, Mar 06, 2013 at 08:03:08PM -0300, Paulo Zanoni wrote:
> >> > From: Paulo Zanoni
> >> >
> >> > We already have the same c
Hi
2013/3/15 Ben Widawsky :
> On Thu, Mar 07, 2013 at 12:26:23AM +0100, Daniel Vetter wrote:
>> On Wed, Mar 06, 2013 at 08:03:10PM -0300, Paulo Zanoni wrote:
>> > From: Paulo Zanoni
>> >
>> > It returns true if we're not supposed to touch the registers on the
>> > power down well.
>> >
>> > For n
Hi
2013/3/17 Daniel Vetter :
> On Thu, Mar 07, 2013 at 11:31:23AM +0200, Ville Syrjälä wrote:
>> On Wed, Mar 06, 2013 at 08:03:08PM -0300, Paulo Zanoni wrote:
>> > From: Paulo Zanoni
>> >
>> > We already have the same check on intel_enable_ddi. This patch
>> > prevents "unclaimed register" messag
On Wed, Mar 20, 2013 at 09:51:05PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Cc: sta...@vger.kernel.org
One of the stable rules is that patches should fix real issues. So can you
please hunt through bugzillas quickly and feed this to relevant bug
reports?
-Daniel
> Si
Bspec mentions this for HSW+. I can't quite tell what the effects are,
and I don't easily have a way to test this.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 3 +++
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i
On Wed, Mar 20, 2013 at 06:10:07PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> We do this for HDMI already, so I don't know why we wouldn't do
> it for SDVO as well.
>
> This is completely untested due to lack of hardware.
>
> Signed-off-by: Ville Syrjälä
Makes sense
On Wed, Mar 20, 2013 at 05:05:09PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> This comment looks like some historical leftover. Get rid of it.
>
> Signed-off-by: Ville Syrjälä
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel C
On Wed, Mar 20, 2013 at 09:57:53AM -0700, Jesse Barnes wrote:
> On Wed, 20 Mar 2013 09:33:28 -0700
> Ben Widawsky wrote:
>
> > On Wed, Mar 20, 2013 at 09:21:47AM -0700, Jesse Barnes wrote:
> > > On Tue, 19 Mar 2013 20:19:56 -0700
> > > Ben Widawsky wrote:
> > >
> > > > Change the gen6+ max dela
On Wed, Mar 20, 2013 at 03:01:34PM -0300, Paulo Zanoni wrote:
> Hi
>
> 2013/3/17 Daniel Vetter :
> > On Fri, Mar 15, 2013 at 12:10:02PM -0700, Ben Widawsky wrote:
> >> On Wed, Mar 06, 2013 at 08:03:14PM -0300, Paulo Zanoni wrote:
> >> > From: Paulo Zanoni
> >> >
> >> > So don't read it when we ha
From: Ville Syrjälä
Cc: sta...@vger.kernel.org
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 8a3d89e..89a2d6f 100644
--- a/drivers/gpu/d
On Fri, Mar 08, 2013 at 10:45:56AM -0800, Jesse Barnes wrote:
> Slightly different than other platforms.
>
> v2 [Jani]: Fix IOSF_BYTE_ENABLES_SHIFT shift. Use common routine.
>
> Signed-off-by: Jesse Barnes
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/i915_drv.h |2 ++
> drive
Hi
2013/3/17 Daniel Vetter :
> On Fri, Mar 15, 2013 at 12:10:02PM -0700, Ben Widawsky wrote:
>> On Wed, Mar 06, 2013 at 08:03:14PM -0300, Paulo Zanoni wrote:
>> > From: Paulo Zanoni
>> >
>> > So don't read it when we hang the GPU. This solves "unclaimed
>> > register" messages.
>> >
>> > Signed-o
On Wed, Mar 20, 2013 at 06:32:00PM +0200, Ville Syrjälä wrote:
> On Tue, Mar 19, 2013 at 10:57:25AM -0700, Jesse Barnes wrote:
> > On Tue, 19 Mar 2013 09:42:56 +0100
> > Daniel Vetter wrote:
> > > > --- a/include/uapi/drm/i915_drm.h
> > > > +++ b/include/uapi/drm/i915_drm.h
> > > > @@ -949,6 +949,
On Wed, 20 Mar 2013 09:33:28 -0700
Ben Widawsky wrote:
> On Wed, Mar 20, 2013 at 09:21:47AM -0700, Jesse Barnes wrote:
> > On Tue, 19 Mar 2013 20:19:56 -0700
> > Ben Widawsky wrote:
> >
> > > Change the gen6+ max delay if the pcode read was successful (not the
> > > inverse).
> > >
> > > The p
On Wed, 20 Mar 2013 09:43:00 -0700
Ben Widawsky wrote:
> BIOS should be setting this, but in case it doesn't...
>
> v2: Define the bits we actually want to clear (Jesse)
> Make it an RMW op (Jesse)
>
> Signed-off-by: Ben Widawsky
> ---
> drivers/gpu/drm/i915/i915_gem.c | 6 ++
> drivers/g
BIOS should be setting this, but in case it doesn't...
v2: Define the bits we actually want to clear (Jesse)
Make it an RMW op (Jesse)
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_gem.c | 6 ++
drivers/gpu/drm/i915/i915_reg.h | 3 +++
2 files changed, 9 insertions(+)
diff --gi
On Wed, Mar 20, 2013 at 09:21:47AM -0700, Jesse Barnes wrote:
> On Tue, 19 Mar 2013 20:19:56 -0700
> Ben Widawsky wrote:
>
> > Change the gen6+ max delay if the pcode read was successful (not the
> > inverse).
> >
> > The previous code was all sorts of wrong and has existed since I broke
> > it:
On Tue, Mar 19, 2013 at 03:35:55PM -0700, Jesse Barnes wrote:
> On Tue, 19 Mar 2013 15:27:36 -0700
> Ben Widawsky wrote:
>
> > On Fri, Mar 08, 2013 at 10:45:58AM -0800, Jesse Barnes wrote:
> > > From: Ben Widawsky
> > >
> > > Uses slightly different interfaces than other platforms.
> > >
> > >
On Tue, Mar 19, 2013 at 10:57:25AM -0700, Jesse Barnes wrote:
> On Tue, 19 Mar 2013 09:42:56 +0100
> Daniel Vetter wrote:
> > > --- a/include/uapi/drm/i915_drm.h
> > > +++ b/include/uapi/drm/i915_drm.h
> > > @@ -949,6 +949,7 @@ struct drm_intel_overlay_attrs {
> > > #define I915_SET_COLORKEY_NONE
On Tue, 19 Mar 2013 20:19:56 -0700
Ben Widawsky wrote:
> Change the gen6+ max delay if the pcode read was successful (not the
> inverse).
>
> The previous code was all sorts of wrong and has existed since I broke
> it:
> commit 42c0526c930523425ff6edc95b7235ce7ab9308d
> Author: Ben Widawsky
> D
From: Ville Syrjälä
We do this for HDMI already, so I don't know why we wouldn't do
it for SDVO as well.
This is completely untested due to lack of hardware.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_sdvo.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/dr
On Wed, 20 Mar 2013 14:45:52 +0100
Michal Srb wrote:
> Hi,
>
> I am debugging an issue with IBM POS machine (4852-570, Truman), with
> 8086:0102 Intel Sandybridge graphic card and internal monitor connected over
> display port.
>
> The issue is that sporadically, after mode change, the monito
On Wed, 20 Mar 2013 14:15:32 +0200
Imre Deak wrote:
> On Tue, 2013-02-19 at 13:31 -0800, Jesse Barnes wrote:
> > This one adds some extra checks on top of Chris's last set:
> > - check for panel fit modes when inheriting from the BIOS
> > - update pfit state at pipe_set_base time
>
> I misse
From: Ville Syrjälä
This comment looks like some historical leftover. Get rid of it.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index b3b22
On Wed, Mar 20, 2013 at 09:40:04AM +0100, Maarten Lankhorst wrote:
> Is the drmSetInterfaceVersion call really needed here? If I look at
> DRM_IOCTL_GET_UNIQUE,
> I don't see any requirement of drm master or anything, so it looks to me like
> for this specific race
> the drmSetInterfaceVersion ca
Hi,
I am debugging an issue with IBM POS machine (4852-570, Truman), with
8086:0102 Intel Sandybridge graphic card and internal monitor connected over
display port.
The issue is that sporadically, after mode change, the monitor remains blank.
There is no difference in drm.debug=0xe level log or
On Tue, 2013-02-19 at 13:31 -0800, Jesse Barnes wrote:
> If the mode is non-native using the panel fitter, don't try to re-use
> the fb the BIOS allocated for it.
>
> Signed-off-by: Jesse Barnes
> ---
> drivers/gpu/drm/i915/intel_fb.c | 12
> 1 file changed, 12 insertions(+)
>
>
On Tue, 2013-02-19 at 13:31 -0800, Jesse Barnes wrote:
> Turns out it's easy to get the clock, though it may correspond to a
> potential pfit mode. In that case, we may still be able to flip if
> we can get the native mode params somehow.
This should be merged to 6/13.
>
> Signed-off-by: Jesse
On Tue, 2013-02-19 at 13:31 -0800, Jesse Barnes wrote:
> We may need to disable the panel when flipping to a new buffer, so check
> the state here and zero it out if needed, otherwise leave it alone.
>
> Signed-off-by: Jesse Barnes
> ---
> drivers/gpu/drm/i915/intel_display.c | 19
On Tue, 2013-02-19 at 13:31 -0800, Jesse Barnes wrote:
> Missing a curly brace.
Should be merged into 6/13.
>
> Signed-off-by: Jesse Barnes
> ---
> drivers/gpu/drm/i915/intel_display.c |2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_displ
On Tue, 2013-02-19 at 13:31 -0800, Jesse Barnes wrote:
> From: Chris Wilson
>
> Read the current hardware state to retrieve the active mode and populate
> our CRTC config if that mode matches our presumptions.
>
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/i915_drv.h |2
On Tue, 2013-02-19 at 13:31 -0800, Jesse Barnes wrote:
> From: Chris Wilson
>
> Signed-off-by: Chris Wilson
> Signed-off-by: Jesse Barnes
> ---
> drivers/gpu/drm/i915/i915_dma.c |8 +-
> drivers/gpu/drm/i915/i915_drv.h |2 +-
> drivers/gpu/drm/i915/intel_display.c | 14 +-
>
On Tue, 2013-02-19 at 13:31 -0800, Jesse Barnes wrote:
> From: Chris Wilson
>
> This will be shared with wrapping the BIOS framebuffer into the fbdev
> later. In the meantime, we can tidy the code slightly and improve the
> error path handling.
>
> Signed-off-by: Chris Wilson
> ---
> drivers/g
On Tue, 2013-02-19 at 13:31 -0800, Jesse Barnes wrote:
> From: Chris Wilson
>
> Modifying the clock sources (via the DREF control on the PCH) is a slow
> multi-stage process as we need to let the clocks stabilise between each
> stage. If we are not actually changing the clock sources, then we can
On Tue, 2013-02-19 at 13:31 -0800, Jesse Barnes wrote:
> This one adds some extra checks on top of Chris's last set:
> - check for panel fit modes when inheriting from the BIOS
> - update pfit state at pipe_set_base time
I missed this version of the patchset and reviewed the previous one :/
Se
Daniel Vetter writes:
> Since
>
> commit 24a1f16de97c4cf0029d9acd04be06db32208726
> Author: Mika Kuoppala
> Date: Fri Feb 8 16:35:37 2013 +0200
>
> drm/i915: disable shared panel fitter for pipe
>
> We clear the single panel fitter when disabling the pipe it's attached to, so
> no
> need
Dear Daniel,
Am Dienstag, den 19.03.2013, 23:51 +0100 schrieb Daniel Vetter:
> The index variable points at a page table, not a page directory or a
> pde. Ben Widawsky fix this up correctly in his ppgtt cleanup, but I've
fix*ed*
> botched the job and copy&pasted the old confusion from the origi
Hi Dave,
Bunch of fixes, all pretty high-priority
- Fix execbuf argument checking (Kees Cook)
- Optionally obfuscate kernel addresses in dumps (Kees Cook)
- Two patches from Takashi Iwai to fix DP link training regressions he's
seen.
- intel-gfx is no longer subscribers-only (well, just no longe
Op 20-03-13 09:40, Maarten Lankhorst schreef:
> Hey,
>
> Op 19-03-13 22:13, Chris Wilson schreef:
>> On Tue, Mar 19, 2013 at 11:50:47AM +0100, Maarten Lankhorst wrote:
>>> The drmSetMaster call is needed, but the spinning is really just waiting
>>> for the workqueue to run.
>>>
>>> bryce's patch n
On Fri, Mar 15, 2013 at 11:17:47AM -0700, Ben Widawsky wrote:
> GEN supports a fusing option which subtracts the PCH display (making the
> CPU display also useless). In this configuration MMIO which gets decoded
> to a certain range will hang the CPU.
>
> For us, this is sort of the equivalent of
On Tue, Mar 19, 2013 at 08:19:56PM -0700, Ben Widawsky wrote:
> Change the gen6+ max delay if the pcode read was successful (not the
> inverse).
>
> The previous code was all sorts of wrong and has existed since I broke
> it:
> commit 42c0526c930523425ff6edc95b7235ce7ab9308d
> Author: Ben Widawsky
Hey,
Op 19-03-13 22:13, Chris Wilson schreef:
> On Tue, Mar 19, 2013 at 11:50:47AM +0100, Maarten Lankhorst wrote:
>> The drmSetMaster call is needed, but the spinning is really just waiting for
>> the workqueue to run.
>>
>> bryce's patch never worked, it just caused it to try drmsetinterfacever
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