Re: [Intel-gfx] [PATCH] drm/i915: Set guardband clipping workaround bit in the right register.

2012-10-05 Thread Paul Menzel
Dear Kenneth, thanks for the patch. Am Freitag, den 05.10.2012, 17:46 -0700 schrieb Kenneth Graunke: > Commit bf97b276ca04 Could you please paste the date, author and commit summary of this commit too? At least I cannot memorize hashes that well and having the summary pasted would give me enou

Re: [Intel-gfx] [RFC 0/4] drm: add raw monotonic timestamp support (Imre Deak)

2012-10-05 Thread Mario Kleiner
On 05.10.12 15:37, intel-gfx-requ...@lists.freedesktop.org wrote: Today's Topics: 1. [RFC 0/4] drm: add raw monotonic timestamp support (Imre Deak) 2. [RFC 1/4] time: export getnstime_raw_and_real for DRM (Imre Deak) 3. [RFC 2/4] drm: make memset/calloc for _vblank_time more

Re: [Intel-gfx] [RFC 1/4] time: export getnstime_raw_and_real for DRM

2012-10-05 Thread Mario Kleiner
Subject: Re: [RFC 4/4] drm: add support for raw monotonic vblank timestamps Message-ID: <1349446447.17758.73.camel@thor.local> Content-Type: text/plain; charset="ISO-8859-1" On Fre, 2012-10-05 at 16:59 +0300, Imre Deak wrote: On Fri, 2012-10-05 at 15:55 +0200, Michel D?nzer wrote: On

Re: [Intel-gfx] [RFC 4/4] drm: add support for raw monotonic vblank timestamps

2012-10-05 Thread Imre Deak
On Fri, 2012-10-05 at 18:09 -0600, Rob Clark wrote: > On Fri, Oct 5, 2012 at 5:41 PM, Imre Deak wrote: > > On Fri, 2012-10-05 at 16:18 -0600, Rob Clark wrote: > >> On Fri, Oct 5, 2012 at 7:37 AM, Imre Deak wrote: > >> > diff --git a/drivers/gpu/drm/i915/intel_display.c > >> > b/drivers/gpu/drm/i

[Intel-gfx] [PATCH] drm/i915: Set guardband clipping workaround bit in the right register.

2012-10-05 Thread Kenneth Graunke
Commit bf97b276ca04 accidentally set bit 5 in 3D_CHICKEN, which has nothing to do with clipping. This patch changes it to be set in 3D_CHICKEN3, where it belongs. The game "Dante" demonstrates random clipping issues when guardband clipping is enabled and bit 5 of 3D_CHICKEN3 isn't set. So the wo

Re: [Intel-gfx] [RFC 4/4] drm: add support for raw monotonic vblank timestamps

2012-10-05 Thread Imre Deak
On Fri, 2012-10-05 at 16:18 -0600, Rob Clark wrote: > On Fri, Oct 5, 2012 at 7:37 AM, Imre Deak wrote: > > diff --git a/drivers/gpu/drm/i915/intel_display.c > > b/drivers/gpu/drm/i915/intel_display.c > > index ab1ef15..056e810 100644 > > --- a/drivers/gpu/drm/i915/intel_display.c > > +++ b/driver

Re: [Intel-gfx] [RFC 0/4] drm: add raw monotonic timestamp support

2012-10-05 Thread Eric Anholt
Imre Deak writes: > This is needed to make applications depending on vblank/page flip > timestamps independent of time ajdustments. > > I've tested these with an updated intel-gpu-test/flip_test and will send > the update for that once there's no objection about this patchset. > > The patchset is

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Align the retire_requests worker to the nearest second

2012-10-05 Thread Jani Nikula
On Fri, 05 Oct 2012, Chris Wilson wrote: > By using round_jiffies() we can align the wakeup of our worker to the > nearest second in order to batch wakeups and reduce system load, which > is useful for unimportant coarse tasks like our retire_requests. Is there a reason not to just use INIT_DELAY

Re: [Intel-gfx] [RFC 1/4] time: export getnstime_raw_and_real for DRM

2012-10-05 Thread Kristian Høgsberg
On Fri, Oct 5, 2012 at 9:36 AM, Imre Deak wrote: > Needed by the upcoming DRM raw monotonic timestamp support. I just had a quick look at driver/input/evdev.c, since evdev devices did a similar change recently to allow evdev timestamp from the monotonic clock. They're using a different time API:

[Intel-gfx] [PATCH 2/2] drm/i915: Align the retire_requests worker to the nearest second

2012-10-05 Thread Chris Wilson
By using round_jiffies() we can align the wakeup of our worker to the nearest second in order to batch wakeups and reduce system load, which is useful for unimportant coarse tasks like our retire_requests. v2: round_jiffies_relative() already returns the relative timeout value, so no need to incor

[Intel-gfx] [PATCH 1/2] drm/i915: Align the hangcheck wakeup to the nearest second

2012-10-05 Thread Chris Wilson
round_jiffies() aligns the wakeup time to the nearest second in order to batch wakeups and reduce system load, which is useful for unimportant coarse timers like our hangcheck. v2: round_jiffies_relative() returns the relative jiffie value, whereas we need the absolute value for the timer. Sugges

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Align the retire_requests worker to the nearest second

2012-10-05 Thread Chris Wilson
On Fri, 05 Oct 2012 08:18:17 -0700, Arjan van de Ven wrote: > On 10/5/2012 6:53 AM, Chris Wilson wrote: > > By using round_jiffies() we can align the wakeup of our worker to the > > nearest second in order to batch wakeups and reduce system load, which > > is useful for unimportant coarse tasks l

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Align the hangcheck wakeup to the nearest second

2012-10-05 Thread Chris Wilson
On Fri, 05 Oct 2012 18:40:05 +0300, Jani Nikula wrote: > On Fri, 05 Oct 2012, Chris Wilson wrote: > > round_jiffies() aligns the wakeup time to the nearest second in order to > > batch wakeups and reduce system load, which is useful for unimportant > > coarse timers like our hangcheck. > > > > S

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Align the hangcheck wakeup to the nearest second

2012-10-05 Thread Jani Nikula
On Fri, 05 Oct 2012, Chris Wilson wrote: > round_jiffies() aligns the wakeup time to the nearest second in order to > batch wakeups and reduce system load, which is useful for unimportant > coarse timers like our hangcheck. > > Suggested-by: Arjan van de Ven > Signed-off-by: Chris Wilson > Cc: A

[Intel-gfx] [PATCH 10/10] drm/i915: pipe and planes should be disabled on haswell_crtc_mode_set

2012-10-05 Thread Paulo Zanoni
From: Paulo Zanoni So WARN in case they're not. It also does not make any sense to wait_for_vblank at this point. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c

[Intel-gfx] [PATCH 09/10] drm/i915: disable DDI_BUF_CTL at the correct time

2012-10-05 Thread Paulo Zanoni
From: Paulo Zanoni And also properly wait for its idle bit. You may notice that DDI_BUF_CTL is enabled in .enable but disabled in .post_disable instead of .disable. Yes, the mode set sequence is not exactly symmetrical, but let's assume the spec is correct unless we can prove it's wrong. Signed

[Intel-gfx] [PATCH 08/10] drm/i915: don't rely on previous values set on DDI_BUF_CTL

2012-10-05 Thread Paulo Zanoni
From: Paulo Zanoni Just set the only bit we need, everything else is either ignored on HDMI or should be set to zero. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_ddi.c | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/dri

[Intel-gfx] [PATCH 07/10] drm/i915: completely rewrite the Haswell PLL handling code

2012-10-05 Thread Paulo Zanoni
From: Paulo Zanoni Problems with the previous code: - HDMI just uses WRPLL1 for everything, so dual head cases might not work sometimes. - At encoder->mode_set we just write the PLL register without doing any kind of check (e.g., check if the PLL is already being used). - There is n

[Intel-gfx] [PATCH 06/10] drm/i915: add haswell_set_pipeconf

2012-10-05 Thread Paulo Zanoni
From: Paulo Zanoni It's a copy of ironlake_set_pipeconf with 2 differences: - There is no BPC field to set. - The interlaced mask is now 2 bits instead of 3. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_display.c | 27 +

[Intel-gfx] [PATCH 05/10] drm/i915: add proper CPU/PCH checks to crtc_mode_set functions

2012-10-05 Thread Paulo Zanoni
From: Paulo Zanoni On ironlake_crtc_mode_set, WARN if not using IBX or CPT. On haswell_crtc_mode_set, only run IBX/CPT code on IBX/CPT. I am still not sure whether IBX/CPT will be possible with a Haswell CPU, so leave the code there for now and put a WARN in case we spot it. Signed-off-by: Paul

[Intel-gfx] [PATCH 04/10] drm/i915: add haswell_crtc_mode_set

2012-10-05 Thread Paulo Zanoni
From: Paulo Zanoni It's just a copy of ironlake_crtc_mode_set. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 187 ++- 1 file changed, 186 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/

[Intel-gfx] [PATCH 03/10] drm/i915: enable and disable PIPE_CLK_SEL at the right time

2012-10-05 Thread Paulo Zanoni
From: Paulo Zanoni Previously we were enabling it at mode_set but never disabling. Let's follow the mode set sequence. Signed-off-by: Paulo Zanoni Reviewed-by: Damien Lespiau --- drivers/gpu/drm/i915/intel_ddi.c | 37 drivers/gpu/drm/i915/intel_display

[Intel-gfx] [PATCH 02/10] drm/i915: enable and disable DDI_FUNC_CTL at the right time

2012-10-05 Thread Paulo Zanoni
From: Paulo Zanoni And the right time is exactly after/before changing PIPE_CONF. See the documentation about the mode set sequence. This code is not inside any encoder-specific callback because DDI_FUNC_CTL is part of the pipe, so it is used by all encoders. Signed-off-by: Paulo Zanoni Review

[Intel-gfx] [PATCH 01/10] drm/i915: rewrite the LCPLL code

2012-10-05 Thread Paulo Zanoni
From: Paulo Zanoni Right now, we're trying to enable LCPLL at every mode set, but we're never disabling it. Also, we really don't want to be disabling LCPLL since it requires a very complex disable/enable sequence. This register should really be set by the BIOS and we shouldn't be touching it. St

[Intel-gfx] [PATCH 00/10] Haswell pipe and clocking fixes

2012-10-05 Thread Paulo Zanoni
From: Paulo Zanoni Hi This is a resend of the first 10 patches of the 47-patch series sent a few days ago, with comments received on IRC and email applied. Main changes: - Patch 1 rewritten. Damien pointed some things and I also had a conversation with an engineer and concluded that we sh

Re: [Intel-gfx] [RFC 4/4] drm: add support for raw monotonic vblank timestamps

2012-10-05 Thread Imre Deak
On Fri, 2012-10-05 at 16:14 +0200, Michel Dänzer wrote: > On Fre, 2012-10-05 at 16:59 +0300, Imre Deak wrote: > > On Fri, 2012-10-05 at 15:55 +0200, Michel Dänzer wrote: > > > On Fre, 2012-10-05 at 16:37 +0300, Imre Deak wrote: > > > > In practice we never want the timestamps for vblank and page

Re: [Intel-gfx] [RFC 4/4] drm: add support for raw monotonic vblank timestamps

2012-10-05 Thread Imre Deak
On Fri, 2012-10-05 at 15:55 +0200, Michel Dänzer wrote: > On Fre, 2012-10-05 at 16:37 +0300, Imre Deak wrote: > > In practice we never want the timestamps for vblank and page flip events > > to be affected by time adjustments, so in addition to the gettimeofday > > timestamps we used so far add su

[Intel-gfx] [PATCH 1/2] drm/i915: Align the hangcheck wakeup to the nearest second

2012-10-05 Thread Chris Wilson
round_jiffies() aligns the wakeup time to the nearest second in order to batch wakeups and reduce system load, which is useful for unimportant coarse timers like our hangcheck. Suggested-by: Arjan van de Ven Signed-off-by: Chris Wilson Cc: Arjan van de Ven --- drivers/gpu/drm/i915/i915_drv.h |

[Intel-gfx] [PATCH 2/2] drm/i915: Align the retire_requests worker to the nearest second

2012-10-05 Thread Chris Wilson
By using round_jiffies() we can align the wakeup of our worker to the nearest second in order to batch wakeups and reduce system load, which is useful for unimportant coarse tasks like our retire_requests. Suggested-by: Arjan van de Ven Signed-off-by: Chris Wilson Cc: Arjan van de Ven --- driv

Re: [Intel-gfx] [PATCH] drm/i915: Remove the disabling of VHR unit clock gating for HSW

2012-10-05 Thread Paulo Zanoni
2012/10/5 Damien Lespiau : > From: Damien Lespiau > > There's is another register (a read only, so no harm done) at 0x42020 on > Haswell GPUs. Let's just remove the write from the copy&paste that > introduced haswell_init_clock_gating(). > > A note for the interested reader, it does seem we have a

[Intel-gfx] [RFC 4/4] drm: add support for raw monotonic vblank timestamps

2012-10-05 Thread Imre Deak
In practice we never want the timestamps for vblank and page flip events to be affected by time adjustments, so in addition to the gettimeofday timestamps we used so far add support for raw monotonic timestamps. For backward compatibility use flags to select between the old and new timestamp forma

[Intel-gfx] [RFC 3/4] drm: use raw time in drm_calc_vbltimestamp_from_scanoutpos

2012-10-05 Thread Imre Deak
The timestamp is used here for handling the timeout case, so we don't want it to be affected by time adjustments. Signed-off-by: Imre Deak --- drivers/gpu/drm/drm_irq.c | 13 +++-- 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm

[Intel-gfx] [RFC 2/4] drm: make memset/calloc for _vblank_time more robust

2012-10-05 Thread Imre Deak
Using sizeof(*var) instead of sizeof(var_type) allows changing var_type w/o breaking callers that depend on the size. Signed-off-by: Imre Deak --- drivers/gpu/drm/drm_irq.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_

[Intel-gfx] [RFC 1/4] time: export getnstime_raw_and_real for DRM

2012-10-05 Thread Imre Deak
Needed by the upcoming DRM raw monotonic timestamp support. Signed-off-by: Imre Deak --- kernel/time/timekeeping.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c index d3b91e7..073d262 100644 --- a/kernel/time/timekeep

[Intel-gfx] [RFC 0/4] drm: add raw monotonic timestamp support

2012-10-05 Thread Imre Deak
This is needed to make applications depending on vblank/page flip timestamps independent of time ajdustments. I've tested these with an updated intel-gpu-test/flip_test and will send the update for that once there's no objection about this patchset. The patchset is based on danvet's dinq branch w

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Remove the WaDisableBackToBackFlipFix w/a for Haswell

2012-10-05 Thread Lespiau, Damien
On Thu, Oct 4, 2012 at 7:02 PM, Paulo Zanoni wrote: > It would be nice if we could volunteer someone to check the other > workarounds on the same function. The registers may exist but the WAs > may not be needed anymore. I've done a pass this morning and with the new patch posted list, I think we

Re: [Intel-gfx] [PATCH 10/47] drm/i915: pipe and planes should be disabled on haswell_crtc_mode_set

2012-10-05 Thread Lespiau, Damien
On Fri, Oct 5, 2012 at 1:53 PM, Paulo Zanoni wrote: > 2012/10/4 Lespiau, Damien : >> On Tue, Oct 2, 2012 at 9:51 PM, Paulo Zanoni wrote: >>> @@ -5356,8 +5361,6 @@ static int haswell_crtc_mode_set(struct drm_crtc >>> *crtc, >>> >>> haswell_set_pipeconf(crtc, adjusted_mode, dither); >>> >>

Re: [Intel-gfx] [PATCH 10/47] drm/i915: pipe and planes should be disabled on haswell_crtc_mode_set

2012-10-05 Thread Paulo Zanoni
2012/10/4 Lespiau, Damien : > On Tue, Oct 2, 2012 at 9:51 PM, Paulo Zanoni wrote: >> @@ -5356,8 +5361,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc, >> >> haswell_set_pipeconf(crtc, adjusted_mode, dither); >> >> - intel_wait_for_vblank(dev, pipe); >> - > > I guess this

[Intel-gfx] [PATCH] drm/i915: Remove the disabling of VHR unit clock gating for HSW

2012-10-05 Thread Damien Lespiau
From: Damien Lespiau There's is another register (a read only, so no harm done) at 0x42020 on Haswell GPUs. Let's just remove the write from the copy&paste that introduced haswell_init_clock_gating(). A note for the interested reader, it does seem we have a duplication of the 0x42020 register de