[Intel-gfx] [PATCH 08/12] drm/i915: HWSTAM is only 16-bit on gen3

2012-04-24 Thread Chris Wilson
Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_irq.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 878f1c3..a4e074e 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i9

[Intel-gfx] [PATCH 09/12] drm/i915: Cleanup gen3 irq uninstall

2012-04-24 Thread Chris Wilson
Bring the for-each-pipe loops together so that the code is easier on the eyes. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_irq.c | 11 --- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index

[Intel-gfx] [PATCH 07/12] drm/i915: Remove gen4 irq code from gen3 irq routine

2012-04-24 Thread Chris Wilson
A couple of miscellaneous cleanups as well to move per-loop condition variables within the scope of the loop and the update of the DRI1 breadcrumb to the tail of the function. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_irq.c | 55 +-- 1 file c

[Intel-gfx] [PATCH 04/12] drm/i915: Duplicate and split the gen3/4 irq handler

2012-04-24 Thread Chris Wilson
In preparation for rewriting the gen3 irq handler. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_irq.c | 810 ++- 1 file changed, 536 insertions(+), 274 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c i

[Intel-gfx] [PATCH 06/12] drm/i915: Remove gen3 irq code from gen4 irq routine

2012-04-24 Thread Chris Wilson
And a couple of miscellaneous cleanups to the main body of the IRQ loop; move per-loop condition variables within the scope of the loop and move the old DRI1 breadcrumb to the tail of the function and so only execute it once. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_irq.c | 27

[Intel-gfx] [PATCH 11/12] drm/i915: Inline I915_INTERRUPT_ENABLE_FIX

2012-04-24 Thread Chris Wilson
Since there is only one remaining user of I915_INTERRUPT_ENABLE_FIX, expand it at the callsite. Quoting Jesse Barnes: "I'd really like to get rid of these defines at the top of i915_irq.c. Some are unused and the others just make you check for the right bits everytime your read the code." Signed-

[Intel-gfx] [PATCH 10/12] drm/i915: Handle PendingFlip on gen3 robustly

2012-04-24 Thread Chris Wilson
We appear to allow too many pending pageflips as evidenced by an apparent pin-leak. So borrow the pageflip completion logic from i8xx for handling PendingFlip in a robust manner. v2: Address Jesse's reminders about the nuances of gen3 IRQ handling. References: https://bugzilla.kernel.org/show_bug

[Intel-gfx] [PATCH 12/12] drm/i915: Remove unused and unloved vblank macros

2012-04-24 Thread Chris Wilson
Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_irq.c | 11 --- 1 file changed, 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index a1150b7..d3500c7 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_i

[Intel-gfx] [PATCH 03/12] drm/i915: pending_flip_is_done is gen3, name it so

2012-04-24 Thread Chris Wilson
And remove the cargo-culted copy from the valleyview irq handler. Signed-off-by: Chris Wilson Reviewed-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_dma.c |4 drivers/gpu/drm/i915/i915_drv.h |2 +- drivers/gpu/drm/i915/i915_irq.c | 18 +- 3 files changed, 10 inse

[Intel-gfx] [PATCH 02/12] drm/i915: Remove redundant initialisation of per-ring IRQ waitqueues

2012-04-24 Thread Chris Wilson
The waitqueues are already initialised during ring initialisation so kill the redundant and duplicated code to do so in each generations IRQ installer. Signed-off-by: Chris Wilson Reviewed-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_irq.c | 17 - 1 file changed, 17 deletion

[Intel-gfx] [PATCH 01/12] drm/i915: Unconditionally initialise the interrupt workers

2012-04-24 Thread Chris Wilson
Rather than duplicate similar code across the IRQ installers, perform the initialisation of the workers upfront. This will lead to simpler teardown and quiescent code as we can assume that the workers have been initialised. Signed-off-by: Chris Wilson Reviewed-by: Jesse Barnes --- drivers/gpu/d

[Intel-gfx] [PATCH 05/12] drm/i915: Clear FlipDone semantics change for pageflipping on gen3

2012-04-24 Thread Chris Wilson
On later gen3, you are able to select the meaning of the FlipPending status bit in IIR and change it to FlipDone. This was sometimes done by the BIOS leading to confusion on just how pageflipping worked on gen3. Simplify the implementation by using the legacy meaning for all gen3 machines. Note: t

Re: [Intel-gfx] [PATCH] drm/i915: Use a global lock for modifying global irq flags

2012-04-24 Thread Ben Widawsky
On Tue, 24 Apr 2012 21:48:47 +0100 Chris Wilson wrote: > We were attempting to use a per-ring spinlock whilst modifying global > IRQ flags. A recipe for rare missed interrupts. > > Signed-off-by: Chris Wilson Regardless of whether or not this currently fixes anything, I need this for an upcomi

[Intel-gfx] [PATCH] drm/i915: Use a global lock for modifying global irq flags

2012-04-24 Thread Chris Wilson
We were attempting to use a per-ring spinlock whilst modifying global IRQ flags. A recipe for rare missed interrupts. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_ringbuffer.c | 41 ++- drivers/gpu/drm/i915/intel_ringbuffer.h |3 +-- 2 files change

Re: [Intel-gfx] [PATCH 5/6] drm/i915: Handle PendingFlip on gen3 robustly

2012-04-24 Thread Chris Wilson
On Tue, 24 Apr 2012 12:50:35 -0700, Jesse Barnes wrote: > > + /* "flip pending" bit means done if this bit is set */ > > + I915_WRITE(ECOSKPD, _MASKED_BIT_DISABLE(ECO_FLIP_DONE)); > > + > > Aha. I hope this works across platforms. I don't even know why this

Re: [Intel-gfx] [PATCH 5/6] drm/i915: Handle PendingFlip on gen3 robustly

2012-04-24 Thread Daniel Vetter
On Tue, Apr 24, 2012 at 12:50:35PM -0700, Jesse Barnes wrote: > On Tue, 24 Apr 2012 18:31:30 +0100 > Chris Wilson wrote: > > - if (dev->primary->master) { > > - master_priv = dev->primary->master->driver_priv; > > - if (master_priv->sarea_priv) > > -

Re: [Intel-gfx] [PATCH 6/6] drm/i915: Remove gen3 irq code from gen4 irq routine

2012-04-24 Thread Jesse Barnes
On Tue, 24 Apr 2012 18:31:31 +0100 Chris Wilson wrote: > --- > drivers/gpu/drm/i915/i915_irq.c | 27 ++- > 1 file changed, 10 insertions(+), 17 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index 47a540a..2ff431b 1006

Re: [Intel-gfx] [PATCH 5/6] drm/i915: Handle PendingFlip on gen3 robustly

2012-04-24 Thread Jesse Barnes
On Tue, 24 Apr 2012 18:31:30 +0100 Chris Wilson wrote: > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index b378555..47a540a 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -2307,7 +2307,7 @@ static void i915_irq_prein

Re: [Intel-gfx] [PATCH 1/2] drm/i915: use mode values consistently when converting to sdvo dtd

2012-04-24 Thread Chris Wilson
On Tue, 24 Apr 2012 18:27:57 +0200, Daniel Vetter wrote: > The drm_mode->dtd conversion used the crtc timings, whereas the > dtd->drm_mod did not set these. Use the standard mode information, not > the crtc timings, in both cases to make these two functions proper > inverses of each another. > >

Re: [Intel-gfx] [PATCH 3/6] drm/i915: pending_flip_is_done is gen3, name it so

2012-04-24 Thread Jesse Barnes
On Tue, 24 Apr 2012 18:31:28 +0100 Chris Wilson wrote: > And remove the cargo-culted copy from the valleyview irq handler. > > Signed-off-by: Chris Wilson > --- Note that VLV flipping needs other work, but it doesn't have this misfeature so we can drop it. Reviewed-by: Jesse Barnes -- Jess

Re: [Intel-gfx] [PATCH 2/6] drm/i915: Remove redundant initialisation of per-ring IRQ waitqueues

2012-04-24 Thread Jesse Barnes
On Tue, 24 Apr 2012 18:31:27 +0100 Chris Wilson wrote: > The waitqueues are already initialised during ring initialisation so > kill the redundant and duplicated code to do so in each generations IRQ > installer. > > Signed-off-by: Chris Wilson > --- Yep and that happens before we regsiter the

Re: [Intel-gfx] [PATCH 1/6] drm/i915: Unconditionally initialise the interrupt workers

2012-04-24 Thread Jesse Barnes
On Tue, 24 Apr 2012 18:31:26 +0100 Chris Wilson wrote: > Rather than duplicate similar code across the IRQ installers, perform > the initialisation of the workers upfront. This will lead to simpler > teardown and quiescent code as we can assume that the workers have > been initialised. > > Signe

Re: [Intel-gfx] [PATCH] drm/i915: Remove too early plane enable on pre-PCH hardware

2012-04-24 Thread Jesse Barnes
On Tue, 24 Apr 2012 16:36:50 +0100 Chris Wilson wrote: > Enabling the plane before we have assigned valid address means that it > will access random PTE (often with conflicting memory types) and cause > GPU lockups. However, enabling the plane too early appears to workaround > a number of bugs in

[Intel-gfx] [PATCH] drm/i915/overlay: Fully configure overlay before turning on

2012-04-24 Thread Chris Wilson
We seem to trigger an occasional error when the GPU tries to dereference a PTE for an overlay plane prior to us populating the offsets in the overlay registers. This is despite the Overlay Command being set to off. Close this window delaying the switch on until after those registers are initialised

[Intel-gfx] [PATCH 4/6] drm/i915: Duplicate and split the gen3/4 irq handler

2012-04-24 Thread Chris Wilson
In preparation for rewriting the gen3 irq handler. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_irq.c | 811 ++- 1 file changed, 537 insertions(+), 274 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c i

[Intel-gfx] [PATCH 5/6] drm/i915: Handle PendingFlip on gen3 robustly

2012-04-24 Thread Chris Wilson
We appear to allow too many pending pageflips as evidenced by an apparent pin-leak. So borrow the pageflip completion logic from i8xx for handling PendingFlip in a robust manner. References: https://bugzilla.kernel.org/show_bug.cgi?id=41882 Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i9

[Intel-gfx] [PATCH 6/6] drm/i915: Remove gen3 irq code from gen4 irq routine

2012-04-24 Thread Chris Wilson
--- drivers/gpu/drm/i915/i915_irq.c | 27 ++- 1 file changed, 10 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 47a540a..2ff431b 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i

[Intel-gfx] [PATCH 3/6] drm/i915: pending_flip_is_done is gen3, name it so

2012-04-24 Thread Chris Wilson
And remove the cargo-culted copy from the valleyview irq handler. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_dma.c |4 drivers/gpu/drm/i915/i915_drv.h |2 +- drivers/gpu/drm/i915/i915_irq.c | 18 +- 3 files changed, 10 insertions(+), 14 deletions(-)

[Intel-gfx] [PATCH 2/6] drm/i915: Remove redundant initialisation of per-ring IRQ waitqueues

2012-04-24 Thread Chris Wilson
The waitqueues are already initialised during ring initialisation so kill the redundant and duplicated code to do so in each generations IRQ installer. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_irq.c | 17 - 1 file changed, 17 deletions(-) diff --git a/drivers/

[Intel-gfx] [PATCH 1/6] drm/i915: Unconditionally initialise the interrupt workers

2012-04-24 Thread Chris Wilson
Rather than duplicate similar code across the IRQ installers, perform the initialisation of the workers upfront. This will lead to simpler teardown and quiescent code as we can assume that the workers have been initialised. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_irq.c | 16 +

[Intel-gfx] [PATCH] [-1/28] drm/i915: Remove i915_gem_evict_inactive()

2012-04-24 Thread Chris Wilson
This was only used by one external caller who would just be as happy with evict-everything, so perform the replacement and make the function private. In the process we note that unbinding the inactive list should not fail, and make it a warning instead. Signed-off-by: Chris Wilson --- Another ea

[Intel-gfx] [PATCH 2/2] drm/i915: properly handle interlaced bit for sdvo dtd conversion

2012-04-24 Thread Daniel Vetter
Maybe this make someone happy, because I'm pretty sure interlaced on sdvo won't work without this. Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_sdvo.c |4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c

[Intel-gfx] [PATCH 1/2] drm/i915: use mode values consistently when converting to sdvo dtd

2012-04-24 Thread Daniel Vetter
The drm_mode->dtd conversion used the crtc timings, whereas the dtd->drm_mod did not set these. Use the standard mode information, not the crtc timings, in both cases to make these two functions proper inverses of each another. Note that this also kills the risk that we handle interlaced timings i

Re: [Intel-gfx] [PATCH] drm/i915: implement Disable4x2SubspanOptimization w/a for ivb, too

2012-04-24 Thread Daniel Vetter
On Tue, Apr 24, 2012 at 08:57:42AM -0700, Ben Widawsky wrote: > On Tue, 24 Apr 2012 16:00:21 +0200 > Daniel Vetter wrote: > > > Copy&pasted from the vlv setup code. According to docs, we need that > > on ivb, too. > > > > v2: Use new masked bit handling macros. > > > > Cc: Ben Widawsky > > Sig

Re: [Intel-gfx] [PATCH] drm/i915: create macros to handle masked bits

2012-04-24 Thread Jesse Barnes
On Tue, 24 Apr 2012 14:04:12 +0200 Daniel Vetter wrote: > ... and put them to so good use. > > Note that there's functional change in vlv clock gating code, we now > no longer spuriously read back the current value of the bit. According > to Bspec the high bits should always read zeror, so ORing

Re: [Intel-gfx] [PATCH] drm/i915: implement Disable4x2SubspanOptimization w/a for ivb, too

2012-04-24 Thread Ben Widawsky
On Tue, 24 Apr 2012 16:00:21 +0200 Daniel Vetter wrote: > Copy&pasted from the vlv setup code. According to docs, we need that > on ivb, too. > > v2: Use new masked bit handling macros. > > Cc: Ben Widawsky > Signed-Off-by: Daniel Vetter Reviewed-by: Ben Widawsky

Re: [Intel-gfx] [PATCH] drm/i915: enable DOP level clock gating

2012-04-24 Thread Ben Widawsky
On Tue, 24 Apr 2012 16:03:24 +0200 Daniel Vetter wrote: > On Sat, Apr 21, 2012 at 05:57:08PM -0700, Ben Widawsky wrote: > > Rebased after new intel_pm split. This needs testing from QA to see how > > it impacts power consumption. > > > > Cc: "Zhang, Ouping" > > Signed-off-by: Ben Widawsky > >

[Intel-gfx] [PATCH] drm/i915: Remove too early plane enable on pre-PCH hardware

2012-04-24 Thread Chris Wilson
Enabling the plane before we have assigned valid address means that it will access random PTE (often with conflicting memory types) and cause GPU lockups. However, enabling the plane too early appears to workaround a number of bugs in our modesetting code. Cc: Franz Melchior References: https://b

Re: [Intel-gfx] [PATCH] drm/i915: rip out unnecessary calls to drm_mode_set_crtcinfo

2012-04-24 Thread Daniel Vetter
On Tue, Apr 24, 2012 at 04:11:43PM +0100, Chris Wilson wrote: > On Tue, 24 Apr 2012 15:41:37 +0200, Daniel Vetter > wrote: > > the only places we actually need the crtc timings is in the mode_set > > function. > > > > So we can now safely rip out all the remaining calls to set_crtcinfo > > left

Re: [Intel-gfx] [PATCH] drm/i915: rip out unnecessary calls to drm_mode_set_crtcinfo

2012-04-24 Thread Chris Wilson
On Tue, 24 Apr 2012 15:41:37 +0200, Daniel Vetter wrote: > the only places we actually need the crtc timings is in the mode_set > function. > > So we can now safely rip out all the remaining calls to set_crtcinfo > left in the driver and clean up this confusion. I have a little flicker of doubt

[Intel-gfx] [PATCH] drm/i915: Bump the inactive LRU on set-to-GTT-domain

2012-04-24 Thread Chris Wilson
Currently, we only bump the LRU of an object when we bind into the GTT for a page-fault. As the object may be used many times before its mapping is zapped, we do not mark it as active as frequently as we should. Userspace should be calling set-to-GTT-domain before each pointer deference (for synchr

[Intel-gfx] [PATCH 01/28] drm/i915: Remove the list of pinned inactive objects

2012-04-24 Thread Chris Wilson
Simplify object tracking by removing the inactive but pinned list. The only place where this was used is for counting the available memory, which is just as easy performed by checking all objects on the rare occasions it is required (application startup). For ease of debugging, we keep the reportin

[Intel-gfx] [PATCH 02/28] drm/i915: Remove the deferred-free list

2012-04-24 Thread Chris Wilson
The use of the mm_list by deferred-free breaks the following patches to extend the range of objects tracked. We can simplify things if we just make the unbind during free uninterrible. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_debugfs.c | 11 --- drivers/gpu/drm/i915/i915_d

[Intel-gfx] [PATCH 04/28] drm/i915: Only pwrite through the GTT if there is space in the aperture

2012-04-24 Thread Chris Wilson
Avoid stalling and waiting for the GPU by checking to see if there is sufficient inactive space in the aperture for us to bind the buffer prior to writing through the GTT. If there is inadequate space we will have to stall waiting for the GPU, and incur overheads moving objects about. Instead, only

[Intel-gfx] [PATCH 05/28] drm/i915: Try harder to allocate an mmap_offset

2012-04-24 Thread Chris Wilson
Given the persistence of an offset for the lifetime of an object, itis easy to contemplate how the mmap space becomes badly fragmented to the point that further allocations fail with ENOSPC. Our only recourse at this point is to try to purge the objects to release some space and reattempt the alloc

[Intel-gfx] [PATCH 07/28] drm/i915: Pin pages for pread

2012-04-24 Thread Chris Wilson
Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.c | 38 +++--- 1 file changed, 15 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index c81962b..e7aa44b 100644 --- a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH 12/28] drm/i915: Move GEM initialisation from i915_dma.c to i915_gem.c

2012-04-24 Thread Chris Wilson
Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_dma.c | 66 +-- drivers/gpu/drm/i915/i915_drv.h |1 + drivers/gpu/drm/i915/i915_gem.c | 64 + 3 files changed, 66 insertions(+), 65 deletions(-) diff --git a/

[Intel-gfx] [PATCH 10/28] drm/i915: Split the stolen handling for GEM out of i915_dma.c

2012-04-24 Thread Chris Wilson
We slightly modify the initialisation sequence to move the initialisation of the memory managers earlier and in particular before probing outputs and detecting any existing output configuration. This is essential if we wish to track preallocated objects and preserve them whilst initialising GEM. S

[Intel-gfx] [PATCH 15/28] drm/i915: Tidy handling of the scatterlist by ppgtt

2012-04-24 Thread Chris Wilson
Check to see if we've reached the end before dereferencing to get the next scatterlist. This helps when creating scatterlists by hand. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem_gtt.c |8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/dr

[Intel-gfx] [PATCH 13/28] drm/i915: Avoid clearing preallocated regions from the GTT

2012-04-24 Thread Chris Wilson
Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.h |2 ++ drivers/gpu/drm/i915/i915_gem_gtt.c | 32 +--- 2 files changed, 31 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 32e6c

[Intel-gfx] [PATCH 16/28] drm/i915: Delay allocation of stolen space for FBC

2012-04-24 Thread Chris Wilson
As we may wish to wrap regions preallocated by the BIOS, we need to do that before carving out contiguous chunks of stolen space for FBC. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.h|1 + drivers/gpu/drm/i915/i915_gem_stolen.c | 68 +--

[Intel-gfx] [PATCH 18/28] drm/i915: Allow objects to be created with no backing pages, but stolen space

2012-04-24 Thread Chris Wilson
In order to accommodate objects that are not backed by struct pages, but instead point into a contiguous region of stolen space, we need to make various changes to avoid dereferencing obj->pages or obj->base.filp. First introduce a marker for the stolen object, that specifies its offset into the s

[Intel-gfx] [PATCH 19/28] drm/i915: Support readback of stolen objects upon error

2012-04-24 Thread Chris Wilson
Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_irq.c | 13 - 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 24e1dd2..033f9be 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/g

[Intel-gfx] [PATCH 28/28] drm/i915: Wrap the preallocated BIOS framebuffer and preserve for KMS fbcon

2012-04-24 Thread Chris Wilson
Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_dma.c |4 ++ drivers/gpu/drm/i915/intel_display.c |3 - drivers/gpu/drm/i915/intel_drv.h |1 + drivers/gpu/drm/i915/intel_fb.c | 118 -- 4 files changed, 119 insertions(+), 7 delet

[Intel-gfx] [PATCH 20/28] drm/i915: Handle stolen objects in pwrite

2012-04-24 Thread Chris Wilson
Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.c | 46 ++- 1 file changed, 31 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index a0b6375..45f215f 100644 --- a/drivers/gpu/drm/i91

[Intel-gfx] [PATCH 22/28] drm/i915: Introduce i915_gem_object_create_stolen()

2012-04-24 Thread Chris Wilson
Allow for the creation of GEM objects backed by stolen memory. As these are not backed by ordinary pages, we create a fake dma mapping and store the address in the scatterlist rather than obj->pages. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.h|3 + drivers/gpu/drm

[Intel-gfx] [PATCH 23/28] drm/i915: Allocate fbcon from stolen memory

2012-04-24 Thread Chris Wilson
Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_fb.c |4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c index 71ef289..eb65e3c 100644 --- a/drivers/gpu/drm/i915/intel_fb.c +++ b/drivers/gpu/drm/i91

[Intel-gfx] [PATCH 09/28] drm: Introduce drm_mm_create_block()

2012-04-24 Thread Chris Wilson
To be used later by i915 to preallocate exact blocks of space from the range manager. Signed-off-by: Chris Wilson Cc: Dave Airlie --- drivers/gpu/drm/drm_mm.c | 49 ++ include/drm/drm_mm.h |4 2 files changed, 53 insertions(+) diff --g

[Intel-gfx] [PATCH 25/28] drm/i915: Allocate overlay registers from stolen memory

2012-04-24 Thread Chris Wilson
Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_overlay.c |6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index 9845cfc..22bb856 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +

[Intel-gfx] [PATCH 27/28] drm/i915: Split the framebuffer_info creation into a separate routine

2012-04-24 Thread Chris Wilson
This will be shared with wrapping the BIOS framebuffer into the fbdev later. In the meantime, we can tidy the code slightly and improve the error path handling. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_fb.c | 125 +-- 1 file changed, 69 inse

[Intel-gfx] [PATCH 26/28] drm/i915: Introduce i915_gem_object_create_stolen_for_preallocated

2012-04-24 Thread Chris Wilson
Wrap a preallocated region of stolen memory within an ordinary GEM object, for example the BIOS framebuffer. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.h|5 +++ drivers/gpu/drm/i915/i915_gem_stolen.c | 58 2 files changed, 63 inse

[Intel-gfx] [PATCH 24/28] drm/i915: Allocate ringbuffers from stolen memory

2012-04-24 Thread Chris Wilson
Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_ringbuffer.c |6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 2a3fcd6..a8b7605 100644 --- a/drivers/gpu/drm/i915/intel_rin

[Intel-gfx] [PATCH 21/28] drm/i915: Handle stolen objects for pread

2012-04-24 Thread Chris Wilson
Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.c | 44 ++- 1 file changed, 30 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 45f215f..e72f661 100644 --- a/drivers/gpu/drm/i91

[Intel-gfx] [PATCH 17/28] drm/i915: Extract general object init routine

2012-04-24 Thread Chris Wilson
As we wish to create specialised object constructions in the near future that share the same basic GEM object struct, export the default initializer. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.h |1 + drivers/gpu/drm/i915/i915_gem.c | 32 +++-

[Intel-gfx] [PATCH 14/28] drm/i915: Always use the scatterlists if available for GTT insertion

2012-04-24 Thread Chris Wilson
If we have created a scatterlist for the physical mapping of the object, simply use it. This facilitates the later insertion of stolen objects into the GATT which are not backed by struct page. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem_gtt.c | 19 --- 1 file

[Intel-gfx] [PATCH 11/28] drm/i915: Fix detection of stolen base for gen2

2012-04-24 Thread Chris Wilson
It was not until the G33 refresh, that a PCI config register was introduced that explicitly said where the stolen memory was. Prior to 865G there was not even a register that said where the end of usable low memory was and where the stolen memory began (or ended depending upon chipset). Before then

[Intel-gfx] [PATCH 08/28] drm/i915/debugfs: Show (count, size) of purgeable objects in i915_gem_objects

2012-04-24 Thread Chris Wilson
Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_debugfs.c | 19 ++- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index de7c65e..1e12c72 100644 --- a/drivers/gpu/drm/i915/i915_d

[Intel-gfx] [PATCH 06/28] drm/i915: Pin backing pages for pwrite

2012-04-24 Thread Chris Wilson
Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.c | 44 ++- 1 file changed, 20 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index af89ba4..c81962b 100644 --- a/drivers/gpu/drm/i91

[Intel-gfx] [PATCH 03/28] drm/i915: Track unbound pages

2012-04-24 Thread Chris Wilson
When dealing with a working set larger than the GATT, or even the mappable aperture when touching through the GTT, we end up with evicting objects only to rebind them at a new offset again later. Moving an object into and out of the GTT requires clflushing the pages, thus causing a double-clflush p

[Intel-gfx] Allocate objects from stolen memory in preparation for BIOS takeover

2012-04-24 Thread Chris Wilson
In comparison to last time, the use of generic objects backed by stolen memory is fully supported. This has been used to test stolen objects by allocating the ringbuffer, fbcon and other permanent objects out of stolen memory and using them in anger. The first several patches are in preparation fo

[Intel-gfx] [PATCH] drm/i915: rip out unnecessary calls to drm_mode_set_crtcinfo

2012-04-24 Thread Daniel Vetter
Our handling of the crtc timing computation has been nicely cargo-culted with calls to drm_mode_set_crtcinfo sprinkled all over the place. But with commit f9bef081c3c3f77bec54454872e98d3ec635756f Author: Daniel Vetter Date: Sun Apr 15 19:53:19 2012 +0200 drm/i915: don't clobber the special

Re: [Intel-gfx] [PATCH] drm/i915: enable DOP level clock gating

2012-04-24 Thread Daniel Vetter
On Sat, Apr 21, 2012 at 05:57:08PM -0700, Ben Widawsky wrote: > Rebased after new intel_pm split. This needs testing from QA to see how > it impacts power consumption. > > Cc: "Zhang, Ouping" > Signed-off-by: Ben Widawsky I've seen the internal power testing results and nothing seems to change.

[Intel-gfx] [PATCH] drm/i915: implement Disable4x2SubspanOptimization w/a for ivb, too

2012-04-24 Thread Daniel Vetter
Copy&pasted from the vlv setup code. According to docs, we need that on ivb, too. v2: Use new masked bit handling macros. Cc: Ben Widawsky Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_pm.c |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/dr

[Intel-gfx] [PATCH] drm/i915: CR clock gating is recommend to be set on PineView

2012-04-24 Thread Chris Wilson
The specs recommend that this bit be set on PineView. No reason is given, but it sounds like a powersaving bit that we should expect the BIOS to be setting... v2: Rebase on top of _MASKED_ENABLE_BIT Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_pm.c |3 +++ 1 file changed, 3 in

Re: [Intel-gfx] [PATCH] drm/i915: create macros to handle masked bits

2012-04-24 Thread Eugeni Dodonov
On Tue, Apr 24, 2012 at 10:24, Chris Wilson wrote: > On Tue, 24 Apr 2012 14:04:12 +0200, Daniel Vetter > wrote: > > ... and put them to so good use. > > > > Note that there's functional change in vlv clock gating code, we now > > no longer spuriously read back the current value of the bit. Accord

Re: [Intel-gfx] [PATCH] drm/i915: create macros to handle masked bits

2012-04-24 Thread Daniel Vetter
On Tue, Apr 24, 2012 at 02:24:33PM +0100, Chris Wilson wrote: > On Tue, 24 Apr 2012 14:04:12 +0200, Daniel Vetter > wrote: > > ... and put them to so good use. > > > > Note that there's functional change in vlv clock gating code, we now > > no longer spuriously read back the current value of the

Re: [Intel-gfx] [PATCH] drm/i915: create macros to handle masked bits

2012-04-24 Thread Chris Wilson
On Tue, 24 Apr 2012 14:04:12 +0200, Daniel Vetter wrote: > ... and put them to so good use. > > Note that there's functional change in vlv clock gating code, we now > no longer spuriously read back the current value of the bit. According > to Bspec the high bits should always read zeror, so ORin

[Intel-gfx] [PATCH] drm/i915: create macros to handle masked bits

2012-04-24 Thread Daniel Vetter
... and put them to so good use. Note that there's functional change in vlv clock gating code, we now no longer spuriously read back the current value of the bit. According to Bspec the high bits should always read zeror, so ORing this in should have no effect. Cc: Jesse Barnes Signed-Off-by: Da

Re: [Intel-gfx] Intel Mobile 4 Series on Lubuntu 12.04 don't work

2012-04-24 Thread Stefano Fraccaro
Il 24/04/2012 14.42, Chris Wilson ha scritto: On Tue, 24 Apr 2012 14:36:50 +0200, Stefano Fraccaro wrote: Without nomodeset I'm unable to start the pc: the system hang with a black screen And why is that? -Chris I don't know... some laptop start with kms enabled, others are unable to start

Re: [Intel-gfx] Intel Mobile 4 Series on Lubuntu 12.04 don't work

2012-04-24 Thread Chris Wilson
On Tue, 24 Apr 2012 14:36:50 +0200, Stefano Fraccaro wrote: > Il 24/04/2012 14.08, Chris Wilson ha scritto: > > Remove nomodeset from your kernel command line, be happy. -Chris > > Without nomodeset I'm unable to start the pc: the system hang with a > black screen And why is that? -Chris --

[Intel-gfx] [PATCH] drm/i915: CR clock gating is recommend to be set on PineView

2012-04-24 Thread Chris Wilson
The specs recommend that this bit be set on PineView. No reason is given, but it sounds like a powersaving bit that we should expect the BIOS to be setting... Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_pm.c |4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/dr

Re: [Intel-gfx] Intel Mobile 4 Series on Lubuntu 12.04 don't work

2012-04-24 Thread Stefano Fraccaro
Il 24/04/2012 14.08, Chris Wilson ha scritto: Remove nomodeset from your kernel command line, be happy. -Chris Without nomodeset I'm unable to start the pc: the system hang with a black screen ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.o

Re: [Intel-gfx] Intel Mobile 4 Series on Lubuntu 12.04 don't work

2012-04-24 Thread Chris Wilson
On Tue, 24 Apr 2012 14:05:17 +0200, Stefano Fraccaro wrote: > I have both 2a42 and 2a43. Strange is strange... with Ubuntu 10.10 32 > bit all works perfectly. I'm trying with an ubuntu 12.04 64 bit (instead > of Lubuntu). I have attached to this message all the logs that you have > requested

Re: [Intel-gfx] Intel Mobile 4 Series on Lubuntu 12.04 don't work

2012-04-24 Thread Daniel Vetter
On Tue, Apr 24, 2012 at 09:28:32AM +, Guo, Chaohong wrote: > Strange, even in upstream kernel, drm driver supports 2a42 only, but the id > of his device is 2a43 ? Hm, in that case we also need the output of lspci -nn -Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 4

Re: [Intel-gfx] [PATCH] drm/i915: properly check for MODESET for kms driver ioctls

2012-04-24 Thread Chris Wilson
On Tue, 24 Apr 2012 09:55:08 +0200, Daniel Vetter wrote: > Also ditch the cargo-culted dev_priv checks - either we have a > giant hole in our setup code or this is useless. Plainly bogus > to check for it in either case. > > v2: Chris Wilson noticed that I've missed one bogus dev_priv check. >

Re: [Intel-gfx] Intel Mobile 4 Series on Lubuntu 12.04 don't work

2012-04-24 Thread Guo, Chaohong
Strange, even in upstream kernel, drm driver supports 2a42 only, but the id of his device is 2a43 ? -minskey -Original Message- From: intel-gfx-bounces+chaohong.guo=intel@lists.freedesktop.org [mailto:intel-gfx-bounces+chaohong.guo=intel@lists.freedesktop.org] On Behalf Of Ch

Re: [Intel-gfx] [PATCH] drm/i915: properly check for MODESET for kms driver ioctls

2012-04-24 Thread Chris Wilson
On Tue, 24 Apr 2012 09:55:08 +0200, Daniel Vetter wrote: > Also ditch the cargo-culted dev_priv checks - either we have a > giant hole in our setup code or this is useless. Plainly bogus > to check for it in either case. > > v2: Chris Wilson noticed that I've missed one bogus dev_priv check. >

Re: [Intel-gfx] Intel Mobile 4 Series on Lubuntu 12.04 don't work

2012-04-24 Thread Chris Wilson
On Tue, 24 Apr 2012 11:06:06 +0200, Stefano Fraccaro wrote: > Hi, > there is a way to make my intel vga work properly? I can't find any > driver or solution... > My system is Lubuntu 12.04 x86_64. My intel card is 8086:2a43 rev07. Since it usually is just a case of installing the OS and pl

Re: [Intel-gfx] Intel Mobile 4 Series on Lubuntu 12.04 don't work

2012-04-24 Thread Daniel Vetter
On Tue, Apr 24, 2012 at 11:06:06AM +0200, Stefano Fraccaro wrote: > Hi, > there is a way to make my intel vga work properly? I can't find > any driver or solution... > My system is Lubuntu 12.04 x86_64. My intel card is 8086:2a43 rev07. It should work. I suggest you ask on ubuntu forums first

[Intel-gfx] Intel Mobile 4 Series on Lubuntu 12.04 don't work

2012-04-24 Thread Stefano Fraccaro
Hi, there is a way to make my intel vga work properly? I can't find any driver or solution... My system is Lubuntu 12.04 x86_64. My intel card is 8086:2a43 rev07. Cheers Stefano ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lis

[Intel-gfx] [PATCH] drm/i915: properly check for MODESET for kms driver ioctls

2012-04-24 Thread Daniel Vetter
Also ditch the cargo-culted dev_priv checks - either we have a giant hole in our setup code or this is useless. Plainly bogus to check for it in either case. v2: Chris Wilson noticed that I've missed one bogus dev_priv check. v3: The check in the overlay code is redundant (Chris) Signed-off-by:

Re: [Intel-gfx] [PATCH] drm/i915: properly check for MODESET for kms driver ioctls

2012-04-24 Thread Chris Wilson
On Tue, 24 Apr 2012 08:19:31 +0200, Daniel Vetter wrote: > diff --git a/drivers/gpu/drm/i915/intel_overlay.c > b/drivers/gpu/drm/i915/intel_overlay.c > index 0f0fe31..aa14235 100644 > --- a/drivers/gpu/drm/i915/intel_overlay.c > +++ b/drivers/gpu/drm/i915/intel_overlay.c > @@ -1122,10 +1122,8 @@

[Intel-gfx] [PATCH] drm/i915: move dri1 irq ioctl code to i915_dma.c

2012-04-24 Thread Daniel Vetter
Let's just get this out of the way. v2: Rebase against ENODEV changes. Reviewed-by: Chris Wilson Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/i915_dma.c | 110 +++ drivers/gpu/drm/i915/i915_drv.h |4 -- drivers/gpu/drm/i915/i915_irq.c | 110 --

[Intel-gfx] [PATCH] drm/i915: move dri1 vblank stubs to i915_dma.c

2012-04-24 Thread Daniel Vetter
i915_dma.c contains most of the old dri1 horror-show, so move the remaining bits there, too. The code has been removed and the only thing left are some stubs to ensure that userspace doesn't try to use this stuff. vblank_pipe_set only returns 0 without any side-effects, so we can even stub it out w

[Intel-gfx] [PATCH] drm/i915: check for kms in dri1 ioctls

2012-04-24 Thread Daniel Vetter
Calling these when gem assumes full control of the hw won't end in anything else than tears. So be a bit more paranoid here. Just serves as documentation. v2: Bail out with ENODEV as suggested by Chris Wilson. Reviewed-by: Chris Wilson Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/i91

[Intel-gfx] [PATCH] drm/i915: disallow gem ums init ioctl for kms

2012-04-24 Thread Daniel Vetter
This ioctl used in a kms driver is only useful to create massive havoc. v2: Bail out with -ENODEV as suggested by Chris Wilson. Reviewed-by: Chris Wilson Signed-Off-by: Daniel Vetter --- drivers/gpu/drm/i915/i915_gem.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/

[Intel-gfx] [PATCH] drm/i915: properly check for MODESET for kms driver ioctls

2012-04-24 Thread Daniel Vetter
Also ditch the cargo-culted dev_priv checks - either we have a giant hole in our setup code or this is useless. Plainly bogus to check for it in either case. v2: Chris Wilson noticed that I've missed one bogus dev_priv check. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c

Re: [Intel-gfx] [PATCH 01/22] drm/i915: properly check for MODESET for kms driver ioctls

2012-04-24 Thread Daniel Vetter
On Mon, Apr 23, 2012 at 11:23:15PM +0100, Chris Wilson wrote: > On Mon, 23 Apr 2012 16:50:48 +0200, Daniel Vetter > wrote: > > Also ditch the cargo-culted dev_priv checks - either we have a > > giant hole in our setup code or this is useless. Plainly bogus > > to check for it in either case. > >