On Tue, 24 Apr 2012 14:04:12 +0200, Daniel Vetter <daniel.vet...@ffwll.ch> wrote: > ... and put them to so good use. > > Note that there's functional change in vlv clock gating code, we now > no longer spuriously read back the current value of the bit. According > to Bspec the high bits should always read zeror, so ORing this in s/zeror/zero/ > should have no effect. > > Cc: Jesse Barnes <jbar...@virtuousgeek.org> > Signed-Off-by: Daniel Vetter <daniel.vet...@ffwll.ch>
The transforms here look fine, just a moment of concern for not repeating the MODE twiddling in init_render_ring after reset. Reviewed-by: Chris Wilson <ch...@chris-wilson.co.uk> -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
