Hello
I have Linux 3.3-rc2 with daniels interlace patches. When the television turns
off (dpms) and after turning on, the blacks are
green. This is highly reproducable, however I don't know exactly which
conditions have to exist.
Restarting X, putting television once again to stand-by and turnin
Highlights:
- intel_audio_dump improvements (Wu Fengguang)
- buildsystem improvements (Gaetan Nadon)
- solaris support (Alan Coopersmith)
- massive refactoring of testcases and rendercpy extraction
- new tests
- fixed up intel_reg_read/write for platforms needing forcewake (needs a
kernel patch w
Here are a few bug fixes for drm/i915. This fixes switching from
interlaced to non-interlaced mode at boot time, as well as a bunch of
regressions caused by bad DP bandwidth computations.
The following changes since commit acb42a3b611d7ad4cb173c3b37674b549df2ffeb:
Merge branch 'drm-fixes' of g
On Thu, Feb 09, 2012 at 04:21:31PM -0200, Eugeni Dodonov wrote:
> On Thu, Feb 9, 2012 at 14:15, Daniel Vetter wrote:
>
> > Hi all,
> >
> > I've rebased and updated my ppgtt patches. Only changes are somewhat
> > improved
> > commit messages (especially for the final patch that actually enables
>
We want to unconditionally enable ppgtt for two reasons:
- Windows uses this on snb and later.
- We need the basic hw support to work before we can think about real
per-process address spaces and other cool features we want.
But Chris Wilson was complaining all over irc and intel-gfx that this
w
This fixes the last false positive from libdrm for valgrind glxgears
for me.
---
I'm slightly nervous about removing memsets in favor of VG_CLEAR, in
case there are pad fields that might become important later. But the
only one I could think of that this ought to be the case for was
execbuf, and
<#part sign=pgpmime>
On Thu, 09 Feb 2012 17:33:23 +, Chris Wilson
wrote:
>
> That code already existed in intel_lvds_init():
> if (HAS_PCH_SPLIT(dev)) {
> if (I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
> return false
> ...
> }
Tricky. Do we have any idea how reliable t
On Thu, Feb 9, 2012 at 14:15, Daniel Vetter wrote:
> Hi all,
>
> I've rebased and updated my ppgtt patches. Only changes are somewhat
> improved
> commit messages (especially for the final patch that actually enables
> ppgtt) and
> an added module option in the last patch to please Chris.
>
> Ass
On Thu, Feb 9, 2012 at 07:35, Chris Wilson wrote:
> With the introduction of the PCH, we gained an LVDS presence pin but we
> continued to use the existing logic that asserted that LVDS was only
> supported on certain mobile chipsets. However, there are desktop
> IronLake systems with LVDS attach
On Thu, Feb 9, 2012 at 14:39, Chris Wilson wrote:
> On Thu, 9 Feb 2012 17:15:50 +0100, Daniel Vetter
> wrote:
> > v3: Pimp commit message and make Chris Wilson less grumpy by adding a
> > module option.
>
> > +void i915_gem_init_ppgtt(struct drm_device *dev)
> > +{
> > + drm_i915_private_t
On Thu, 09 Feb 2012 09:13:35 -0800, Keith Packard wrote:
> <#part sign=pgpmime>
> On Thu, 9 Feb 2012 09:35:53 +, Chris Wilson
> wrote:
> > With the introduction of the PCH, we gained an LVDS presence pin but we
> > continued to use the existing logic that asserted that LVDS was only
> > sup
<#part sign=pgpmime>
On Thu, 9 Feb 2012 09:35:53 +, Chris Wilson
wrote:
> With the introduction of the PCH, we gained an LVDS presence pin but we
> continued to use the existing logic that asserted that LVDS was only
> supported on certain mobile chipsets. However, there are desktop
> IronLa
<#part sign=pgpmime>
On Thu, 9 Feb 2012 08:04:26 -0200, Eugeni Dodonov wrote:
> Keith, Jesse - I think they are good -fixes candidates at this point.
I'll be sending a pull request today without these; please work with
Jesse to get them merged after that.
--
keith.pack...@intel.com
___
On Thu, 9 Feb 2012 17:15:43 +0100, Daniel Vetter
wrote:
> Hi all,
>
> I've rebased and updated my ppgtt patches. Only changes are somewhat improved
> commit messages (especially for the final patch that actually enables ppgtt)
> and
> an added module option in the last patch to please Chris.
>
On Thu, 9 Feb 2012 17:15:50 +0100, Daniel Vetter
wrote:
> v3: Pimp commit message and make Chris Wilson less grumpy by adding a
> module option.
> +void i915_gem_init_ppgtt(struct drm_device *dev)
> +{
> + drm_i915_private_t *dev_priv = dev->dev_private;
> + uint32_t pd_offset;
> +
We want to unconditionally enable ppgtt for two reasons:
- Windows uses this on snb and later.
- We need the basic hw support to work before we can think about real
per-process address spaces and other cool features we want.
But Chris Wilson was complaining all over irc and intel-gfx that this
w
This was pretty usefull for debugging, might be useful for diagnosing
issues.
Signed-off-by: Daniel Vetter
Reviewed-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_debugfs.c | 38 +++
1 files changed, 38 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/dr
Split out for easier cross-checking of the boring pieces with bspec.
Reviewed-by: Ben Widawsky
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/i915/i915_reg.h | 18 ++
1 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gp
This adds support to bind/unbind objects and wires it up. Objects are
only put into the ppgtt when necessary, i.e. at execbuf time.
Objects are still unconditionally put into the global gtt.
v2: Kill the quick hack and explicitly pass cache_level to ppgtt_bind
like for the global gtt function. No
This just adds the setup and teardown code for the ppgtt PDE and the
last-level pagetables, which are fixed for the entire lifetime, at
least for the moment.
v2: Kill the stray debug printk noted by and improve the pte
definitions as suggested by Chris Wilson.
v3: Clean up the aperture stealing c
We need this because ppgtt page directory entries need to be in the
global gtt pagetable.
Reviewed-by: Ben Widawsky
Signed-Off-by: Daniel Vetter
---
drivers/char/agp/intel-gtt.c |1 +
include/drm/intel-gtt.h |2 ++
2 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/driv
To implement a PPGTT for drm/i915 that fully aliases the GTT, we also
need to properly alias the scratch page.
Reviewed-by: Ben Widawsky
Signed-Off-by: Daniel Vetter
---
drivers/char/agp/intel-gtt.c |9 -
include/drm/intel-gtt.h |2 ++
2 files changed, 6 insertions(+), 5 de
Hi all,
I've rebased and updated my ppgtt patches. Only changes are somewhat improved
commit messages (especially for the final patch that actually enables ppgtt) and
an added module option in the last patch to please Chris.
Assuming nothing pops up I plan to merge this in 1-2 days.
Cheers, Dani
On Wed, Feb 01, 2012 at 10:23:05PM -0200, Eugeni Dodonov wrote:
> On Wed, Feb 1, 2012 at 19:39, Chris Wilson wrote:
>
> > On Wed, 1 Feb 2012 22:26:45 +0100, Daniel Vetter
> > wrote:
> > > Chris Wilson and me have again stared at funny error states and it's
> > > been pretty clear from the start
On 02/09/2012 11:43 AM, Chris Wilson wrote:
> In particular, declare the hidden CPU mmaps to valgrind so that it knows
> about those memory regions.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=35071
> Signed-off-by: Chris Wilson
Acked-by: Ben Widawsky
> ---
> configure.ac
On Thu, Feb 09, 2012 at 10:43:11AM +, Chris Wilson wrote:
> Every access to either the GTT or CPU pointer is supposed to be
> proceeded by a set_domain ioctl so that GEM is able to manage the cache
> domains correctly and for the following access to be coherent. Of
> course, some people explici
Every access to either the GTT or CPU pointer is supposed to be
proceeded by a set_domain ioctl so that GEM is able to manage the cache
domains correctly and for the following access to be coherent. Of
course, some people explicitly want incoherent, non-blocking access
which is going to trigger war
In particular, declare the hidden CPU mmaps to valgrind so that it knows
about those memory regions.
References: https://bugs.freedesktop.org/show_bug.cgi?id=35071
Signed-off-by: Chris Wilson
---
configure.ac |3 ++
intel/Makefile.am|1 +
intel/intel_bufmgr_gem.c |
On Tue, Jan 31, 2012 at 08:34:15PM +, Chris Wilson wrote:
> On Tue, 31 Jan 2012 21:08:14 +0100, Daniel Vetter
> wrote:
> > These are all user-trigerable, so tune down their loudness a notch.
> > For some of these we have i-g-t tests (because they prevent
> > newly-discovered bugs), without th
On Wed, Feb 8, 2012 at 21:29, Eugeni Dodonov wrote:
> On Wed, Feb 8, 2012 at 20:14, Kai Krakow wrote:
>
>> Eugeni Dodonov schrieb:
>>
>> > if you are among the ones affected by any kind of RC6 issues on Sandy
>> > Bridge platform, please, try the following patch and report if it
>> changes
>> >
On Wed, Feb 8, 2012 at 18:53, Kenneth Graunke wrote:
> These fix many GPU hangs for Eugeni, though not on my machine for some
> reason.
>
> Oddly, the register writes to UCGCTL2 and SQ_CHICKEN_MBCUNIT_CONFIG stick,
> but the writes to L3_CHICKEN_MODE, L3CNTLREG1, and COMMON_SLICE_CHICKEN1
> don't
With the introduction of the PCH, we gained an LVDS presence pin but we
continued to use the existing logic that asserted that LVDS was only
supported on certain mobile chipsets. However, there are desktop
IronLake systems with LVDS attached which we fail to detect. So for PCH,
trust the LVDS prese
If we don't have a sufficient number of free entries in the FIFO, we
proceed to do a write anyway. With this check we should have a clue if
that write actually failed or not.
After some discussion with Daniel Vetter regarding his original
complaint, we agreed upon this.
Signed-off-by: Ben Widawsk
This is similar to a patch I wrote several months ago. It's been updated
for the new FORCEWAKE_MT. As recommended by Chris Wilson, use WARN()
instead of DRM_ERROR, so we can get a backtrace.
This shouldn't impact performance too much as the extra register read
can replace the POSTING_READ we had p
Add register definitions for GTFIFODBG, and clear it during init time to
make sure state is correct.
This register tells us if either a read, or a write occurred while the
fifo was full. It seems like bit 2 is an OR of bit 0 and bit 1, so we
check that as well, but the documents are not quite clea
Someday I will get simple patches in one version... Alas that day is not
today.
Ben Widawsky (3):
drm/i915: use gtfifodbg
drm/i915: catch gtfifo errors on forcewake_put
drm/i915: check gtfifodbg after possibly failed writes
drivers/gpu/drm/i915/i915_drv.c | 30 ++
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