Re: [Intel-gfx] H.264/AVC encode, Intel(r) HD Graphics 2000/3000, linux

2011-07-19 Thread Lan, Hai
Currently there is a sample application named avcenc in libva to do the h.264 encoding. For the vaapi question, there is a mailing list named li...@lists.freedesktop.org. You can raise your question to it. Hai Lan > -Original Message- > From: intel-gfx-bounces+hai.lan=intel@lists.fr

Re: [Intel-gfx] H.264/AVC encode, Intel? HD Graphics 2000/3000, linux

2011-07-19 Thread Zou, Nanhai
Hi, Nobody is currently working on ffmpeg support. If you want to start implement, there is an anvenc.c in libva test to begin with. All snb encoding support are now in libva master branch (except B frame and frame rate control support) Those features are developing, we

[Intel-gfx] [PATCH] drm/i915: Skip GPU wait for scanout pin while wedged

2011-07-19 Thread Keith Packard
Failing to pin a scanout buffer will most likely lead to a black screen, so if the GPU is wedged, then just let the pin happen and hope that things work out OK. v2: Just ignore any error from i915_gem_object_wait_rendering, as suggested by Chris Wilson Signed-off-by: Keith Packard --- drivers/g

Re: [Intel-gfx] [PATCH] drm/i915: provide more error output when mode sets fail

2011-07-19 Thread Jesse Barnes
On Wed, 20 Jul 2011 01:14:47 +0100 Chris Wilson wrote: > On Tue, 19 Jul 2011 15:38:56 -0700, Jesse Barnes > wrote: > > If a mode set fails we may get a message from drm_crtc_helper if > > we're lucky, but it won't tell us anything about *why* we failed to > > set a mode. So add a few DRM_ERRORs

Re: [Intel-gfx] [PATCH] drm/i915: Skip GPU wait for scanout pin while wedged

2011-07-19 Thread Keith Packard
On Wed, 20 Jul 2011 01:03:17 +0100, Chris Wilson wrote: > This doesn't prevent us returning an error should the wait-rendering abort > due to a GPU hang occurring in the middle of the wait. Yeah, should probably check the return value and ignore the error instead. > i915_gem_object_pin_to_disp

Re: [Intel-gfx] [PATCH] drm/i915: provide more error output when mode sets fail

2011-07-19 Thread Chris Wilson
On Tue, 19 Jul 2011 15:38:56 -0700, Jesse Barnes wrote: > If a mode set fails we may get a message from drm_crtc_helper if we're lucky, > but it won't tell us anything about *why* we failed to set a mode. So > add a few DRM_ERRORs for the cases that shouldn't happen so we can debug > things more

Re: [Intel-gfx] [PATCH] drm/i915: Skip GPU wait for scanout pin while wedged

2011-07-19 Thread Chris Wilson
On Tue, 19 Jul 2011 16:26:43 -0700, Keith Packard wrote: > Failing to pin a scanout buffer will most likely lead to a black > screen, so if the GPU is wedged, then just let the pin happen and hope > that things work out OK. This doesn't prevent us returning an error should the wait-rendering abor

[Intel-gfx] 915GME support

2011-07-19 Thread Terumichi Sadahiro
Hi Matt, Ian. Thanks for your convincing and satisfactory explanation. Unfortunately, I don't have any 915GME board in hand and can't examine that. But I make sense of the situation. Best Regards, Terumichi On Wed, Jul 20, 2011 at 3:40 AM, Ian Romanick wrote: > -BEGIN PGP SIGNED MESSAGE---

[Intel-gfx] [PATCH] drm/i915: Skip GPU wait for scanout pin while wedged

2011-07-19 Thread Keith Packard
Failing to pin a scanout buffer will most likely lead to a black screen, so if the GPU is wedged, then just let the pin happen and hope that things work out OK. Signed-off-by: Keith Packard --- drivers/gpu/drm/i915/i915_gem.c | 12 +--- 1 files changed, 9 insertions(+), 3 deletions(-)

[Intel-gfx] H.264/AVC encode, Intel® HD Graphics 2000/3000, linux

2011-07-19 Thread Brian Brown
Is anyone aware of any linux projects (preferably ffmpeg) that can encode H.264/AVC using the iGPU of the sandy bridge Intel® HD Graphics 2000/3000? I see that there is a libva snb-encoder branch in vaapi. Has anyone developed a ffmpeg library that supports this? Sorry if this has been covered,

[Intel-gfx] [PATCH] drm/i915: provide more error output when mode sets fail

2011-07-19 Thread Jesse Barnes
If a mode set fails we may get a message from drm_crtc_helper if we're lucky, but it won't tell us anything about *why* we failed to set a mode. So add a few DRM_ERRORs for the cases that shouldn't happen so we can debug things more easily. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i

Re: [Intel-gfx] gen6 (SNB) depthbuffer issue with OpenGL games

2011-07-19 Thread Safety0ff
On 19/07/11 07:18 PM, Nicolas Kalkhof wrote: > Hi, > absolutely correct! I've experienced this issue the same way you > described during the 2.6.39-rc series in random occurance but much > less intensive. however it disappeared during the 3.0-rc series. now > the depth/alpha issue occurs instantly

Re: [Intel-gfx] gen6 (SNB) depthbuffer issue with OpenGL games

2011-07-19 Thread Ian Romanick
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 07/19/2011 01:21 PM, Nicolas Kalkhof wrote: > Hi all, > > ok I've nailed the issue down to 3.0.0-rc7 and 3.0.0-rc7-git1. I suspect that > the changes made in > drivers/gpu/drm/i915/i915_dma.c are the cause of the problem. > > http://www.kernel.or

Re: [Intel-gfx] [PATCH 01/10] intel: shared header for shader debugging

2011-07-19 Thread Julien Cristau
On Wed, Jul 13, 2011 at 13:51:43 -0700, Ben Widawsky wrote: > +#define SHADER_DEBUG_SOCKET "/tmp/gen_debug" Not sure what this is used for, but does it really need to be in /tmp? Cheers, Julien ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org

[Intel-gfx] Netiquette (was: gen6 (SNB) depthbuffer issue with OpenGL games)

2011-07-19 Thread Paul Menzel
Dear Nicolas, unfortunately the Web.de WWW interface has stopped to set the `In-Reply-To` or `References` header fields in the message header and therefore does not adhere to the standard anymore [1]. As a result your messages are not threaded correctly which make keeping an overview harder [2].

Re: [Intel-gfx] gen6 (SNB) depthbuffer issue with OpenGL games

2011-07-19 Thread Nicolas Kalkhof
Hi all, ok I've nailed the issue down to 3.0.0-rc7 and 3.0.0-rc7-git1. I suspect that the changes made in drivers/gpu/drm/i915/i915_dma.c are the cause of the problem. http://www.kernel.org/diff/diffview.cgi?file=%2Fpub%2Flinux%2Fkernel%2Fv3.0%2Fsnapshots%2Fpatch-3.0-rc7-git1.bz2;z=14 Any Clues

Re: [Intel-gfx] [Mesa-dev] [PATCH] intel: Fix stencil buffer to be W tiled

2011-07-19 Thread Chad Versace
On 07/18/2011 01:20 AM, Paul Menzel wrote: > Am Montag, den 18.07.2011, 00:55 -0700 schrieb Chad Versace: > There are alignment/white space issues above. > >> + unsigned stride = irb->region->pitch;\ >> + unsigned height = 2 * irb->region->height;

Re: [Intel-gfx] gen6 (SNB) depthbuffer issue with OpenGL games

2011-07-19 Thread Nicolas Kalkhof
Hi,absolutely correct! I've experienced this issue the same way you described during the 2.6.39-rc series in random occurance but much less intensive. however it disappeared during the 3.0-rc series. now the depth/alpha issue occurs instantly after starting the OGL app. I'll try to nail down the ba

Re: [Intel-gfx] gen6 (SNB) depthbuffer issue with OpenGL games

2011-07-19 Thread Safety0ff
On 19/07/11 02:58 PM, Nicolas Kalkhof wrote: > I've experienced a strange depth buffer issue recently with OpenGL games (see > attached screenshots). It seems that the depth buffer fails on some pixels. > This problem was introduced somewhere between Kernel-3.0.0-rc6-git6 and > kernel-3.0.0-rc7

Re: [Intel-gfx] gen6 (SNB) depthbuffer issue with OpenGL games

2011-07-19 Thread Nicolas Kalkhof
Hi Ian, thx for your reply. ok I give it a try and will report my findings regards nic -Ursprüngliche Nachricht- Von: "Ian Romanick" Gesendet: Jul 19, 2011 8:45:53 PM An: "Nicolas Kalkhof" Betreff: Re: [Intel-gfx] gen6 (SNB) depthbuffer issue with OpenGL games >-BEGIN PGP SIGN

Re: [Intel-gfx] gen6 (SNB) depthbuffer issue with OpenGL games

2011-07-19 Thread Ian Romanick
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 07/19/2011 07:58 AM, Nicolas Kalkhof wrote: > Hi there, > > I've experienced a strange depth buffer issue recently with OpenGL games > (see attached screenshots). It seems that the depth buffer fails on some > pixels. This problem was introduced so

Re: [Intel-gfx] 915GME support

2011-07-19 Thread Ian Romanick
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 07/14/2011 01:52 PM, Terumichi Sadahiro wrote: > I can't find any description about 915GME (not 915GM) in > intellinuxgraphics.org at all. > Does this device have so little demand for, or is there any problem? There are a lot of different variatio

[Intel-gfx] Excessive red or pinkness with Sandy Bridge

2011-07-19 Thread Gavin
Hi, Just wondering if anyone else is experiencing excessive red or pinkness. It's not the laptop screen since an external LCD monitor looks the same. This background (http://www.gnumims.org/) should be a pale yellow #FDFFE2. I guess the contrast is being over driven, is it possible to adjust thi

Re: [Intel-gfx] [Mesa-dev] [PATCH] intel: Fix stencil buffer to be W tiled

2011-07-19 Thread Eric Anholt
On Mon, 18 Jul 2011 17:00:54 -0700, Chad Versace wrote: > On 07/18/2011 08:57 AM, Eric Anholt wrote: > > On Mon, 18 Jul 2011 00:55:03 -0700, Chad Versace > > wrote: > >> diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c > >> b/src/mesa/drivers/dri/intel/intel_fbo.c > >> index 1669af2..507cc33