Re: [Intel-gfx] [PATCH 5/5] Xv: set up pipeline for Xv on Ivybridge

2011-06-23 Thread Xiang, Haihao
On Fri, 2011-06-24 at 13:03 +0800, Owain Ainsworth wrote: > On Thu, Jun 23, 2011 at 12:47:47AM +0800, Xiang, Haihao wrote: > > The configuration is same as that on Sandybridge, but > > many state commands are changed > > > > Signed-off-by: Xiang, Haihao > > --- > > src/i965_reg.h | 132 ++

Re: [Intel-gfx] [PATCH 5/5] Xv: set up pipeline for Xv on Ivybridge

2011-06-23 Thread Owain Ainsworth
On Thu, Jun 23, 2011 at 12:47:47AM +0800, Xiang, Haihao wrote: > The configuration is same as that on Sandybridge, but > many state commands are changed > > Signed-off-by: Xiang, Haihao > --- > src/i965_reg.h | 132 > src/i965_video.c | 446 > +++

Re: [Intel-gfx] [PATCH] drm/i915: reset forcewake count after reset

2011-06-23 Thread Ben Widawsky
On Thu, Jun 23, 2011 at 07:00:50PM -0700, Ben Widawsky wrote: > On Fri, Jun 24, 2011 at 12:45:27AM +0100, Chris Wilson wrote: > > On Thu, 23 Jun 2011 16:06:22 -0700, Ben Widawsky wrote: > > > > > > Signed-off-by: Ben Widawsky > > > --- > > > drivers/gpu/drm/i915/i915_drv.c |1 + > > > 1 fil

Re: [Intel-gfx] [PATCH] drm/i915: reset forcewake count after reset

2011-06-23 Thread Ben Widawsky
On Fri, Jun 24, 2011 at 12:45:27AM +0100, Chris Wilson wrote: > On Thu, 23 Jun 2011 16:06:22 -0700, Ben Widawsky wrote: > > > > Signed-off-by: Ben Widawsky > > --- > > drivers/gpu/drm/i915/i915_drv.c |1 + > > 1 files changed, 1 insertions(+), 0 deletions(-) > > > > diff --git a/drivers/gp

Re: [Intel-gfx] gem clflush optimization for media encoding

2011-06-23 Thread Zou, Nanhai
>>-Original Message- >>From: Jesse Barnes [mailto:jbar...@virtuousgeek.org] >>Sent: 2011年6月24日 1:20 >>To: Zou, Nanhai >>Cc: Keith Packard; intel-gfx@lists.freedesktop.org; Anholt, Eric >>Subject: Re: [Intel-gfx] gem clflush optimization for media encoding >> >>On Wed, 22 Jun 2011 12:29:21

Re: [Intel-gfx] [PATCH] drm/i915: hangcheck timeout for debugfs

2011-06-23 Thread Chris Wilson
On Thu, 23 Jun 2011 15:49:14 -0700, Ben Widawsky wrote: > Provide a user accessible way to change the hangcheck timer. This is > useful mostly for disabling the timer completely (value <= 0). Having i915.hangcheck_interval as a read/write module parameter was better. :-p -Chris -- Chris Wilson,

Re: [Intel-gfx] [PATCH] drm/i915: reset forcewake count after reset

2011-06-23 Thread Chris Wilson
On Thu, 23 Jun 2011 16:06:22 -0700, Ben Widawsky wrote: > > Signed-off-by: Ben Widawsky > --- > drivers/gpu/drm/i915/i915_drv.c |1 + > 1 files changed, 1 insertions(+), 0 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 0defd42..92924

[Intel-gfx] [PATCH] drm/i915: reset forcewake count after reset

2011-06-23 Thread Ben Widawsky
Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_drv.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 0defd42..9292499 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i91

[Intel-gfx] [PATCH] drm/i915: hangcheck timeout for debugfs

2011-06-23 Thread Ben Widawsky
Provide a user accessible way to change the hangcheck timer. This is useful mostly for disabling the timer completely (value <= 0). Signed-off-by: Ben Widawsky Cc: Keith Packard --- drivers/gpu/drm/i915/i915_debugfs.c | 88 +++ drivers/gpu/drm/i915/i915_dma.c

Re: [Intel-gfx] [PATCH 4/9] drm/i915: don't set transcoder bpc on CougarPoint

2011-06-23 Thread Keith Packard
On Wed, 11 May 2011 10:48:05 -0700, Jesse Barnes wrote: > This prevents us from setting reserved or incorrect bits on > CougarPoint. Reviewed-by: Keith Packard -- keith.pack...@intel.com pgpjbEwTRahrQ.pgp Description: PGP signature ___ Intel-gfx

Re: [Intel-gfx] [PATCH 3/9] drm/i915: don't set SDVO color range on ILK+

2011-06-23 Thread Keith Packard
On Wed, 11 May 2011 10:48:04 -0700, Jesse Barnes wrote: > These bits are reserved on ILK+ (ILK+ provides this feature in the > transcoder and pipe configuration instead, which we already set). > > Signed-off-by: Jesse Barnes Reviewed-by: Keith Packard -- keith.pack...@intel.com pgpYBmM56r

Re: [Intel-gfx] [PATCH] drm/i915: initialize ring frequency scaling table on SNB

2011-06-23 Thread Jesse Barnes
On Thu, 23 Jun 2011 21:08:02 +0100 Chris Wilson wrote: > On Thu, 23 Jun 2011 10:11:26 -0700, Jesse Barnes > wrote: > > I tested again and things were working as expected. This patch adds a > > debugfs file for dumping the ring freq table, can you guys test it out > > (try disabling the call to

Re: [Intel-gfx] [PATCH] drm/i915: initialize ring frequency scaling table on SNB

2011-06-23 Thread Chris Wilson
On Thu, 23 Jun 2011 10:11:26 -0700, Jesse Barnes wrote: > I tested again and things were working as expected. This patch adds a > debugfs file for dumping the ring freq table, can you guys test it out > (try disabling the call to update the table, dump it, make sure it's 0, > then re-enable and

[Intel-gfx] 3 monitor setup - Sandy Bridge coexisting with an NVidia adapter?

2011-06-23 Thread Mark Knecht
Hi, We've been having some minor startup issues getting a 3 monitor multi-head setup running where two digital monitors are driven by an NVidia adapter and the 3rd analog monitor is driven by the VGA output on a Z68/Sandy Bridge Asus motherboard. I just wanted to ensure that there aren't any

[Intel-gfx] dual head independent displays

2011-06-23 Thread Peter Hite
Hello All, I cannot seem to get my dual heads working independently on my Intel Atom N270 using the GSE chipset on Fedora 14. I want to use dual head displays with independent graphics where the monitors are treated like different PC's. All I have gotten to work is the Xinerama feature where

Re: [Intel-gfx] gem clflush optimization for media encoding

2011-06-23 Thread Jesse Barnes
On Wed, 22 Jun 2011 12:29:21 +0800 "Zou, Nanhai" wrote: > map_gtt in current gem is super slow. > I've tried map_gtt but it seems that the speed is unacceptable. > > >>> Since it is CPU read only surface, clflush in not needed at all. > >> > >>You'd still have to invalidate cache l

Re: [Intel-gfx] [PATCH] drm/i915: initialize ring frequency scaling table on SNB

2011-06-23 Thread Jesse Barnes
I tested again and things were working as expected. This patch adds a debugfs file for dumping the ring freq table, can you guys test it out (try disabling the call to update the table, dump it, make sure it's 0, then re-enable and make sure it's programmed correctly). -- Jesse Barnes, Intel Ope

Re: [Intel-gfx] Serious Performance Issue

2011-06-23 Thread Travis Allen
Thanks! I don't think I would have ever thought of that. It works great now. Regards, Travis Allen Software Developer Audio/Video Innovations tal...@avi-electronics.com V 905-331-5695 x228 F 905-331-7432 Audio/Video Innovations Inc. CONFIDENTIALITY NOTE: The con

[Intel-gfx] Serious Performance Issue

2011-06-23 Thread Travis Allen
I am using an D945GSEJT board. Essentially what I am trying to do is run 1 single app on top of X (no window manager, login, etc). What I did is install a command-line only Ubuntu 11.04, install xorg through apt, update the intel driver to 2.15.0, and use "startx /blah/blah" to launch X and th

[Intel-gfx] [PATCH] drm/i915: Defend against userspace creating a gem object with size==0

2011-06-23 Thread Chris Wilson
We currently only round up the userspace size to the next page. We assume that userspace hasn't made a mistake and requested a zero-length gem object and all through our internal code we then presume that every object is backed by at least a single page. Fix that oversight and report EINVAL back to

Re: [Intel-gfx] IVB page flipping fixes (hopefully final)

2011-06-23 Thread Zhao, Jian J
The issue(the patch may bring regression to piglit test) can't be reproduced now both with new code and old code, so maybe we can make the patch into our kernel tree. The details: I did some retest with newer commit in Mesa master and Xserver in 1.10 branch and run the piglit test without gle