Re: [Intel-gfx] DisplayPort support

On Wed, 27 Apr 2011 11:42:34 +1000, Paul McGarry wrote: > Hi all, > > Can someone tell me whether the info on: > > http://www.x.org/wiki/DisplayPort > > "There is a branch of the intel driver that attempts DP setup. It's > not clear whether this branch supports DP->DVI connections, but it > cer

Re: [Intel-gfx] [PATCH 1/7] drm/i915: automatic FDI training support for Ivy Bridge

On Tue, 26 Apr 2011 17:06:01 -0700, Jesse Barnes wrote: > You can ignore this set; I only sent it because I thought the others > wouldn't come through. Before I find the others... Do they treat IS_IVYBRIDGE() vs IS_GEN7 consistently? Do they have sufficient debug and self-tests? Can we split in

Re: [Intel-gfx] [PATCH] fix interrupt request miss problem in bsd ring for g4x

I am very sorry for my careless about whitespace. But my patch will not affect gen6+ paths, for gen6+, it use gen6_bsd_ring , bsd_ring is only used by g4x and ironlake. Besides, since bsd_ring_get_irq/bsd_ring_put_irq/ring_get_irq/ring_put_irq are only used by bsd_ring, can we use a patch to merg

Re: [Intel-gfx] [PATCH] fix interrupt request miss problem in bsd ring for g4x

We need this fix to enable h264 decoding on G4x. And I will resend a patch, more clear and standard. -Original Message- From: Keith Packard [mailto:kei...@keithp.com] Sent: Wednesday, April 27, 2011 1:55 AM To: Feng, Boqun; intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH]

Re: [Intel-gfx] DisplayPort support

On Wed, Apr 27, 2011 at 11:45 AM, Andrew Lutomirski wrote: > Intel DH67GD connected to Dell U2711 over DP works fine on recent > kernels.  (U2711 is even higher bandwidth than anything Apple makes.) That is the same res as the iMac so that is reassuring. Do you boot up directly using that monito

[Intel-gfx] SandyBridge encoding code merged to libva master

Hi, We have merged HW accelerated SandyBridge encoding code to libva master branch. At this point we support I frame and P frame encoding for H.264 main profile. B frame support, frame rate control, performance tuning and quality improvement will come in next quarter.

Re: [Intel-gfx] DisplayPort support

Intel DH67GD connected to Dell U2711 over DP works fine on recent kernels. (U2711 is even higher bandwidth than anything Apple makes.) --Andy On Tue, Apr 26, 2011 at 9:42 PM, Paul McGarry wrote: > Hi all, > > Can someone tell me whether the info on: > > http://www.x.org/wiki/DisplayPort > > "Th

[Intel-gfx] DisplayPort support

Hi all, Can someone tell me whether the info on: http://www.x.org/wiki/DisplayPort "There is a branch of the intel driver that attempts DP setup. It's not clear whether this branch supports DP->DVI connections, but it certainly doesn't support DP->DP connections yet. " is up to date or is Displ

Re: [Intel-gfx] [PATCH 1/7] drm/i915: automatic FDI training support for Ivy Bridge

You can ignore this set; I only sent it because I thought the others wouldn't come through. -- Jesse Barnes, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/int

[Intel-gfx] [PATCH 11/16] drm/i915: manual FDI training for Ivy Bridge

A0 stepping chips need to use manual training, but the bits have all moved. So fix things up so we can at least train FDI for VGA links. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_reg.h | 10 +++ drivers/gpu/drm/i915/intel_display.c | 129 +

[Intel-gfx] [PATCH 14/16] drm/i915: page flip support for Ivy Bridge

Treat Ivy Bridge like previous chips as far as flip submission is concerned. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c

[Intel-gfx] [PATCH 12/16] drm/i915: treat Ivy Bridge watermarks like Sandy Bridge

Not fully tested. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c |9 - 1 files changed, 8 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 866abe5..908c4d9 100644 --- a/drivers/gpu/drm

[Intel-gfx] [PATCH 16/16] drm/i915: ring support for Ivy Bridge

Use Sandy Bridge paths in a few places. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_ringbuffer.c |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index f15d80f..9bcfb9b

[Intel-gfx] [PATCH 10/16] drm/i915: automatic FDI training support for Ivy Bridge

Ivy Bridge supports auto-training on the CPU side, so add a separate training function to handle it. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_reg.h |2 + drivers/gpu/drm/i915/intel_display.c | 81 +++-- 2 files changed, 78 insertions(+), 5

[Intel-gfx] [PATCH 13/16] drm/i915: interrupt & vblank support for Ivy Bridge

Add new interrupt handling functions for Ivy Bridge. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_dma.c | 12 +++- drivers/gpu/drm/i915/i915_drv.h |7 ++ drivers/gpu/drm/i915/i915_irq.c | 156 +++ drivers/gpu/drm/i915/i915_reg.h | 13 +++

[Intel-gfx] [PATCH 15/16] drm/i915: untested DP support for Ivy Bridge

Treat it like Sandy Bridge in a few places. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_dp.c |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 0daefca..1d0eccd 100644 --- a/drivers/

Re: [Intel-gfx] Initial Ivy Bridge support

On Tue, 26 Apr 2011 16:38:38 -0700 Jesse Barnes wrote: > This set of patches enables basic Ivy Bridge support, and has been > tested with early hardware. VGA is known to work, but other outputs are > likely to work as well given that IVB uses CougarPoint or compatible PCH > chips, which contain

[Intel-gfx] [PATCH 7/7] drm/i915: ring support for Ivy Bridge

Use Sandy Bridge paths in a few places. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_ringbuffer.c |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index f15d80f..9bcfb9b

[Intel-gfx] [PATCH 4/7] drm/i915: interrupt & vblank support for Ivy Bridge

Add new interrupt handling functions for Ivy Bridge. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_dma.c | 12 +++- drivers/gpu/drm/i915/i915_drv.h |7 ++ drivers/gpu/drm/i915/i915_irq.c | 156 +++ drivers/gpu/drm/i915/i915_reg.h | 13 +++

[Intel-gfx] [PATCH 6/7] drm/i915: untested DP support for Ivy Bridge

Treat it like Sandy Bridge in a few places. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_dp.c |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 0daefca..1d0eccd 100644 --- a/drivers/

[Intel-gfx] [PATCH 3/7] drm/i915: treat Ivy Bridge watermarks like Sandy Bridge

Not fully tested. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c |9 - 1 files changed, 8 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 866abe5..908c4d9 100644 --- a/drivers/gpu/drm

[Intel-gfx] [PATCH 5/7] drm/i915: page flip support for Ivy Bridge

Treat Ivy Bridge like previous chips as far as flip submission is concerned. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c

[Intel-gfx] [PATCH 2/7] drm/i915: manual FDI training for Ivy Bridge

A0 stepping chips need to use manual training, but the bits have all moved. So fix things up so we can at least train FDI for VGA links. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_reg.h | 10 +++ drivers/gpu/drm/i915/intel_display.c | 129 +

[Intel-gfx] [PATCH 1/7] drm/i915: automatic FDI training support for Ivy Bridge

Ivy Bridge supports auto-training on the CPU side, so add a separate training function to handle it. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_reg.h |2 + drivers/gpu/drm/i915/intel_display.c | 81 +++-- 2 files changed, 78 insertions(+), 5

[Intel-gfx] [PATCH 06/16] agp/intel: add Ivy Bridge support

Just use the Sandy Bridge routines. Signed-off-by: Jesse Barnes --- drivers/char/agp/intel-agp.c |3 +++ drivers/char/agp/intel-agp.h |8 drivers/char/agp/intel-gtt.c | 10 ++ 3 files changed, 21 insertions(+), 0 deletions(-) diff --git a/drivers/char/agp/intel-agp.c

[Intel-gfx] [PATCH 04/16] drm/i915: add Ivy Bridge PCI IDs and flags

Check for IVB desktop, mobile and other SKUs and set flags appropriately. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.c | 19 +++ drivers/gpu/drm/i915/i915_drv.h |2 ++ 2 files changed, 21 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/i9

[Intel-gfx] [PATCH 09/16] drm/i915: add swizzle/tiling support for Ivy Bridge

Treat it like Ironlake and Sandy Bridge. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_gem_tiling.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c index dfb682b..418015f 100644

[Intel-gfx] [PATCH 08/16] drm/i915: Ivy Bridge has split display and pipe control

Ivy Bridge has a similar split display controller to Sandy Bridge, so use HAS_PCH_SPLIT. And gen7 also has the pipe control instruction, so use HAS_PIPE_CONTROL as well. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.h |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)

[Intel-gfx] [PATCH 07/16] drm/i915: add PantherPoint PCH ID

We can treat PantherPoint as CougarPoint as far as display goes. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.c |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 016290e..53f4f14 10

[Intel-gfx] [PATCH 05/16] drm/i915: add IS_GEN7 macro to cover Ivy Bridge and later

Note: IS_GEN* are for render related checks. Display and other checks should use IS_MOBILE, IS_$CHIPSET or test for specific features. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/i9

[Intel-gfx] [PATCH 02/16] drm/i915: split irq handling into per-chipset functions

Set the IRQ handling functions in driver load so they'll just be used directly, rather than branching over most of the code in the chipset functions. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_dma.c | 12 ++ drivers/gpu/drm/i915/i915_drv.h |6 + drivers/gpu/drm/i

[Intel-gfx] [PATCH 03/16] drm/i915: split enable/disable vblank code into chipset specific functions

This makes the Ironlake+ code trivial and generally simplifies things. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_dma.c |4 +++ drivers/gpu/drm/i915/i915_drv.h |2 + drivers/gpu/drm/i915/i915_irq.c | 42 -- 3 files changed, 37 insertio

[Intel-gfx] [PATCH 01/16] drm/i915: make FDI training a display function

Rather than branching in ironlake_pch_enable, add a new train_fdi function to the display function pointer struct and use it instead. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/i915_drv.h |2 +- drivers/gpu/drm/i915/intel_display.c |7 +++ 2 files changed, 4 insertions

[Intel-gfx] Initial Ivy Bridge support

This set of patches enables basic Ivy Bridge support, and has been tested with early hardware. VGA is known to work, but other outputs are likely to work as well given that IVB uses CougarPoint or compatible PCH chips, which contain most of the display logic. Page flipping was buggy when last tes

Re: [Intel-gfx] [PATCH] fix interrupt request miss problem in bsd ring for g4x

On Tue, 26 Apr 2011 18:12:52 +0800, "Feng, Boqun" wrote: > Signed-off-by: Feng, Boqun Please add a description here of what the bug was and how this fixes it. -- keith.pack...@intel.com pgph19eyUhT0a.pgp Description: PGP signature ___ Intel-gfx mai

[Intel-gfx] can I use blitter engine on sandy bridge platform to strech/shrink?

Hi, guys: I read the the document about blitter engine on HD graphics which says functions such as Alpha BLTs, arithmetic (bilinear) stretch BLTs, rotations, transposing pixel maps, color space conversion, and DIBs are all considered 3D BLTs and are covered in the 3D rendering section. But I can't

Re: [Intel-gfx] [PATCH] fix interrupt request miss problem in bsd ring for g4x

Only, the first 2 chunks are required. The gen6+ paths are unaffected. And be careful of your whitespace. -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org

[Intel-gfx] [PATCH] fix interrupt request miss problem in bsd ring for g4x

Signed-off-by: Feng, Boqun --- drivers/gpu/drm/i915/intel_ringbuffer.c | 30 -- 1 files changed, 24 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index e9e6f71..6606ca7 100644 --- a/driv

Re: [Intel-gfx] [PATCH 5/5] drm/i915: debugfs interface for forcewake reference count

On Mon, 25 Apr 2011 14:46:14 -0700, Ben Widawsky wrote: > On Mon, Apr 25, 2011 at 08:28:50PM +0100, Chris Wilson wrote: > When/if you do the announce for staging, I will reply there as well with > this repo, and push it once the kernel changes stick. -staging is a constant flux of patches heading