On Wed, 10 Nov 2010 08:36:20 +0800, "Zou, Nanhai" wrote:
> >>-Original Message-
> >>From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
> >>Sent: 2010å¹´11æ9æ¥ 18:50
> >>To: Zou, Nanhai; intel-gfx@lists.freedesktop.org; Zhao, Jian J
> >>Subject: RE: [PATCH] drm/i915/ringbuffer: set for
On Saturday 06 November 2010 13:24:33 Damnshock wrote:
> I'll try to update and check again!
Ok, I've been running the release non-stop for three days. Sleeping and waking
the laptop several times as well as playing games (wesnoth), videos and
enabling disabling desktop effects on KDE.
Stabilit
>>-Original Message-
>>From: Chris Wilson [mailto:ch...@chris-wilson.co.uk]
>>Sent: 2010年11月9日 18:50
>>To: Zou, Nanhai; intel-gfx@lists.freedesktop.org; Zhao, Jian J
>>Subject: RE: [PATCH] drm/i915/ringbuffer: set force wake bit before reading
>>ring register
>>
>>On Tue, 9 Nov 2010 17:17:0
On Tue, 9 Nov 2010 14:48:36 -0800, Guenter Roeck
wrote:
> I think it would make sense to push this patch into the kernel, even if
> it does not fix the problem reported by Randy. The problems are obvious
> enough.
>
> Copying subsystem maintainers and mailing lists for input.
Thanks, and Jean m
On Sat, 30 Oct 2010 14:04:11 +0100, Peter Clifton wrote:
> I think I'll need some help with this. I'm by no means a kernel
> programmer, so I'm feeling my way in the dark with this.
>
> I want to design an interface so I can synchronise my GPU idle flags
> polling with batchbuffer execution. I'm
--
Peter Clifton
Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA
Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
>From 18072c138b7cca626f8b45dfae2c6cb29a91aaf8 Mo
On Tue, 09 Nov 2010 19:09:23 +, Peter Clifton wrote:
> Nothing small, but if you're prepared to do build something more
> complex:
Thanks. I think I know why it is crashing. Excuse me whilst I go and hide
under a rock.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
On Tue, 2010-11-09 at 18:56 +, Chris Wilson wrote:
> Do you have a test case that I can run? I've been beating upon this using
> i945, pnv, q35 and g45 for quite some time and found it to be stable (for
> my uses at least).
Nothing small, but if you're prepared to do build something more
comp
On Tue, 09 Nov 2010 18:22:48 +, Peter Clifton wrote:
> Since the above commit, my GL app will crash after a period of sustained
> graphics activity. It appears to use quite a lot of small BOs for
> uploading changed VBO data with glBufferSubData, and I don't think these
> are being purged unti
On Tue, 2010-11-09 at 18:22 +, Peter Clifton wrote:
> commit 53984635a659e360f206a81ada4ae813152d72f1
> Author: Daniel Vetter
> Date: Wed Sep 22 23:44:24 2010 +0200
>
> drm/i915: use the complete gtt
>
> At least the part that's currently enabled by the BIOS.
>
> Signe
commit 53984635a659e360f206a81ada4ae813152d72f1
Author: Daniel Vetter
Date: Wed Sep 22 23:44:24 2010 +0200
drm/i915: use the complete gtt
At least the part that's currently enabled by the BIOS.
Signed-off-by: Daniel Vetter
Signed-off-by: Chris Wilson
Since the abov
On Sat, 30 Oct 2010 14:04:11 +0100
Peter Clifton wrote:
> I think I'll need some help with this. I'm by no means a kernel
> programmer, so I'm feeling my way in the dark with this.
>
> I want to design an interface so I can synchronise my GPU idle flags
> polling with batchbuffer execution. I'm
It is reported as https://bugs.freedesktop.org/show_bug.cgi?id=29716.
find the regression and here is the fix, maybe ugly.
diff --git a/src/intel_display.c b/src/intel_display.c
index d32224e..4a159bf 100644
--- a/src/intel_display.c
+++ b/src/intel_display.c
@@ -339,6 +339,8 @@ intel_crtc_apply
On Tue, 2010-11-09 at 10:52 +, Peter Clifton wrote:
> On Sun, 2010-11-07 at 10:25 +, Chris Wilson wrote:
> I've not tried that yet, but the PRM does state that BLT pitch is in
> DWORDs.
Gah.. the PRM is badly written in places! In one place it states DWORDs,
then in another you get the ac
On Tue, 09 Nov 2010 11:34:52 +, Peter Clifton wrote:
> On Tue, 2010-11-09 at 10:52 +, Peter Clifton wrote:
> > On Sun, 2010-11-07 at 10:25 +, Chris Wilson wrote:
>
> > I've not tried that yet, but the PRM does state that BLT pitch is in
> > DWORDs.
>
> Gah.. the PRM is badly written
On Sun, 2010-11-07 at 10:25 +, Chris Wilson wrote:
> On Sat, 06 Nov 2010 10:04:31 +, Peter Clifton wrote:
> > Fixes corruption with glBufferSubData on my machine,
> >
> > Can someone review and push?
>
> Oddly, the pitch for BLT is in bytes and it should be sufficient to be a
> multiple
On Tue, 9 Nov 2010 17:17:07 +0800, "Zou, Nanhai" wrote:
> I have tested this patch with the read ring head from status page workaround
> patch reverted.
> Seems it works on my SNB box.
I needed to add a udelay(100) to i915_safe_read for my rev 8. Can you
check if there is a recommended delay f
>>-Original Message-
>>From: Zou, Nanhai
>>Sent: 2010年11月9日 17:18
>>To: intel-gfx@lists.freedesktop.org; Chris Wilson
>>Cc: Zou, Nanhai
>>Subject: [PATCH] drm/i915/ringbuffer: set force wake bit before reading ring
>>register
>>
>>before reading ring register, set force wake bit to prevent
before reading ring register, set force wake bit to prevent GT core
power down to low power state. otherwise we may read stale value.
Signed-off-by: Zou Nan hai
---
drivers/gpu/drm/i915/i915_drv.h | 14 ++
drivers/gpu/drm/i915/i915_reg.h |1 +
drivers/gpu/drm/i9
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