On Tue, 09 Nov 2010 11:34:52 +0000, Peter Clifton <pc...@cam.ac.uk> wrote: > On Tue, 2010-11-09 at 10:52 +0000, Peter Clifton wrote: > > On Sun, 2010-11-07 at 10:25 +0000, Chris Wilson wrote: > > > I've not tried that yet, but the PRM does state that BLT pitch is in > > DWORDs. > > Gah.. the PRM is badly written in places! In one place it states DWORDs, > then in another you get the actual detail:
Of course, I was reading another document which made no mention of the tiling or dword restrictions ;-) Contradictory, uncrossreferenced, incomplete docs are all we have. > Chris, I can try word-aligned if you wish, but am chasing some other > random GPU hangs / crashes at the moment. Fun fun ;) No need, life is too short. > (PS. Any idea where batchbuffer containing 3D commands, but with a > string of 6-8 MI_NOOP commands would come from? I can't find code to > emit like that in MESA or the 2D driver - I am wondering if the buffer > had become corrupted). Keep digging and you'll find a reference to some silicon bugs for which certain commands (in this case it's probably the URB_FENCE) must not cross cache-lines. I'm guessing that the MI_NOOPs you've seen are due to us aligning the following commands to meet such constraints. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
